> From: Chad Monroe > > With flow stats enabled, PPE offload setup requests flow statistics > from the NPU. If the running NPU firmware does not support flow > counters, the request fails and the current setup path aborts PPE > offload. > > Treat flow statistics as an optional capability so that a failure to > set up the counters does not prevent normal PPE offload. Record > whether flow statistics are available and continue PPE initialization > when the NPU refuses the flow-statistics request. > > Also treat a zero NPU statistics address returned by the firmware as a > refusal. The host-side DMA buffer (foe_stats_dma) is allocated by > dmam_alloc_coherent() in airoha_ppe_init() from system memory. The NPU > statistics address (npu_stats_addr) is a separate allocation from the > NPU firmware's internal SRAM pool. When that pool is exhausted, the > firmware replies with success and npu_stats_addr = 0. A zero address > does not provide a usable counter region and must not be passed to > devm_ioremap(). > > When flow stats are available, clear PSE_PORT6_SHARE_DIS so that PSE > port 6 (CDM3 path to the NPU) participates in shared-buffer flow > control, which the counter traffic path needs. > > When flow statistics are unavailable, PPE continues to operate without > NPU flow counters while retaining normal offload functionality. > > This combines the original SmartRG/Airoha fixes for: > - keeping PPE offload active when the NPU refuses flow statistics > - treating a zero NPU statistics address as a flow-statistics refusal > > Based on the original SmartRG/Airoha work by Chad Monroe: > 5ce96ab ("SDG-9458: keep PPE offload when NPU refuses flow stats") > 0ad8528 ("SDG-9458: airoha: treat a zero NPU stats address as a refusal") > Fixes: b81e0f2b58be ("net: airoha: Add FLOW_CLS_STATS callback support") > Tested-on: AN7581 with MT7992 > Signed-off-by: Chad Monroe > Signed-off-by: SAYANTAN NANDY > --- > > Changes since v1: > - Rename flow_stats to flow_stats_cap (Lorenzo). > - Explain that npu_stats_addr is an NPU firmware SRAM allocation, > distinct from the host-side foe_stats_dma buffer (Lorenzo). > - Explain why PSE_PORT6_SHARE_DIS is cleared for counter traffic > (Lorenzo). > - Use airoha_fe_clear() and shorten the warning message (Lorenzo). > - Add hardware testing information requested by netdev-bot. > > drivers/net/ethernet/airoha/airoha_eth.h | 1 + > drivers/net/ethernet/airoha/airoha_npu.c | 8 ++++++++ > drivers/net/ethernet/airoha/airoha_ppe.c | 17 +++++++++++------ > drivers/net/ethernet/airoha/airoha_regs.h | 2 ++ > 4 files changed, 22 insertions(+), 6 deletions(-) > > diff --git a/drivers/net/ethernet/airoha/airoha_eth.h b/drivers/net/ethernet/airoha/airoha_eth.h > index 8277c1c87bb3..da4a3ba69e3c 100644 > --- a/drivers/net/ethernet/airoha/airoha_eth.h > +++ b/drivers/net/ethernet/airoha/airoha_eth.h > @@ -617,6 +617,7 @@ struct airoha_ppe { > > void *foe; > dma_addr_t foe_dma; > + bool flow_stats_cap; > > struct rhashtable l2_flows; > > diff --git a/drivers/net/ethernet/airoha/airoha_npu.c b/drivers/net/ethernet/airoha/airoha_npu.c > index 4d3195eb00f7..b32a01dbe06b 100644 > --- a/drivers/net/ethernet/airoha/airoha_npu.c > +++ b/drivers/net/ethernet/airoha/airoha_npu.c > @@ -450,6 +450,14 @@ static int airoha_npu_ppe_stats_setup(struct airoha_npu *npu, > if (err) > goto out; > > + /* The firmware reports success with a zero address when its SRAM > + * pool has no room left for the counters. > + */ > + if (!ppe_data->stats_info.npu_stats_addr) { > + err = -ENOSPC; > + goto out; > + } > + > npu->stats = devm_ioremap(npu->dev, > ppe_data->stats_info.npu_stats_addr, > size); > diff --git a/drivers/net/ethernet/airoha/airoha_ppe.c b/drivers/net/ethernet/airoha/airoha_ppe.c > index 92611802801e..0957f331478a 100644 > --- a/drivers/net/ethernet/airoha/airoha_ppe.c > +++ b/drivers/net/ethernet/airoha/airoha_ppe.c > @@ -37,10 +37,7 @@ static const struct rhashtable_params airoha_l2_flow_table_params = { > > static int airoha_ppe_get_num_stats_entries(struct airoha_ppe *ppe) > { > - if (!IS_ENABLED(CONFIG_NET_AIROHA_FLOW_STATS)) > - return -EOPNOTSUPP; > - > - if (airoha_is_7583(ppe->eth)) > + if (!ppe->flow_stats_cap) > return -EOPNOTSUPP; Looking again at the code flow_stats_cap is only used here. Why do we need it in the first place? I guess you it is enough to just not return an error in airoha_ppe_offload_setup() and log the error instead (as you did). > > return PPE_STATS_NUM_ENTRIES; > @@ -144,6 +141,9 @@ static void airoha_ppe_hw_init(struct airoha_ppe *ppe) > sram_ppe_num_data_entries = > PPE_RAM_NUM_ENTRIES_SHIFT(sram_ppe_num_data_entries); > > + if (ppe->flow_stats_cap) > + airoha_fe_clear(eth, PSE_FC_CFG, PSE_PORT6_SHARE_DIS); can you please explain what this configuration is doing? This register is not documented. > + > for (i = 0; i < eth->soc->num_ppe; i++) { > airoha_fe_wr(eth, REG_PPE_TB_BASE(i), > ppe->foe_dma + sram_tb_size); > @@ -1456,8 +1456,11 @@ static int airoha_ppe_offload_setup(struct airoha_eth *eth) > if (ppe_num_stats_entries > 0) { > err = npu->ops.ppe_init_stats(npu, ppe->foe_stats_dma, > ppe_num_stats_entries); > - if (err) > - goto error_npu_put; > + if (err) { > + dev_warn(eth->dev, "NPU refused flow stats (%d)\n", > + err); > + ppe->flow_stats_cap = false; please see above. > + } > } > > airoha_ppe_hw_init(ppe); > @@ -1608,6 +1611,8 @@ int airoha_ppe_init(struct airoha_eth *eth) > ppe->dev.priv = ppe; > ppe->eth = eth; > eth->ppe = ppe; > + ppe->flow_stats_cap = IS_ENABLED(CONFIG_NET_AIROHA_FLOW_STATS) && > + !airoha_is_7583(eth); please see above. Regards, Lorenzo > > ppe_num_entries = airoha_ppe_get_total_num_entries(ppe); > foe_size = ppe_num_entries * sizeof(struct airoha_foe_entry); > diff --git a/drivers/net/ethernet/airoha/airoha_regs.h b/drivers/net/ethernet/airoha/airoha_regs.h > index 442b48c9b991..aee06c058586 100644 > --- a/drivers/net/ethernet/airoha/airoha_regs.h > +++ b/drivers/net/ethernet/airoha/airoha_regs.h > @@ -72,6 +72,8 @@ > #define PSE_CFG_OQ_RSV_MASK GENMASK(13, 0) > > #define PSE_FQ_CFG 0x008c > +#define PSE_FC_CFG 0x0098 > +#define PSE_PORT6_SHARE_DIS BIT(22) > #define PSE_FQ_LIMIT_MASK GENMASK(14, 0) > > #define REG_FE_PSE_BUF_SET 0x0090 > -- > 2.43.0 >