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Tue, 20 Oct 2026 10:47:50 -0700 Received: from nvidia.com (10.127.8.13) by mail.nvidia.com (10.126.190.180) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.56 via Frontend Transport; Tue, 20 Oct 2026 10:47:49 -0700 Date: Tue, 20 Oct 2026 10:47:48 -0700 From: Nicolin Chen To: Mostafa Saleh CC: , , , , , , , , , , , Cristian Prundeanu , Breno Leitao Subject: Re: [PATCH v11 06/11] iommu/arm-smmu-v3: Add ARM_SMMU_OPT_KDUMP_ADOPT for kdump kernel Message-ID: References: X-Archived-By: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MN1PEPF000793FE:EE_|IA4PR12MB743615:EE_ X-MS-Office365-Filtering-Correlation-Id: 60de04d1-0f42-4a06-b13a-08df2ed2504c X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|1800799024|7416014|376014|23010399003|36860700016|6133799003|10067099003|18002099003|22082099003|11063799006|4143699003|56012099006; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 2JhfhLA5QsoWMhwqB/tOjWv2pASVUe4Lxr3JNmszTwoOL1DpxFclyWocIKCupX7LYz2lycYpuxEuZ+hwpMOewl5HD51k8loedCtaQ+PRD50bhX1NsQ2yruiqPWwGHQgjL7ChWOpxoobTSH2A7pGxVlrVijiwfK2yVYHJ2fLSpqxlhfSe/YH1DHp5Envd2nhWBwncpzrHZHnKoHvRpSDE7B3Ejh4Dvaj4aoAWnmskVCo7QMU2ooZC0MK0y/rKY3tbpb3hr9U3La6vJKlVvEL9MT8CYiHdRrfTZDtrmvEDw8B+iUR7Bi74cwOMDAUCDHHcSC7yiszbRuUc/dPB5sF/8KpQRDm/+RmVxPPg+t9kLNePtw2Ij3xxQLYNBjpElbFBjLVy9o+C6/ig87awTMfoS30Zsi7u6VdOzo8hYNxyRccJdeYn2Z93wRcffZJJyIsB X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 20 Oct 2026 17:48:13.3203 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 60de04d1-0f42-4a06-b13a-08df2ed2504c X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.118.233];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: MN1PEPF000793FE.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA4PR12MB743615 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20261020_104820_784876_A21CE4EC X-CRM114-Status: GOOD ( 20.40 ) X-Spam-Score: -2.4 (--) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" X-Spam-Status: No, score=-6.2 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS autolearn=no autolearn_force=no version=4.0.1 X-Spam-Checker-Version: SpamAssassin 4.0.1 (2024-03-26) on aws-us-west-2-korg-listserv-alma10-1 On Tue, Oct 20, 2026 at 10:36:04AM -0700, Nicolin Chen wrote: > On Tue, Oct 20, 2026 at 11:38:21AM +0000, Mostafa Saleh wrote: > > On Mon, Oct 05, 2026 at 12:30:49PM -0700, Nicolin Chen wrote: > > > + /* > > > + * According to spec (6.3.24), HW aligns the base down to the table size > > > + * and ignores the low bits, so an unaligned base would make this kernel > > > + * read a different table. > > > + */ > > > + if (!IS_ALIGNED(base, size)) { > > > + dev_err(smmu->dev, "unaligned stream table base %pa\n", &base); > > > > I understand these are best effort, but what happens if the address > > corrupted and happens to be aligned? > > This is a basic sanity so HW wouldn't immediately fail. A corrupted > address would be trickier to test out; also we don't have a perfect > way to do that. Earlier versions had some address range check. I've > dropped it, following Jason's comments. > > This is also in the kdocs of the whole smmu kdump functions: > > * - Only a coherent SMMU (ARM_SMMU_FEAT_COHERENCY) is supported, as the stream > * table adoption is done by memremap with MEMREMAP_WB, which is verified on > * the real hardware. Callers of these functions are responsible for gating > * ARM_SMMU_FEAT_COHERENCY once during the probe. > */ Oops. I copied a wrong paragraph. Should be: * - Values read from the crashed kernel's registers get structural validation * only (format, size, span, alignment, and ID range); the physical addresses * are not vetted, as the kdump kernel has no record of which pages held the * tables. Thanks Nicolin