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23 Oct 2026 01:44:21 -0700 Date: Fri, 23 Oct 2026 11:44:18 +0300 From: Andy Shevchenko To: James Hilliard Cc: Greg Kroah-Hartman , Jiri Slaby , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Ilpo =?iso-8859-1?Q?J=E4rvinen?= , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev Subject: Re: [PATCH 2/3] serial: 8250_dw: configure the Allwinner H616 UART Message-ID: References: <20261023-submit-h616-uart-fifo-v1-v1-0-e4a3bae2eba8@gmail.com> <20261023-submit-h616-uart-fifo-v1-v1-2-e4a3bae2eba8@gmail.com> X-Archived-By: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20261023-submit-h616-uart-fifo-v1-v1-2-e4a3bae2eba8@gmail.com> Organization: Intel Finland Oy - BIC 0357606-4 - c/o Alberga Business Park, 6 krs, Bertel Jungin Aukio 5, 02600 Espoo X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20261023_014426_139843_95704492 X-CRM114-Status: GOOD ( 18.15 ) X-Spam-Score: -4.5 (----) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" X-Spam-Status: No, score=-4.2 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=4.0.1 X-Spam-Checker-Version: SpamAssassin 4.0.1 (2024-03-26) on aws-us-west-2-korg-listserv-alma10-1 On Fri, Oct 23, 2026 at 01:33:50AM -0600, James Hilliard wrote: > H616 has 256-byte transmit and receive FIFOs, but its optional DesignWare > component parameter register reads as zero. Generic 16550 probing leaves > the port using the 16-byte FIFO configuration and its trigger-level table. > DMA attachment also depends on a FIFO size being available during probe, > so these ports do not reach the existing 8250 DMA path. > > Use a fixed port configuration for the H616 compatible, with a 256-byte > transmit load and the documented receive thresholds of 1, 64, 128 and 254 > bytes. Select the quarter-full receive trigger by default. > > Skip optional-register probing for this fixed configuration. H616 has > debug-divisor and RS485 control registers at the offsets used to detect > DesignWare hardware RS485 and fractional-divisor support. Probing these > offsets writes unrelated registers and can select incompatible callbacks. > Keep the BUSY-safe integer divisor hook and software RS485 handling. > > Use the existing SKIP_SET_RATE quirk to keep the UART clock enabled during > termios changes. Its clock is a gate on the shared APB2 source, rather than > an independent baud-rate generator. > > Attach DMA from the fixed configuration before registering the port. The > 8250 core installs its FIFO defaults during registration, after the probe's > FIFO-size test. Configure single-byte RX and TX bursts because the > peripheral request can correspond to just one character. The existing > startup path requests the firmware-described channels and falls back to > PIO when they are unavailable or the port is a kernel console. ... > /* Internal 8250 only */ > UART_PORT_AIROHA = 124, > UART_PORT_AIROHA_HS = 125, > + UART_PORT_DW_APB_256 = 126, Why? Besides the poorly chosen name, what prevents us from modifying the corresponding parameters at probe time by leaving the one of the existing types? ... > struct dw8250_platform_data { > u8 usr_reg; > u32 cpr_value; > + /* Use a fixed configuration instead of probing optional registers. */ > + unsigned int type; > + unsigned int dma_maxburst; This sounds like a hack. Why do we need type here? The address of platform data is enough, no? > unsigned int quirks; -- With Best Regards, Andy Shevchenko