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[34.145.1.163]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-3adebe8f09csm649587a91.7.2026.10.23.15.59.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 23 Oct 2026 15:59:07 -0700 (PDT) Date: Fri, 23 Oct 2026 22:59:04 +0000 From: Samiullah Khawaja To: Jason Gunthorpe Cc: Robin Murphy , Joerg Roedel , Will Deacon , Kevin Tian , Alex Williamson , iommu@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Pasha Tatashin , David Matlack , Lu Baolu , Pranjal Shrivastava Subject: Re: [RFC PATCH 0/3] iommu/arm-smmu-v3: Add support for hitless replace of CD entries Message-ID: References: <20260925011308.3381953-1-skhawaja@google.com> <40a2e1a2-138b-42bf-94ea-a42fda128c22@arm.com> <20261023134630.GA3977851@ziepe.ca> X-Archived-By: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii; format=flowed Content-Disposition: inline In-Reply-To: <20261023134630.GA3977851@ziepe.ca> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20261023_155911_505998_E626C13F X-CRM114-Status: GOOD ( 22.50 ) X-Spam-Score: -17.6 (-----------------) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" X-Spam-Status: No, score=-13.7 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIMWL_WL_MED,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,USER_IN_DEF_DKIM_WL autolearn=no autolearn_force=no version=4.0.1 X-Spam-Checker-Version: SpamAssassin 4.0.1 (2024-03-26) on aws-us-west-2-korg-listserv-alma10-1 On Fri, Oct 23, 2026 at 10:46:30AM -0300, Jason Gunthorpe wrote: >On Fri, Oct 23, 2026 at 01:10:56PM +0100, Robin Murphy wrote: >> On 25/09/2026 2:13 am, Samiullah Khawaja wrote: >> > This patch series adds support for replacing IOMMU domains with S1 page >> > tables hitlessly, that is without disrupting the ongoing DMAs. This is >> > one of the dependencies of the Liveupdate IOMMU support for Arm SMMUv3. >> > >> > S1 domains are programmed by CD entries in the CD table. During a new >> > domain attach these are updated using arm_smmu_write_cd_entry(). Since >> > ASID and TTB0 are in different 64-bit words, arm_smmu_write_cd_entry() >> > considers it a non-hitless update and sets V=0. This means such an >> > update is disruptive and would generate translation faults if there are >> > ongoing DMAs. >> > >> > Replace the CD entries by using an unused temporary ASID in the >> > following sequence to allow hitless replacement of CD entry, >> > >> > - Update the CD entry with temporary ASID. >> > - Update the CD entry with the target TTB0. >> > - Invalidate the temporary ASID. >> > - Update the CD entry with target ASID. >> > - Invalidate and release the temporary ASID. >> >> Why bother transitioning through a 3rd ASID? The old and new pagetables must >> contain the same translations anyway, so why not just: switch ASID, switch >> TTB, invalidate old ASID? > >The target ASID may be in use by another CD someplace else. Doing it >without the temporary could contaminate it with wrong translations >from the original TTB0. +1 > >>From a driver perspective we don't know why the domain replace >operation was triggered. iommufd can trigger it for domains that are >not identical. Corrupting the target ASID when we don't know for sure >what is happening is not safe. > >Obviously Samiullah's use case is hitless between the same translation >so it doesn't need the extra ASID, but the driver can't know this. > >Samiullah please include this explanation in a comment.. I will add this in the next version. Thanks, Sami > >Jason