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Thu, 29 Oct 2026 10:22:30 +0100 (CET) Date: Thu, 29 Oct 2026 10:22:30 +0100 From: Bas Vermeulen To: Nicolas Frattaroli Cc: Uwe =?iso-8859-1?Q?Kleine-K=F6nig?= , Lee Jones , Heiko Stuebner , Damon Ding , kernel@collabora.com, linux-pwm@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v5 3/6] pwm: Add rockchip PWMv4 driver Message-ID: References: <20260420-rk3576-pwm-v5-0-ae7cfbbe5427@collabora.com> <20260420-rk3576-pwm-v5-3-ae7cfbbe5427@collabora.com> X-Archived-By: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260420-rk3576-pwm-v5-3-ae7cfbbe5427@collabora.com> X-Spampanel-Class: ham X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20261029_022238_294412_C41FCEAE X-CRM114-Status: GOOD ( 21.08 ) X-Spam-Score: -2.8 (--) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" X-Spam-Status: No, score=-5.9 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS autolearn=no autolearn_force=no version=4.0.1 X-Spam-Checker-Version: SpamAssassin 4.0.1 (2024-03-26) on aws-us-west-2-korg-listserv-alma10-1 Hi Nicolas, On Mon, Apr 20, 2026 at 06:52:40 PDT, Nicolas Frattaroli wrote: > The Rockchip RK3576 brings with it a new PWM IP, in downstream code > referred to as "v4". This new IP is different enough from the previous > Rockchip IP that I felt it necessary to add a new driver for it, instead > of shoehorning it in the old one. The same IP block is in the RK3506 (Cortex-A7, arm32), where I am carrying this series on top of 7.3. It works there, driving a PWM backlight and a pwm-regulator for the core voltage, but two things in this patch need adjusting for it to build on a 32-bit kernel and on current mainline: > + if (rate) { > + wf->period_length_ns = DIV_ROUND_UP((u64)wfhw->period * NSEC_PER_SEC, rate); > + wf->duty_length_ns = DIV_ROUND_UP((u64)wfhw->duty * NSEC_PER_SEC, rate); > + wf->duty_offset_ns = DIV_ROUND_UP((u64)wfhw->offset * NSEC_PER_SEC, rate); DIV_ROUND_UP() with a u64 numerator is a plain 64-bit division, which on arm32 becomes a call to __aeabi_uldivmod that the kernel does not provide: pwm-rockchip-v4.o: undefined reference to `__aeabi_uldivmod' DIV_ROUND_UP_ULL() goes through div_u64() and works on both: - wf->period_length_ns = DIV_ROUND_UP((u64)wfhw->period * NSEC_PER_SEC, rate); - wf->duty_length_ns = DIV_ROUND_UP((u64)wfhw->duty * NSEC_PER_SEC, rate); - wf->duty_offset_ns = DIV_ROUND_UP((u64)wfhw->offset * NSEC_PER_SEC, rate); + wf->period_length_ns = DIV_ROUND_UP_ULL((u64)wfhw->period * NSEC_PER_SEC, rate); + wf->duty_length_ns = DIV_ROUND_UP_ULL((u64)wfhw->duty * NSEC_PER_SEC, rate); + wf->duty_offset_ns = DIV_ROUND_UP_ULL((u64)wfhw->offset * NSEC_PER_SEC, rate); Since MFD_ROCKCHIP_MFPWM allows COMPILE_TEST this will also show up in 32-bit allmodconfig builds. > + /* > + * For referencing the PWM in the DT to work, we need the parent MFD > + * device's OF node. > + */ > + dev->of_node_reused = true; struct device no longer has that member: since 7.2 the flag lives in the device flag word (commit 4aca5e62f37d "driver core: Replace dev->of_node_reused with dev_of_node_reused()"), so this does not compile against current mainline. The accessor is: - dev->of_node_reused = true; + dev_set_of_node_reused(dev); With those two changes the driver builds and runs on the RK3506 with 7.3.y; happy to add a Tested-by for that if useful. Regards, Bas