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Thu, 29 Oct 2026 09:51:06 -0700 Received: from nvidia.com (10.127.8.9) by mail.nvidia.com (10.126.190.181) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.56 via Frontend Transport; Thu, 29 Oct 2026 09:51:03 -0700 Date: Thu, 29 Oct 2026 09:51:00 -0700 From: Nicolin Chen To: Jason Gunthorpe CC: Shameer Kolothum Thodi , Catalin Marinas , Will Deacon , "joro@8bytes.org" , Robin Murphy , "rafael@kernel.org" , Danilo Krummrich , Marek Szyprowski , "aneesh.kumar@kernel.org" , Mark Rutland , "Greg Kroah-Hartman" , Suzuki K Poulose , Gavin Shan , Vikram Sethi , Anshuman Khandual , "Shanker Donthineni" , Mostafa Saleh , "rppt@kernel.org" , Thomas Huth , "Marc Zyngier" , Ryan Roberts , "kas@kernel.org" , Kohei Enju , Shaopeng Tan , Ard Biesheuvel , James Morse , Steven Price , Sang-Heon Jeon , Omar Sandoval , Andrew Morton , Jinjie Ruan , Sam Edwards , Douglas Anderson , Florian Fainelli , Chen-Yu Tsai , Huacai Chen , Thomas Zimmermann , Pranjal Shrivastava , Ashish Mhetre , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" , "iommu@lists.linux.dev" , "driver-core@lists.linux.dev" , Sonang Patel , "Ankit Agrawal" Subject: Re: [PATCH v1 2/8] firmware: arm_rmm: Add VSMMU commands and fields Message-ID: References: <0623345baaf550da1339e040b59f1fda902e3390.1789010941.git.nicolinc@nvidia.com> <20261028123509.GA2541714@nvidia.com> <20261029122818.GD3040767@nvidia.com> X-Archived-By: MIME-Version: 1.0 Content-Type: text/plain; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: wkS+yXhHtf9zm2m9DrRheUWrCzIJYUwqfBbRkNQ5vuATUjRUNrpv8e5/tODrvvwB/tjVmKIUQ2bZJJigJDt1+uKb07IiOVZzIzMgtcatD/A0JAZG+EWY8GXOwPs0KJXciYvd5Fv9QN2+ePbejxJL2BfxiJcKaN5t3wCH0yg63WLA66bDIunP1coBnupDMwXpRZzYRDuFCieIbu84PVqVfbn3Y7TYjsO3zvVLWJwGf/eTYp0DD1Jt5Y3Lf42b8DQVXSzsdcl7Yl6ZZrXWLTihLSabSDgJsB/LCEvbhwkHkL3gZrrognoZ3ONlqWnffi/5z+ovFOTu6HNZGnyHyTrntXuqPD9kGDHl7MTRoUge/yOzKgST/8b4+krOkRhSLYpih7twPKQhyuigyM1MMUmjUsStumbAZptA9UEHb0lDa4vHmFAh2YEhECtMXrqzAzeD X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 29 Oct 2026 16:51:28.1508 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: f0271769-db46-4212-248d-08df35dce05f X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.118.232];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN3PEPF00022BD5.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH9PR12MB962943 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20261029_095146_245912_70F64D89 X-CRM114-Status: GOOD ( 24.69 ) X-Spam-Score: -2.1 (--) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" X-Spam-Status: No, score=-5.9 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS autolearn=no autolearn_force=no version=4.0.1 X-Spam-Checker-Version: SpamAssassin 4.0.1 (2024-03-26) on aws-us-west-2-korg-listserv-alma10-1 On Thu, Oct 29, 2026 at 09:28:18AM -0300, Jason Gunthorpe wrote: > On Thu, Oct 29, 2026 at 10:05:05AM +0000, Shameer Kolothum Thodi wrote: > > > On Wed, Oct 28, 2026 at 09:35:09AM -0300, Jason Gunthorpe wrote: > > > > On Wed, Oct 28, 2026 at 09:49:53AM +0000, Shameer Kolothum Thodi > > > wrote: > > > > > > +static inline unsigned long rsi_arch_dev_activate(phys_addr_t base, > > > > > > + unsigned long dev_type) > > > > > > +{ > > > > > > + struct arm_smccc_res res; > > > > > > + > > > > > > + arm_smccc_1_1_invoke(SMC_RSI_ARCH_DEV_ACTIVATE, base, > > > > > > dev_type, &res); > > > > > > > > > > These calls leave unused input registers unspecified, whereas > > > > > DEN0137 bet3 B1.2 marks them SBZ. Could we explicitly zero them? > > > > > > > > > > "On calling an RMI or RSI command, any of X1- X16 which are not > > > > > specified as input values in the command definition SBZ" > > > > > > > > That seems too broad, Linux doesn't even support the x8-x16 inputs in > > > > the macros. I think the spec has errd here. > > > > > > > > Requiring zeroing of x0-x7 is sort of reasonable. Any future use of > > > > x8-x16 (including outputs) should require a direct opt in of the OS to > > > > indicate it supports this bank of registers. > > > > > > > > Otherwise you probably need a new macro helper for this protocol.. > > > > > > We could probably replace it with: > > > arm_smccc_smc(SMC_RSI_ARCH_DEV_ACTIVATE, base, dev_type, 0, > > > 0, 0, 0, 0, > > > &res); > > > > > > This should specify those unused inputs. > > > > Or we could use arm_smccc_1_2_smc() with zero initialized registers, as > > rsi_attestation_token_init() does. I think that would cover X8-X16 too. > > Yeah, that seems to be the right thing to do. > > > But other RSI wrappers don't do that consistently, so it's fine either > > way, I guess. > > Seems like a bug, with the spec being specific here it should be > fixed. I'll use arm_smccc_1_2_smc() in v2. Thanks Nicolin