Re: [PATCH] arm64: suspend: Save and restore TPIDR2_EL0 across CPU suspend

[Catalin Marinas <catalin.marinas@arm.com>]

On Tue, Nov 03, 2026 at 11:50:03AM +0000, Will Deacon wrote:
> On Mon, Nov 02, 2026 at 11:48:13PM +0000, Wei Wang wrote:
> > On systems with FEAT_SME, TPIDR2_EL0 is part of userspace thread state:
> > the AAPCS64 SME ABI uses it as the ZA lazy-save pointer, and the kernel
> > context-switches it eagerly in tls_thread_switch(). While a task is
> > running, the live register is the only copy of its value.

[...]

> There's a lot of unnecessary (AI-generated?) detail in here. Please can
> you trim this down a bit? I don't think we care about the firmware part,
> the stuff about idle or the bionic crash. The bottom line is that we're
> not saving/restoring a live EL0 register across suspend/resume.

I should get an LLM to trim it down when applying ;).

> > diff --git a/arch/arm64/mm/proc.S b/arch/arm64/mm/proc.S
> > index 7afbece885a3..c7b7fa6491c3 100644
> > --- a/arch/arm64/mm/proc.S
> > +++ b/arch/arm64/mm/proc.S
> > @@ -103,6 +103,10 @@ SYM_FUNC_START(cpu_do_suspend)
> >  alternative_if ARM64_HAS_TCR2
> >  	mrs	x2, REG_TCR2_EL1
> >  	str	x2, [x0, #104]
> > +alternative_else_nop_endif
> > +alternative_if ARM64_SME
> > +	mrs_s	x2, SYS_TPIDR2_EL0
> > +	str	x2, [x0, #112]
> >  alternative_else_nop_endif
> >  	ret
> >  SYM_FUNC_END(cpu_do_suspend)
> > @@ -142,6 +146,10 @@ alternative_if ARM64_HAS_TCR2
> >  	ldr	x2, [x0, #104]
> >  	msr	REG_TCR2_EL1, x2
> >  alternative_else_nop_endif
> > +alternative_if ARM64_SME
> > +	ldr	x2, [x0, #112]
> > +	msr_s	SYS_TPIDR2_EL0, x2
> > +alternative_else_nop_endif
> 
> nit: We use msr and REG_* for TCR2, so it would be more consistent to do
> the same for TPIDR2_EL0 if the assembler is happy with it.

TPIDR2 is not defined in arch/arm64/tools/sysreg yet (for some reason,
only TPIDR_EL1 is). Since this is a cc stable, I think we can leave it
as is and do a TPIDR* cleanup going forward.

-- 
Catalin