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Received: by smtp.zohomail.com with SMTPS id 1794323232230649.3017002854683; Tue, 10 Nov 2026 07:07:12 -0800 (PST) Received: by venus (Postfix, from userid 1000) id F2928180354; Tue, 10 Nov 2026 16:07:00 +0100 (CET) Date: Tue, 10 Nov 2026 16:07:00 +0100 From: Sebastian Reichel To: aiyengar1990@gmail.com Cc: Will Deacon , Robin Murphy , "Joerg Roedel (AMD)" , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Niklas Cassel , linux-arm-kernel@lists.infradead.org, iommu@lists.linux.dev, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org Subject: Re: [PATCH 5/5] arm64: dts: rockchip: add the clock of the RK3588 PCIe SMMU Message-ID: References: <20261110-smmu-v3-pcie-pd-v1-0-628819ca44b9@gmail.com> <20261110-smmu-v3-pcie-pd-v1-5-628819ca44b9@gmail.com> X-Archived-By: MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha512; protocol="application/pgp-signature"; boundary="qogk6fc2sep2osv7" Content-Disposition: inline In-Reply-To: <20261110-smmu-v3-pcie-pd-v1-5-628819ca44b9@gmail.com> X-Zoho-Virus-Status: 1 X-Zoho-AV-Stamp: zmail-av-0.2.13.1.5.4/294.310.16 X-ZohoMailClient: External X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20261110_070721_258253_C1182220 X-CRM114-Status: GOOD ( 17.26 ) X-Spam-Score: -2.1 (--) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" X-Spam-Status: No, score=-13.9 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=4.0.1 X-Spam-Checker-Version: SpamAssassin 4.0.1 (2024-03-26) on aws-us-west-2-korg-listserv-alma10-1 --qogk6fc2sep2osv7 Content-Type: text/plain; protected-headers=v1; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Subject: Re: [PATCH 5/5] arm64: dts: rockchip: add the clock of the RK3588 PCIe SMMU MIME-Version: 1.0 Hi, On Tue, Nov 10, 2026 at 07:11:52AM +0000, Arun Iyengar via B4 Relay wrote: > From: Arun Iyengar >=20 > The PCIe MMU-600 runs from ACLK_MMU_PCIE, which is also the parent of > the PCIe controllers' master clocks. When no PCIe controller is enabled, > nothing holds it and it gets gated as unused after boot, while > arm-smmu-v3 is still bound to the SMMU. >=20 > Describe the clock, so that the SMMU driver keeps it running. >=20 > Fixes: da92d3dfc871 ("arm64: dts: rockchip: enable the mmu600_pcie IOMMU = on the rk3588 SoC") > Signed-off-by: Arun Iyengar > --- Reviewed-by: Sebastian Reichel Greetings, -- Sebastian > arch/arm64/boot/dts/rockchip/rk3588-base.dtsi | 1 + > 1 file changed, 1 insertion(+) >=20 > diff --git a/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi b/arch/arm64/b= oot/dts/rockchip/rk3588-base.dtsi > index bcd342c025c9..8eed22ca69ab 100644 > --- a/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi > +++ b/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi > @@ -559,6 +559,7 @@ mmu600_pcie: iommu@fc900000 { > , > ; > interrupt-names =3D "eventq", "gerror", "priq", "cmdq-sync"; > + clocks =3D <&cru ACLK_MMU_PCIE>; > #iommu-cells =3D <1>; > power-domains =3D <&power RK3588_PD_PCIE>; > }; >=20 > --=20 > 2.55.0 >=20 >=20 >=20 --qogk6fc2sep2osv7 Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEE72YNB0Y/i3JqeVQT2O7X88g7+poFAmrzMxQACgkQ2O7X88g7 +po1iw/+OFyH6jhIzKzEZMOnmy8SjHGAN+RooTWnNJifq/F3ZE7c4/A9Uk/X9th/ 6LSsk7G9a4AGWIw2yDlZwOVfFQfJSU0AIOLFW6Zg5nF3wSzN9ekVQo0qmjikH3p0 r+y2ky33DRNMCwga0c4DtIP90Q21upZLMqt6cua9H33MYlQQfCSTgF5SG6bl+rgP bgTj7BviaNQ1yHIt5o+YqIh42NKkDHIcLblvQX5yz624FSllFxIfGvIy5aooivQ+ OowrZdVmISVkHddUNGSh4/9rpAui12Uub23j3d+hanqDu411/FpYUfI3y8vq/mD5 d70Q6g3IF0fQA0qFaWMmz5Qoq9kfrym7gtSK6VO1jl7IaDaXDFowZ8HlPpXob9Xi Q6MSzkKWDNbrs7wjtE5H3CAFIFNnIv4cvxiAOymC5BUmORGxjSbD4VFdRp5UoqLj /gI5DTwHZ94clngU2ll6gWCz5dtXzaJM8FBWKrYabJjLr02Hknt0uhxlu08t1RGp 2u/yxLBI43cm234G4Hvqi5j0fhtTyB3+fm1PjN1d5RCDT2nf9HiSbURkbsHAxhq0 hynlu0xr5vHGCsHJ/SIuB8POUIEfXTNZHK89o+rpnUdy5cmmgQvo2dvDWQN0/Yvo QsTol2p50KxkzF9YP17/r2Ff0oPJ6ekFAAC1RaDupSI2am+MP0s= =pXCf -----END PGP SIGNATURE----- --qogk6fc2sep2osv7--