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Nov 2026 11:05:35 +0200 From: Vladimir Oltean To: vjardin@free.fr Cc: Dong Aisheng , Fabio Estevam , Frank Li , Jacky Bai , Pengutronix Kernel Team , NXP S32 Linux Team , Linus Walleij , Rob Herring , Krzysztof Kozlowski , Conor Dooley , "Christophe Leroy (CS GROUP)" , Shawn Guo , Sascha Hauer , linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, linux-arm-kernel@lists.infradead.org, imx@lists.linux.dev, Ioana Ciornei Subject: Re: [PATCH v4 4/5] pinctrl: freescale: add the LX2160A RCW pad-mux driver Message-ID: References: <20261114-for-upstream-lx2160a-rcw-pinmux-v1-v4-0-eefcea066a55@free.fr> <20261114-for-upstream-lx2160a-rcw-pinmux-v1-v4-0-eefcea066a55@free.fr> <20261114-for-upstream-lx2160a-rcw-pinmux-v1-v4-4-eefcea066a55@free.fr> <20261114-for-upstream-lx2160a-rcw-pinmux-v1-v4-4-eefcea066a55@free.fr> Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: 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List-Subscribe: , Sender: "linux-arm-kernel" X-Spam-Status: No, score=-15.9 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=4.0.1 X-Spam-Checker-Version: SpamAssassin 4.0.1 (2024-03-26) on aws-us-west-2-korg-listserv-alma10-1 On Sat, Nov 14, 2026 at 10:12:31AM +0100, Vincent Jardin via B4 Relay wrote: > From: Vincent Jardin > > The LX2160A muxes its IIC, XSPI, SDHC, UART, IRQ and EVT pads from > fields of the RCW, read-only in RCWSR12..14 of DCFG and changed at > runtime through the same fields of the override registers in its DCSR > view, which read 0 until written. > > Since commit 8a1365c7bbc1 ("arm64: dts: lx2160a: add pinmux and i2c > gpio to support bus recovery") Linux drives them with pinctrl-single on > the override registers, so its first pin state clears every other field > of the word: a board whose RCW programs a non-zero pad mux loses those > pads at the first I2C probe. > > Add a driver for the pad mux as a child of the DCFG node: the fields > of RCWSR12..14 and their encoding. > Then pin states select them with the generic function and groups > properties, and every change goes through the RCW override > of fsl-guts, which reads the status register, writes the override and > waits for the status register to follow. > > Signed-off-by: Vincent Jardin > --- > MAINTAINERS | 8 + > drivers/pinctrl/freescale/Kconfig | 15 ++ > drivers/pinctrl/freescale/Makefile | 1 + > drivers/pinctrl/freescale/pinctrl-lx2160a.c | 368 ++++++++++++++++++++++++++++ > 4 files changed, 392 insertions(+) > > diff --git a/MAINTAINERS b/MAINTAINERS > index 93abbb315065..106a0cc7f25c 100644 > --- a/MAINTAINERS > +++ b/MAINTAINERS > @@ -20207,6 +20207,14 @@ F: Documentation/devicetree/bindings/clock/*imx* > F: drivers/clk/imx/ > F: include/dt-bindings/clock/*imx* > > +NXP LX2160A RCW PAD-MUX DRIVER > +M: Vincent Jardin > +L: linux-gpio@vger.kernel.org > +L: imx@lists.linux.dev > +S: Maintained > +F: Documentation/devicetree/bindings/pinctrl/fsl,lx2160a-rcw-pinmux.yaml > +F: drivers/pinctrl/freescale/pinctrl-lx2160a.c > + > NXP NETC ETHERNET SWITCH DRIVER > M: Wei Fang > R: Clark Wang > diff --git a/drivers/pinctrl/freescale/Kconfig b/drivers/pinctrl/freescale/Kconfig > index fd53cf5bb843..a3222714c970 100644 > --- a/drivers/pinctrl/freescale/Kconfig > +++ b/drivers/pinctrl/freescale/Kconfig > @@ -283,3 +283,18 @@ config PINCTRL_IMXRT1170 > select PINCTRL_IMX > help > Say Y here to enable the imxrt1170 pinctrl driver > + > +config PINCTRL_LX2160A > + bool "NXP LX2160A RCW pad-mux driver" > + depends on OF > + depends on ARCH_LAYERSCAPE || COMPILE_TEST > + default ARCH_LAYERSCAPE > + select FSL_GUTS > + select GENERIC_PINCTRL_GROUPS > + select GENERIC_PINMUX_FUNCTIONS > + select GENERIC_PINCONF > + help > + Say Y here to mux the IIC, XSPI, SDHC, UART, IRQ and EVT pads of the > + LX2160A at runtime. The pads are muxed by fields of the RCW: > + the driver changes it in the DCSR view of the DCFG that fsl-guts > + drives, and is what the I2C bus recovery of the LX2160A needs. I'm sorry if this was discussed before, but did you consider targeting a wider range of Layerscape SoCs with this driver? It's pretty generic apart from the pinmux functions and groups, which are all data, not code. For example LS1028A, which is part of the same chassis 3.2 as LX2160A, has a pretty similar pinmux group layout (subset of LX2160A except for SoC-specific pinmuxing in RCWSR27). The functions are a superset of LX2160A though (for example IIC3_PMUX and IIC4_PMUX can also take the values of 3 and 4). The older chassis have a dissimilar layout to LX2160A/LS1028A, but similar among themselves (they have a two-level I2C_EXT + I2C_BASE system), and their core mechanism remains through the same RCW override API. I'm not saying to add driver support for those other platforms, but to have them in mind and to leave some space so that they could be added to the same driver without having to rename it and most of the code.