From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3F74EC433F5 for ; Fri, 28 Jan 2022 17:22:19 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:Date: Message-ID:From:References:Cc:To:Subject:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=djR2ByJJuxc3O0JNPJVQf8h0Hy6cenTBCuVHve+QHUc=; b=BSaoIFO1dmRN2e8tApF5Zs3/t7 UsIzJqpNEWhyivFBvjMsxu1cez0vdo9FDZWgru+pXS/NV2yaYYZI6BQgrMdzKHQ67CmYcNwBMU6ff nJuyJjAZJyVHudk1LQl7+617cGXlDXg4227ZUER7GuhXGcTGFxgjIXosZqwaUKqPaur7ReSM6NpYS 2pUWQmOFb7H/LsDbSddOxifNW6WyZQ4hh8yK+mDL+TG5iykabN08NLdq8akz63tnBwghpetK6eb5H 90cfDSjWP5e7zLjN9ACN/+65cQLhnUuGojd/iB5onDCjjL1jGZyDTqlesTFJpQuumxC4XaQLtTrVe EM05K5EQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nDUvq-003CNP-GB; Fri, 28 Jan 2022 17:21:06 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nDUvm-003CLU-8n for linux-arm-kernel@lists.infradead.org; Fri, 28 Jan 2022 17:21:03 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id C20AE113E; Fri, 28 Jan 2022 09:20:59 -0800 (PST) Received: from [10.57.86.104] (unknown [10.57.86.104]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 916063F793; Fri, 28 Jan 2022 09:20:54 -0800 (PST) Subject: Re: [PATCH 2/2] perf arm-spe: Parse more SPE fields and store source To: Ali Saidi , linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: benh@kernel.crashing.org, Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , John Garry , Will Deacon , Mathieu Poirier , Leo Yan , James Clark , Andrew Kilroy References: <20220125192016.20538-1-alisaidi@amazon.com> <20220125192016.20538-3-alisaidi@amazon.com> From: German Gomez Message-ID: Date: Fri, 28 Jan 2022 17:20:23 +0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.14.0 MIME-Version: 1.0 In-Reply-To: <20220125192016.20538-3-alisaidi@amazon.com> Content-Language: en-US X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220128_092102_486628_AC59E0DB X-CRM114-Status: GOOD ( 21.24 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Ali, On 25/01/2022 19:20, Ali Saidi wrote: > Decode more SPE events and op types to allow for processing by perf > scripts. For example looking for branches which may indicate candidates > for conversion to a CSEL, store exclusives that are candidates for > conversion to LSE atomics and record the source information for memory > ops. > > Signed-off-by: Ali Saidi > --- > .../util/arm-spe-decoder/arm-spe-decoder.c | 18 ++++++++++++++++++ > .../util/arm-spe-decoder/arm-spe-decoder.h | 8 ++++++++ > 2 files changed, 26 insertions(+) > > diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-decoder.c b/tools/perf/util/arm-spe-decoder/arm-spe-decoder.c > index 5e390a1a79ab..177bac0f7128 100644 > --- a/tools/perf/util/arm-spe-decoder/arm-spe-decoder.c > +++ b/tools/perf/util/arm-spe-decoder/arm-spe-decoder.c > @@ -191,6 +191,20 @@ static int arm_spe_read_record(struct arm_spe_decoder *decoder) > decoder->record.op = ARM_SPE_ST; > else > decoder->record.op = ARM_SPE_LD; > + if (SPE_OP_PKT_IS_LDST_ATOMIC(payload)) { > + if (payload & SPE_OP_PKT_AT) > + decoder->record.op |= ARM_SPE_LDST_ATOMIC; In "utils/arm-spe.c" we check "if (record->op == ARM_SPE_LD)" so this ORing could break some of the generated samples. > + if (payload & SPE_OP_PKT_EXCL) > + decoder->record.op |= ARM_SPE_LDST_EXCL; > + if (payload & SPE_OP_PKT_AR) > + decoder->record.op |= ARM_SPE_LDST_ACQREL; > + } > + } else if (idx == SPE_OP_PKT_HDR_CLASS_BR_ERET) { > + decoder->record.op = ARM_SPE_BR; > + if (payload & SPE_OP_PKT_COND) > + decoder->record.op |= ARM_SPE_BR_COND; > + if (SPE_OP_PKT_IS_INDIRECT_BRANCH(payload)) > + decoder->record.op |= ARM_SPE_BR_IND; > } > break; > case ARM_SPE_EVENTS: > @@ -218,8 +232,12 @@ static int arm_spe_read_record(struct arm_spe_decoder *decoder) > if (payload & BIT(EV_MISPRED)) > decoder->record.type |= ARM_SPE_BRANCH_MISS; > > + if (payload & BIT(EV_NOT_TAKEN)) > + decoder->record.type |= ARM_SPE_BR_NOT_TAKEN; > + > break; > case ARM_SPE_DATA_SOURCE: > + decoder->record.source = payload; > break; > case ARM_SPE_BAD: > break; > diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-decoder.h b/tools/perf/util/arm-spe-decoder/arm-spe-decoder.h > index 69b31084d6be..113e427afe99 100644 > --- a/tools/perf/util/arm-spe-decoder/arm-spe-decoder.h > +++ b/tools/perf/util/arm-spe-decoder/arm-spe-decoder.h > @@ -22,11 +22,18 @@ enum arm_spe_sample_type { > ARM_SPE_TLB_MISS = 1 << 5, > ARM_SPE_BRANCH_MISS = 1 << 6, > ARM_SPE_REMOTE_ACCESS = 1 << 7, > + ARM_SPE_BR_NOT_TAKEN = 1 << 8, Can you rename it to ARM_SPE_BRANCH_NOT_TAKEN for consistency? > }; > > enum arm_spe_op_type { > ARM_SPE_LD = 1 << 0, > ARM_SPE_ST = 1 << 1, > + ARM_SPE_LDST_EXCL = 1 << 2, > + ARM_SPE_LDST_ATOMIC = 1 << 3, > + ARM_SPE_LDST_ACQREL = 1 << 4, > + ARM_SPE_BR = 1 << 5, > + ARM_SPE_BR_COND = 1 << 6, > + ARM_SPE_BR_IND = 1 << 7, I'm not sure if we should keep everything in one enum/bitmask. I'm also looking at adding more of the data from the packets to the record, and considering refactoring the record structure. I'll share here when I have something. Thanks, German > }; > > struct arm_spe_record { > @@ -40,6 +47,7 @@ struct arm_spe_record { > u64 virt_addr; > u64 phys_addr; > u64 context_id; > + u16 source; > }; > > struct arm_spe_insn; _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel