public inbox for linux-arm-kernel@lists.infradead.org
 help / color / mirror / Atom feed
From: "Yingchao Deng (Consultant)" <quic_yingdeng@quicinc.com>
To: Leo Yan <leo.yan@arm.com>,
	Yingchao Deng <yingchao.deng@oss.qualcomm.com>
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>,
	Mike Leach <mike.leach@arm.com>,
	James Clark <james.clark@linaro.org>,
	"Alexander Shishkin" <alexander.shishkin@linux.intel.com>,
	<coresight@lists.linaro.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>, <linux-arm-msm@vger.kernel.org>,
	Jinlong Mao <jinlong.mao@oss.qualcomm.com>,
	Tingwei Zhang <tingwei.zhang@oss.qualcomm.com>,
	Jie Gan <jie.gan@oss.qualcomm.com>
Subject: Re: [PATCH v8 1/4] coresight: cti: Convert trigger usage fields to dynamic bitmaps and arrays
Date: Tue, 28 Apr 2026 10:25:11 +0800	[thread overview]
Message-ID: <b20a2f7c-4838-408f-94ed-ee9656d451c4@quicinc.com> (raw)
In-Reply-To: <20260427165913.GA16537@e132581.arm.com>


On 4/28/2026 12:59 AM, Leo Yan wrote:
> On Sun, Apr 26, 2026 at 05:44:38PM +0800, Yingchao Deng wrote:
>
> [...]
>
>> @@ -316,23 +316,33 @@ static int cti_plat_process_filter_sigs(struct cti_drvdata *drvdata,
>>   {
>>   	struct cti_trig_grp *tg = NULL;
>>   	int err = 0, nr_filter_sigs;
>> +	int nr_trigs = drvdata->config.nr_trig_max;
>>   
>>   	nr_filter_sigs = cti_plat_count_sig_elements(fwnode,
>>   						     CTI_DT_FILTER_OUT_SIGS);
>>   	if (nr_filter_sigs == 0)
>>   		return 0;
>>   
>> -	if (nr_filter_sigs > drvdata->config.nr_trig_max)
>> +	if (nr_filter_sigs > nr_trigs)
>>   		return -EINVAL;
>>   
>>   	tg = kzalloc_obj(*tg);
>>   	if (!tg)
>>   		return -ENOMEM;
>>   
>> +	tg->used_mask = bitmap_zalloc(nr_trigs, GFP_KERNEL);
> Here would be:
>
>    tg->used_mask = bitmap_zalloc(nr_filter_sigs, GFP_KERNEL);
"nr_filter_sigs" is the count of entries in the DT property array, if 
the DT property is:
     arm,trig-filters = <22 23>;
Here nr_filter_sigs=2, so bitmap_zalloc(2) allocates only 1 unsigned long
(64 bits). set_bit(22/23, used_mask) still fits, but it's logically an 
OOB, and any index >=64 would
write past the end.
>> +	if (!tg->used_mask) {
>> +		kfree(tg);
>> +		return -ENOMEM;
>> +	}
>> +
> It is likely this will have merge conflict with the new patch [1].
>
> You might need to rebase this patch on the top of [1]. We need to
> give [1] priority as it is a fix.
>
> [1] https://lore.kernel.org/linux-arm-kernel/20260426-nr_sigs-v1-1-3b9df99dab97@oss.qualcomm.com/
>
> Otherwise, LGTM:
>
> Reviewed-by: Leo Yan <leo.yan@arm.com>

Will update.

Thanks,
Yingchao



  reply	other threads:[~2026-04-28  2:25 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-04-26  9:44 [PATCH v8 0/4] Add Qualcomm extended CTI support Yingchao Deng
2026-04-26  9:44 ` [PATCH v8 1/4] coresight: cti: Convert trigger usage fields to dynamic bitmaps and arrays Yingchao Deng
2026-04-27  1:48   ` Jie Gan
2026-04-27  2:47     ` Jie Gan
2026-04-27 16:59   ` Leo Yan
2026-04-28  2:25     ` Yingchao Deng (Consultant) [this message]
2026-04-28  6:33       ` Leo Yan
2026-04-26  9:44 ` [PATCH v8 2/4] coresight: cti: encode trigger register index in register offsets Yingchao Deng
2026-04-27  2:22   ` Jie Gan
2026-04-27  3:36     ` Yingchao Deng (Consultant)
2026-04-27 17:48   ` Leo Yan
2026-04-28  2:16     ` Yingchao Deng (Consultant)
2026-04-26  9:44 ` [PATCH v8 3/4] coresight: cti: add Qualcomm extended CTI identification and quirks Yingchao Deng
2026-04-27  7:39   ` Jie Gan
2026-04-27  7:42     ` Yingchao Deng (Consultant)
2026-04-26  9:44 ` [PATCH v8 4/4] coresight: cti: expose banked sysfs registers for Qualcomm extended CTI Yingchao Deng
2026-04-27 18:15   ` Leo Yan
2026-04-28  2:18     ` Yingchao Deng (Consultant)

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=b20a2f7c-4838-408f-94ed-ee9656d451c4@quicinc.com \
    --to=quic_yingdeng@quicinc.com \
    --cc=alexander.shishkin@linux.intel.com \
    --cc=coresight@lists.linaro.org \
    --cc=james.clark@linaro.org \
    --cc=jie.gan@oss.qualcomm.com \
    --cc=jinlong.mao@oss.qualcomm.com \
    --cc=leo.yan@arm.com \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-arm-msm@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=mike.leach@arm.com \
    --cc=suzuki.poulose@arm.com \
    --cc=tingwei.zhang@oss.qualcomm.com \
    --cc=yingchao.deng@oss.qualcomm.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox