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Wed, 8 Jan 2025 22:31:32 GMT Received: from smtpav06.wdc07v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 263FE5806B; Wed, 8 Jan 2025 22:31:32 +0000 (GMT) Received: from smtpav06.wdc07v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 5DC925804E; Wed, 8 Jan 2025 22:31:29 +0000 (GMT) Received: from [9.61.139.65] (unknown [9.61.139.65]) by smtpav06.wdc07v.mail.ibm.com (Postfix) with ESMTP; Wed, 8 Jan 2025 22:31:29 +0000 (GMT) Message-ID: Date: Wed, 8 Jan 2025 16:31:28 -0600 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 05/10] ARM: dts: aspeed: system1: Add RGMII support To: Andrew Lunn , Jacky Chou Cc: "andrew+netdev@lunn.ch" , "andrew@codeconstruct.com.au" , "conor+dt@kernel.org" , "davem@davemloft.net" , "devicetree@vger.kernel.org" , "eajames@linux.ibm.com" , "edumazet@google.com" , "joel@jms.id.au" , "krzk+dt@kernel.org" , "kuba@kernel.org" , "linux-arm-kernel@lists.infradead.org" , "linux-aspeed@lists.ozlabs.org" , "linux-kernel@vger.kernel.org" , "minyard@acm.org" , "netdev@vger.kernel.org" , "openipmi-developer@lists.sourceforge.net" , "pabeni@redhat.com" , "ratbert@faraday-tech.com" , "robh@kernel.org" References: <0c42bbd8-c09d-407b-8400-d69a82f7b248@lunn.ch> Content-Language: en-US From: Ninad Palsule In-Reply-To: <0c42bbd8-c09d-407b-8400-d69a82f7b248@lunn.ch> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: uaFUIc6cD4X9PAgDaJFKrNEJKqlvTD0C X-Proofpoint-GUID: 6xbf0HjJ6pVuQmMW_ljUl1BLsijg_a4W X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1051,Hydra:6.0.680,FMLib:17.12.62.30 definitions=2024-10-15_01,2024-10-11_01,2024-09-30_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 impostorscore=0 spamscore=0 phishscore=0 suspectscore=0 lowpriorityscore=0 mlxlogscore=999 bulkscore=0 mlxscore=0 malwarescore=0 adultscore=0 priorityscore=1501 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2411120000 definitions=main-2501080184 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250108_143256_286260_8FC9DC38 X-CRM114-Status: GOOD ( 32.90 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hello Andrew & Jacky, On 1/8/25 11:52, Andrew Lunn wrote: >>> Does the mac0 TX clock have an extra long clock line on the PCB? >>> >>> Does the mac1 TX and RX clocks have extra long clock lines on the PCB? >>> >>> Anything but rgmii-id is in most cases wrong, so you need a really >>> good explanation why you need to use something else. Something that >>> shows you understand what is going on, and why what you have is >>> correct. >> Here I'll add some explanation. >> >> In our design, we hope the TX and RX RGMII delay are configured by our MAC side. >> We can control the TX/RX RGMII delay on MAC step by step, it is not a setting to delay to 2 ns. >> We are not sure the all target PHYs are support for RX internal delay. >> >> But ast2600 MAC1/2 delay cell cannot cover range to 2 ns, MAC 3/4 can do that. >> Therefore, when using ast2600 MAC1/2, please enable the RX internal delay on the PHY side >> to make up for the part we cannot cover. >> >> Summarize our design and we recommend. >> AST2600 MAC1/2: rgmii-rxid >> (RGMII with internal RX delay provided by the PHY, the MAC should not add an RX delay in this >> case) >> AST2600 MAC3/4: rgmii >> (RX and TX delays are added by the MAC when required) >> >> rgmii and rgmii-rxid are referred from ethernet-controller.yaml file. > O.K, so you have the meaning of phy-mode wrong. phy-mode effectively > described the PCB. Does the PCB implement the 2ns delay via extra long > clock lines or not. If the PCB has long clock lines, phy-mode is > 'rgmii'. If the PCB does not have long clock lines, 'rgmii-id' is > used, meaning either the MAC or the PHY needs to add the delays. > > The MAC driver is the one that reads the phy-mode from the DT, and > then it decides what to do. 95% of linux MAC drivers simply pass it > direct to the PHY. If the phy-mode is 'rgmii', the PHY does nothing, > because the PCB has added the delays. If it is rgmii-id, it adds > delays in both directions. This works, because nearly very RGMII PHY > on the market does support RGMII delays. > > There is however a very small number of MAC drivers which do things > differently. Renesas produced an RDK with a PHY which could not do > delays in the PHY, and so were forced to do the delays in the > MAC. Please look at how the ravb driver works. If the PCB does not add > the delays, rmgii-id, the MAC driver adds the delays. It then masks > the phy-mode it passes to of_phy_connect() back to 'rgmii', so that > the PHY does not add any delays. If the PCB did add the delays, > 'rgmii', the MAC driver does not add delays, and it passed rgmii to > the PHY driver, and it also does not add delays. > > So, your MAC driver is broken. It is not correctly handling the > phy-mode. First question is, how many boards are there in mainline > which have broken phy-modes. If this is the first board, we can fix > the MAC driver. If there are already boards in mainline we have to be > much more careful when fixing this, so as not to regress boards which > are already merged. There are around 11 boards in Aspeed SOC with phy-mode set to "rgmii" (some of them are mac0&1 and others are mac2&3). "rgmii-rxid" is only mine. No one in aspeed SOC using "rgmii-id". > > Humm, interesting. Looking at ftgmac100.c, i don't see where you > configure the RGMII delays in the MAC? > > Andrew >