From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.0 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 97D87C43381 for ; Thu, 7 Mar 2019 13:36:18 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 687E220684 for ; Thu, 7 Mar 2019 13:36:18 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="CPpk8NHb" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 687E220684 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=bootlin.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Date:To:From:Subject:Message-ID:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=fNx/6dETYhdIVmwr6Lf4GtLb62+9GNWOQ1CNIrBq5Qg=; b=CPpk8NHbDBhamF QNNwM9SFiBfyV0wn3uGkInlqjdAd4SMJzyMEK4/+4MqzSd0JQ9FTHocg+H8FcURzdljnbc3e1CRlB 0CY05uoKECPIpiXWLtTe9iTckMSNVg6wtCTQTJCNz9eJztiDIIHejzFYVUMKP75zbHggv8uIsAPqH 6LTgvj2O5rgVmRq6xEXrDBCA2Fj1AFPjSOJYEjyLqJJ/YEoX1dciNmVnWmQlKZELxwKvmiiqDjeu4 XEoOA1vtALn2mD+viIz5CuVDv4iNY4hK4KqPcL2nMkIc1Wwm5IMaD6YqrWxog/cEvWkVRHQMKQnky arR8WJbSUG3cWvMUVmyw==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1h1tBy-0004CE-T3; Thu, 07 Mar 2019 13:36:10 +0000 Received: from relay8-d.mail.gandi.net ([217.70.183.201]) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1h1tBt-0004AF-Ng for linux-arm-kernel@lists.infradead.org; Thu, 07 Mar 2019 13:36:09 +0000 X-Originating-IP: 90.88.150.179 Received: from aptenodytes (aaubervilliers-681-1-31-179.w90-88.abo.wanadoo.fr [90.88.150.179]) (Authenticated sender: paul.kocialkowski@bootlin.com) by relay8-d.mail.gandi.net (Postfix) with ESMTPSA id F26C61BF213; Thu, 7 Mar 2019 13:36:02 +0000 (UTC) Message-ID: Subject: Re: [PATCH 4/4] drm/sun4i: rgb: Change the pixel clock validation check From: Paul Kocialkowski To: Maxime Ripard , Chen-Yu Tsai Date: Thu, 07 Mar 2019 14:36:02 +0100 In-Reply-To: References: Organization: Bootlin User-Agent: Evolution 3.30.5 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190307_053606_202714_5B262A0E X-CRM114-Status: GOOD ( 30.22 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Sean Paul , Maarten Lankhorst , linux-arm-kernel@lists.infradead.org, dri-devel@lists.freedesktop.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi, On Tue, 2019-02-26 at 15:25 +0100, Maxime Ripard wrote: > The current code, since commit bb43d40d7c83 ("drm/sun4i: rgb: Validate the > clock rate"), perform some validation on the pixel clock to filter out the > EDID modes provided by monitors (through bridges) that we wouldn't be able > to reach. For the usual modes, we're able to generate a perfect clock rate, > so a strict check was enough. > > However, this had the side effect of preventing displays that would work > otherwise to operate properly, since we would pretty much never be able to > generate an exact rate for those displays, even though we would fall within > that panel tolerance. > > This was also shown to happen for unusual modes exposed through EDIDs, for > example on eDP panels. > > We can work around this by simplifying a bit the problem: no panels we've > encountered so far actually needed that check. All of them are tied to a > particular board when it is produced, and made to work with the Allwinner > BSP. That pretty much guarantees that we never have a pixel clock out of > reach. > > On the other hand, the EDIDs modes that needed to be validated have always > been exposed through bridges. > > Let's just use that metric to instead of validating all modes, only > validate modes when we have a bridge attached. It should be good enough for > now, while we still have room for improvements or refinements using the > display_timings structure for example for panels. > > We also add a tolerance for EDID-based modes instead of doing a strict > check. This tolerance is of 0.5% which is the one advertised in the VESA > DVT and CVT specs. If that needed to be extended in the future, we can add > a custom module parameter to relax it a bit. > > Fixes: bb43d40d7c83 ("drm/sun4i: rgb: Validate the clock rate") > Signed-off-by: Maxime Ripard With the define fixed and given the comment below, this is: Reviewed-by: Paul Kocialkowski > --- > drivers/gpu/drm/sun4i/sun4i_rgb.c | 37 ++++++++++++++++++++++++++++++-- > 1 file changed, 35 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/sun4i/sun4i_rgb.c b/drivers/gpu/drm/sun4i/sun4i_rgb.c > index 893b6e6d4d85..05beefe93989 100644 > --- a/drivers/gpu/drm/sun4i/sun4i_rgb.c > +++ b/drivers/gpu/drm/sun4i/sun4i_rgb.c > @@ -53,6 +53,14 @@ static int sun4i_rgb_get_modes(struct drm_connector *connector) > return drm_panel_get_modes(rgb->panel); > } > > +/* > + * VESA DMT defines a tolerance of 0.5% on the pixel clock, while the > + * CVT spec reuses that tolerance in its examples, so it looks to be a > + * good default tolerance for the EDID-based modes. Define it to 5 per > + * mille to avoid floating point operations. > + */ > +DEFINE SUN4I_RGB_DOTCLOCK_TOLERANCE 5 It could be nice to have some kind of unit made explicit in the define. Maybe something like SUN4I_RGB_DOTCLOCK_TOLERANCE_PER_THOUSAND. That's just a suggestion, feel free to take it or leave it :) Cheers, Paul > + > static enum drm_mode_status sun4i_rgb_mode_valid(struct drm_encoder *crtc, > const struct drm_display_mode *mode) > { > @@ -61,6 +69,7 @@ static enum drm_mode_status sun4i_rgb_mode_valid(struct drm_encoder *crtc, > u32 hsync = mode->hsync_end - mode->hsync_start; > u32 vsync = mode->vsync_end - mode->vsync_start; > unsigned long long rate = mode->clock * 1000; > + unsigned long long lowest, highest; > unsigned long long rounded_rate; > > DRM_DEBUG_DRIVER("Validating modes...\n"); > @@ -93,15 +102,39 @@ static enum drm_mode_status sun4i_rgb_mode_valid(struct drm_encoder *crtc, > > DRM_DEBUG_DRIVER("Vertical parameters OK\n"); > > + /* > + * TODO: We should use the struct display_timing if available > + * and / or trying to stretch the timings within that > + * tolerancy to take care of panels that we wouldn't be able > + * to have a exact match for. > + */ > + if (rgb->panel) { > + DRM_DEBUG_DRIVER("RGB panel used, skipping clock rate checks"); > + goto out; > + } > + > + /* > + * That shouldn't ever happen unless something is really wrong, but it > + * doesn't harm to check. > + */ > + if (!rgb->bridge) > + goto out; > + > tcon->dclk_min_div = 6; > tcon->dclk_max_div = 127; > rounded_rate = clk_round_rate(tcon->dclk, rate); > - if (rounded_rate < rate) > + > + lowest = rate * (1000 - SUN4I_RGB_DOTCLOCK_TOLERANCE); > + do_div(lowest, 1000); > + if (rounded_rate < lowest) > return MODE_CLOCK_LOW; > > - if (rounded_rate > rate) > + highest = rate * (1000 + SUN4I_RGB_DOTCLOCK_TOLERANCE); > + do_div(highest, 1000); > + if (rounded_rate > highest) > return MODE_CLOCK_HIGH; > > +out: > DRM_DEBUG_DRIVER("Clock rate OK\n"); > > return MODE_OK; -- Paul Kocialkowski, Bootlin Embedded Linux and kernel engineering https://bootlin.com _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel