From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id EA795CFD35C for ; Fri, 11 Oct 2024 12:00:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: Content-Type:In-Reply-To:From:References:Cc:To:Subject:MIME-Version:Date: Message-ID:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=+UGdNzoVhustoJTF+QCSj0GHJ2kv3Y5c4vumVaqUSso=; b=Z2LAAInUDVdAivQyj02d4HSdU9 z0s+wCVbX57AIchsYDRgo4kRkmpYy19TSs17bCPiRmDs9/lKXWlWhZ6VjQV94uIxLzTTAWi3afCUQ YgoU2Lb9fJX1AkWiHmWfAXc6rR+Ue+0sD6ctTFcAfjbb2R2FQEMAQla7kLvaeCuhjJKSdhCIAydqk egSKt0pBfABoG4mg/x9RisuJS5Whayzl11T/1ij/ersX0Up2W1rQztzrt55Fu83cyzAPFAhKqibCz MaYuXcIqzY8qrMA9Q8LnKjKUvnIEi6nRgvJ7k+0u8RJjT3EiWKWA6Vy1zK3s18YoG0DlhZR0nMMc5 qP3+/DHA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1szEK4-0000000GCW4-0uHs; Fri, 11 Oct 2024 12:00:44 +0000 Received: from phobos.denx.de ([2a01:238:438b:c500:173d:9f52:ddab:ee01]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1szEIh-0000000GCOd-49xp for linux-arm-kernel@lists.infradead.org; Fri, 11 Oct 2024 11:59:21 +0000 Received: from [127.0.0.1] (p578adb1c.dip0.t-ipconnect.de [87.138.219.28]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: marex@denx.de) by phobos.denx.de (Postfix) with ESMTPSA id 70F56892B6; Fri, 11 Oct 2024 13:59:15 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=denx.de; s=phobos-20191101; t=1728647957; bh=+UGdNzoVhustoJTF+QCSj0GHJ2kv3Y5c4vumVaqUSso=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=kofujvp4rqbgaQPi63LTtT7uzTnnoJOgLXlhAnRYIvofKSV2LnNaz3j2EG0yXZwSj e7oYLr6a/4xdD7+emFgRGAB8IokGUzp1k6dV//foRgF1U5FJmYyE+nJQ5tBE2tWsbB ue4VvP3RhNcNHl9kkawTCUmdUZB6K4O0Mt0PYyqRN6IXOru/AAqUfj49C6GFoIEJRw EJawpySVVkqDJSvXxEza9IMFLNJUGWVrQjhJnMHSjU7OE3kZHf7ybrnpOANEnt1X+5 Chs41k+2jqYz/LWcze1I4deLnJ5HqRb3Ko1L5MSb35qJCSahfiiad1SYPReoYoHgCy B/ue0/qkjcKsQ== Message-ID: Date: Fri, 11 Oct 2024 13:24:38 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 2/4] hwrng: stm32 - implement support for STM32MP25x platforms To: Gatien CHEVALLIER , Olivia Mackall , Herbert Xu , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maxime Coquelin , Alexandre Torgue Cc: =?UTF-8?Q?Uwe_Kleine-K=C3=B6nig?= , Lionel Debieve , linux-crypto@vger.kernel.org, devicetree@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Yang Yingliang References: <20241007132721.168428-1-gatien.chevallier@foss.st.com> <20241007132721.168428-3-gatien.chevallier@foss.st.com> <2fad1566-49f9-4586-b0d4-8a4a12f9e69e@denx.de> <9283caeb-1b84-43c2-a8a4-6b43a6962f34@foss.st.com> Content-Language: en-US From: Marek Vasut In-Reply-To: <9283caeb-1b84-43c2-a8a4-6b43a6962f34@foss.st.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241011_045920_217228_E758277A X-CRM114-Status: GOOD ( 13.46 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 10/11/24 11:55 AM, Gatien CHEVALLIER wrote: > > > On 10/7/24 15:54, Marek Vasut wrote: >> On 10/7/24 3:27 PM, Gatien Chevallier wrote: >>> Implement the support for STM32MP25x platforms. On this platform, a >>> security clock is shared between some hardware blocks. For the RNG, >>> it is the RNG kernel clock. Therefore, the gate is no more shared >>> between the RNG bus and kernel clocks as on STM32MP1x platforms and >>> the bus clock has to be managed on its own. >>> >>> Signed-off-by: Gatien Chevallier >> A bit of a higher-level design question -- can you use drivers/clk/ >> clk-bulk.c clk_bulk_*() to handle all these disparate count of clock >> easily ? > > Hi, I'd like to make sure that we enable the core clock before the bus > clock so that the RNG hardware block can start its internal tests while > we ungate the bus clock. It's not a strong opinion but it feels better. Maybe this could still work if the struct clk_bulk_data {} is ordered that way, so the bus clock are first, and the rest afterward ?