From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-11.3 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,NICE_REPLY_A,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B1B09C388F7 for ; Tue, 10 Nov 2020 09:32:54 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 323CE20780 for ; Tue, 10 Nov 2020 09:32:54 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="TRcWWOCS" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 323CE20780 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Type: Content-Transfer-Encoding:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:Date:Message-ID:From: References:To:Subject:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=88a/53b3KEJcb0JilOX6x1KWsbsFmwlqatWbSfZnryY=; b=TRcWWOCS+j9opZaM8m9rnq3cV 5rpWDCsOwhmvjHLL5GAAdaT0tLDuRL3W+4emsIJEbtQeJaAUbyny+V4xXowf8Z20KySxyThoxeWUE AUi/JomKEjwnlfE0rCilQURhhslsGEIk8JmFf/Mm5cSlVX4cvaTAiS/i3uQuYasOXGpMynBuHnNxz c9pLPsurj5QWC5WuYpBr09caNtrpJRRJhf5R0+wKj7uhEjhmcUuH2SYruw+QaGueohPLNcadsLOBo kq5xbxyBt7/4uFimtNiZBDhnQ1+1vuQSiRv9Q3lKzQeAnLXSmymO6Az6wpt7ceOCYRBqV3cf4pHIL zSPgbXRgA==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kcQ0H-0004NJ-B8; Tue, 10 Nov 2020 09:31:53 +0000 Received: from foss.arm.com ([217.140.110.172]) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kcQ0F-0004MT-3w for linux-arm-kernel@lists.infradead.org; Tue, 10 Nov 2020 09:31:51 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 840DBD6E; Tue, 10 Nov 2020 01:31:50 -0800 (PST) Received: from [10.57.23.123] (unknown [10.57.23.123]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 3833A3F6CF; Tue, 10 Nov 2020 01:31:49 -0800 (PST) Subject: Re: [PATCH v3 23/26] coresight: etm4x: Detect system instructions support To: Mathieu Poirier References: <20201028220945.3826358-1-suzuki.poulose@arm.com> <20201028220945.3826358-25-suzuki.poulose@arm.com> <20201109202205.GB3396611@xps15> From: Suzuki K Poulose Message-ID: Date: Tue, 10 Nov 2020 09:31:42 +0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.4.1 MIME-Version: 1.0 In-Reply-To: <20201109202205.GB3396611@xps15> Content-Language: en-GB X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201110_043151_246457_D0E1651C X-CRM114-Status: GOOD ( 19.57 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: coresight@lists.linaro.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, mike.leach@linaro.org Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 11/9/20 8:22 PM, Mathieu Poirier wrote: > On Wed, Oct 28, 2020 at 10:09:42PM +0000, Suzuki K Poulose wrote: >> ETM v4.4 onwards adds support for system instruction access >> to the ETM. Detect the support on an ETM and switch to using the >> mode when available. >> >> Signed-off-by: Suzuki K Poulose >> --- >> .../coresight/coresight-etm4x-core.c | 39 +++++++++++++++++++ >> 1 file changed, 39 insertions(+) >> >> diff --git a/drivers/hwtracing/coresight/coresight-etm4x-core.c b/drivers/hwtracing/coresight/coresight-etm4x-core.c >> index 4bc2f15b6332..dc537b5612eb 100644 >> --- a/drivers/hwtracing/coresight/coresight-etm4x-core.c >> +++ b/drivers/hwtracing/coresight/coresight-etm4x-core.c >> @@ -675,6 +675,37 @@ static const struct coresight_ops etm4_cs_ops = { >> .source_ops = &etm4_source_ops, >> }; >> >> +static inline bool cpu_supports_sysreg_trace(void) >> +{ >> + u64 dfr0 = read_sysreg_s(SYS_ID_AA64DFR0_EL1); >> + >> + return ((dfr0 >> ID_AA64DFR0_TRACEVER_SHIFT) & 0xfUL) > 0; > > I would do: > > return ((dfr0 >> ID_AA64DFR0_TRACEVER_SHIFT) & 0xfUL) == 1; > > Because any other value than '1' are reserved. Correct. However, this is something we follow for all ID features in the arm64 kernel and is clarified in the Arm ARM (ARM DDI 0487F.a) : "D13.1.3 Principles of the ID scheme for fields in ID registers" Which guarantees that a (field > n) implies, everything that field == n is implied. (Well there are exceptions listed in the section, but TRACEVER is not one of those). So this should cover an old kernel running on a future CPU, using the features that it understands. (See feature_matches() in arch/arm64/kernel/cpufeature.c, which is the fundamental logic to detect a feature). Please let me know if you're OK with the justification. Thanks for the review. Suzuki _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel