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From: Kendall Willis <k-willis@ti.com>
To: Akashdeep Kaur <a-kaur@ti.com>
Cc: <sebin.francis@ti.com>, <nm@ti.com>, <vigneshr@ti.com>,
	<kristo@kernel.org>, <robh@kernel.org>, <krzk+dt@kernel.org>,
	<conor+dt@kernel.org>, <linux-arm-kernel@lists.infradead.org>,
	<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH] arm64: dts: ti: k3-pinctrl: Add virtual GPIO select mux macros
Date: Thu, 17 Sep 2026 13:58:32 -0500	[thread overview]
Message-ID: <b4e036a5-94bc-4843-a155-42f86f84b8bd@ti.com> (raw)
In-Reply-To: <20260917111539.3844577-1-a-kaur@ti.com>

On 9/17/26 06:15, Akashdeep Kaur wrote:
> Add virtual GPIO select mux macros to allow users to select GPIO
> controller bank for pins. The two GPIO controller instances in the
> MAIN domain share physical pins, and the vgpio_sel field routes each
> pin to either bank 0 or bank 2, enabling GPIO partitioning between
> software domains as documented in Technical Reference Manual[1]. The
> pad configuration register field description can be referenced at [2].
> 
> [1] AM62L TRM (section 10.6): https://www.ti.com/lit/ug/sprujb4a/sprujb4a.pdf
> [2] AM62L TRM (section 14.2.1.2.1): https://www.ti.com/lit/ug/sprujb4a/sprujb4a.pdf
> 
> Signed-off-by: Akashdeep Kaur <a-kaur@ti.com>
> ---
>   arch/arm64/boot/dts/ti/k3-pinctrl.h | 6 +++++-
>   1 file changed, 5 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/boot/dts/ti/k3-pinctrl.h b/arch/arm64/boot/dts/ti/k3-pinctrl.h
> index 4491898d8294..d42c466fcc7b 100644
> --- a/arch/arm64/boot/dts/ti/k3-pinctrl.h
> +++ b/arch/arm64/boot/dts/ti/k3-pinctrl.h
> @@ -3,11 +3,12 @@
>    * This header provides constants for pinctrl bindings for TI's K3 SoC
>    * family.
>    *
> - * Copyright (C) 2018-2025 Texas Instruments Incorporated - https://www.ti.com/
> + * Copyright (C) 2018-2026 Texas Instruments Incorporated - https://www.ti.com/
>    */
>   #ifndef DTS_ARM64_TI_K3_PINCTRL_H
>   #define DTS_ARM64_TI_K3_PINCTRL_H
>   
> +#define VGPIO_SEL_SHIFT         (4)
>   #define WKUP_LVL_EN_SHIFT	(7)
>   #define WKUP_LVL_POL_SHIFT	(8)
>   #define DEBOUNCE_SHIFT		(11)
> @@ -111,6 +112,9 @@
>   #define PIN_WKUP_EN_LEVEL_HIGH		(WKUP_ENABLE | WKUP_ON_LEVEL | WKUP_LEVEL_HIGH)
>   #define PIN_WKUP_EN			(WKUP_ENABLE | WKUP_ON_EDGE)
>   
> +#define PIN_VGPIO_SEL0                  (0 << VGPIO_SEL_SHIFT)
> +#define PIN_VGPIO_SEL2                  (1 << VGPIO_SEL_SHIFT)

Would a better name be PIN_VGPIO_SEL_GPIO0 and PIN_VGPIO_SEL_GPIO2 so 
that it is clear to users which GPIO bank they're using?

Best,
Kendall

> +
>   /* Default mux configuration for gpio-ranges to use with pinctrl */
>   #define PIN_GPIO_RANGE_IOPAD	(PIN_INPUT | 7)
>   



  reply	other threads:[~2026-09-17 18:59 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-17 11:15 [PATCH] arm64: dts: ti: k3-pinctrl: Add virtual GPIO select mux macros Akashdeep Kaur
2026-09-17 18:58 ` Kendall Willis [this message]
2026-09-18  8:27 ` Vignesh Raghavendra
2026-09-21  6:40   ` Akashdeep Kaur

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