From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.4 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,NICE_REPLY_A,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D132CC55179 for ; Tue, 27 Oct 2020 17:42:53 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 5D5E720578 for ; Tue, 27 Oct 2020 17:42:53 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="adcknLXR" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 5D5E720578 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:Date:Message-ID:From: References:To:Subject:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=WEsksWHGjIsm7Jg+0vQdjT+SCMJrvWVlHV1wRZRNlO0=; b=adcknLXRkLGSdGEG9RdRA2FL4 3XuqVj9xzXo5NVOZyeP3z0ZXOVGXqXmweJlPK5tohushincZ+vI644z3n6O35QR5+rG8H/obEgv5K D7tkxv7RYiuS/GXjZiC8KtVxXU8hTiNkEt3Pf3+JfDWkCFkeTSYe1aVZC+nRRk+kK/HUMWW9aWYAa jHGUQuThMoZsYhll/ByB0GpONjEgix/pWvg71x5lPaz6Zr063qIwONel6/20R1tBKTocJ8r6etgI+ YMvxCTPBj/sVtgL1gFJyO7svaL2NN0oaS7Y/cr3zmq4++Uir6E0YQh7q9X2nqmGk1BK/b6lwUa6gk QC8XNJJ+A==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kXSyU-0001qs-5t; Tue, 27 Oct 2020 17:41:34 +0000 Received: from foss.arm.com ([217.140.110.172]) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kXSyR-0001ps-9r for linux-arm-kernel@lists.infradead.org; Tue, 27 Oct 2020 17:41:32 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 4D58D139F; Tue, 27 Oct 2020 10:41:30 -0700 (PDT) Received: from [172.16.1.113] (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id B55DF3F719; Tue, 27 Oct 2020 10:41:28 -0700 (PDT) Subject: Re: [PATCH 08/11] KVM: arm64: Inject AArch32 exceptions from HYP To: Marc Zyngier References: <20201026133450.73304-1-maz@kernel.org> <20201026133450.73304-9-maz@kernel.org> From: James Morse Message-ID: Date: Tue, 27 Oct 2020 17:41:27 +0000 User-Agent: Mozilla/5.0 (X11; Linux aarch64; rv:68.0) Gecko/20100101 Thunderbird/68.12.0 MIME-Version: 1.0 In-Reply-To: <20201026133450.73304-9-maz@kernel.org> Content-Language: en-GB X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201027_134131_836888_E157C5C7 X-CRM114-Status: GOOD ( 18.99 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org, Suzuki K Poulose , kernel-team@android.com, Quentin Perret , Andrew Scull , David Brazdil , Will Deacon , kvmarm@lists.cs.columbia.edu, Julien Thierry Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Marc, On 26/10/2020 13:34, Marc Zyngier wrote: > Similarily to what has been done for AArch64, move the AArch32 exception > inhjection to HYP. > > In order to not use the regmap selection code at EL2, simplify the code > populating the target mode's LR register by harcoding the two possible > LR registers (LR_abt in X20, LR_und in X22). > diff --git a/arch/arm64/kvm/hyp/exception.c b/arch/arm64/kvm/hyp/exception.c > index cd6e643639e8..8d1d1bcd9e69 100644 > --- a/arch/arm64/kvm/hyp/exception.c > +++ b/arch/arm64/kvm/hyp/exception.c > @@ -57,10 +67,25 @@ static void __vcpu_write_spsr(struct kvm_vcpu *vcpu, u64 val) > +static inline u32 __vcpu_read_cp15(const struct kvm_vcpu *vcpu, int reg) > +{ > + return __vcpu_read_sys_reg(vcpu, reg / 2); > +} Doesn't this re-implement the issue 3204be4109ad biased? > @@ -155,23 +180,189 @@ static void enter_exception64(struct kvm_vcpu *vcpu, unsigned long target_mode, > +static void enter_exception32(struct kvm_vcpu *vcpu, u32 mode, u32 vect_offset) > +{ > + /* > + * Table D1-27 of DDI 0487F.c shows the GPR mapping between > + * AArch32 and AArch64. We only deal with ABT/UND. (to check I understand : because these are the only two KVM ever injects?) > + */ > + switch(mode) { > + case PSR_AA32_MODE_ABT: > + __vcpu_write_spsr_abt(vcpu, host_spsr_to_spsr32(spsr)); > + lr = 20; > break; > + (two bonus tabs!) > + case PSR_AA32_MODE_UND: > + __vcpu_write_spsr_und(vcpu, host_spsr_to_spsr32(spsr)); > + lr = 22; > break; > }> + > + vcpu_set_reg(vcpu, lr, *vcpu_pc(vcpu) + return_offset); Can we, abuse, the compat_lr_abt definitions to do something like: | u32 return_address = *vcpu_pc(vcpu) + return_offset; [..] | switch(mode) { | case PSR_AA32_MODE_ABT:> | __vcpu_write_spsr_abt(vcpu, host_spsr_to_spsr32(spsr)); | vcpu_gp_regs(vcpu)->compat_lr_abt = return_address; | break; | case PSR_AA32_MODE_UND: | __vcpu_write_spsr_und(vcpu, host_spsr_to_spsr32(spsr)); | vcpu_gp_regs(vcpu)->compat_lr_und = return_address; | break; ...as someone who has no clue about 32bit, this hides all the worrying magic-14==magic-22! Thanks, James > +} _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel