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Sun, 02 Feb 2025 15:26:38 -0800 (PST) X-Google-Smtp-Source: AGHT+IGfTk8xGUBI61+sXaogs4siFVAtjNe8wBT4NdlyuKENiA8v7HLfkeSD7O9+S9Z2x6jnkLdTWg== X-Received: by 2002:a17:902:cec3:b0:216:7ee9:2227 with SMTP id d9443c01a7336-21dd7dd88e6mr310304415ad.36.1738538797668; Sun, 02 Feb 2025 15:26:37 -0800 (PST) Received: from [192.168.68.55] ([180.233.125.64]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-21de3303472sm63313735ad.195.2025.02.02.15.26.30 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sun, 02 Feb 2025 15:26:36 -0800 (PST) Message-ID: Date: Mon, 3 Feb 2025 09:26:28 +1000 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v6 38/43] arm64: RME: Configure max SVE vector length for a Realm To: Steven Price , kvm@vger.kernel.org, kvmarm@lists.linux.dev Cc: Jean-Philippe Brucker , Catalin Marinas , Marc Zyngier , Will Deacon , James Morse , Oliver Upton , Suzuki K Poulose , Zenghui Yu , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Joey Gouly , Alexandru Elisei , Christoffer Dall , Fuad Tabba , linux-coco@lists.linux.dev, Ganapatrao Kulkarni , Shanker Donthineni , Alper Gun , "Aneesh Kumar K . V" References: <20241212155610.76522-1-steven.price@arm.com> <20241212155610.76522-39-steven.price@arm.com> From: Gavin Shan In-Reply-To: <20241212155610.76522-39-steven.price@arm.com> X-Mimecast-Spam-Score: 0 X-Mimecast-MFC-PROC-ID: c14zz4g_T11UGAg0YeV2xtitYnC0IaAVZXAudgb3ZS0_1738538798 X-Mimecast-Originator: redhat.com Content-Language: en-US Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250202_152641_829110_56189448 X-CRM114-Status: GOOD ( 26.60 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 12/13/24 1:56 AM, Steven Price wrote: > From: Jean-Philippe Brucker > > Obtain the max vector length configured by userspace on the vCPUs, and > write it into the Realm parameters. By default the vCPU is configured > with the max vector length reported by RMM, and userspace can reduce it > with a write to KVM_REG_ARM64_SVE_VLS. > > Signed-off-by: Jean-Philippe Brucker > Signed-off-by: Steven Price > --- > arch/arm64/kvm/guest.c | 3 ++- > arch/arm64/kvm/rme.c | 42 ++++++++++++++++++++++++++++++++++++++++++ > 2 files changed, 44 insertions(+), 1 deletion(-) > > diff --git a/arch/arm64/kvm/guest.c b/arch/arm64/kvm/guest.c > index 429c8f10b76a..5562029368c5 100644 > --- a/arch/arm64/kvm/guest.c > +++ b/arch/arm64/kvm/guest.c > @@ -363,7 +363,7 @@ static int set_sve_vls(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg) > if (!vcpu_has_sve(vcpu)) > return -ENOENT; > > - if (kvm_arm_vcpu_sve_finalized(vcpu)) > + if (kvm_arm_vcpu_sve_finalized(vcpu) || kvm_realm_is_created(vcpu->kvm)) > return -EPERM; /* too late! */ > > if (WARN_ON(vcpu->arch.sve_state)) > @@ -825,6 +825,7 @@ static bool validate_realm_set_reg(struct kvm_vcpu *vcpu, > switch (reg->id) { > case KVM_REG_ARM_PMCR_EL0: > case KVM_REG_ARM_ID_AA64DFR0_EL1: > + case KVM_REG_ARM64_SVE_VLS: > return true; > } > } > diff --git a/arch/arm64/kvm/rme.c b/arch/arm64/kvm/rme.c > index 39dbc19e4a42..3116ecee37a8 100644 > --- a/arch/arm64/kvm/rme.c > +++ b/arch/arm64/kvm/rme.c > @@ -297,6 +297,44 @@ static void realm_unmap_shared_range(struct kvm *kvm, > } > } > > +static int realm_init_sve_param(struct kvm *kvm, struct realm_params *params) > +{ > + int ret = 0; > + unsigned long i; > + struct kvm_vcpu *vcpu; > + int max_vl, realm_max_vl = -1; > + I would suggest to rename 'max_vl' and 'realm_max_vl' to 'vl' and 'last_vl' since we're not looking for the maximal VLs. Instead, we're making sure the VLs on all vCPUs are equal. > + /* > + * Get the preferred SVE configuration, set by userspace with the > + * KVM_ARM_VCPU_SVE feature and KVM_REG_ARM64_SVE_VLS pseudo-register. > + */ > + kvm_for_each_vcpu(i, vcpu, kvm) { > + mutex_lock(&vcpu->mutex); > + if (vcpu_has_sve(vcpu)) { > + if (!kvm_arm_vcpu_sve_finalized(vcpu)) > + ret = -EINVAL; > + max_vl = vcpu->arch.sve_max_vl; > + } else { > + max_vl = 0; > + } > + mutex_unlock(&vcpu->mutex); > + if (ret) > + return ret; > + > + /* We need all vCPUs to have the same SVE config */ > + if (realm_max_vl >= 0 && realm_max_vl != max_vl) > + return -EINVAL; > + > + realm_max_vl = max_vl; > + } > + > + if (realm_max_vl > 0) { > + params->sve_vl = sve_vq_from_vl(realm_max_vl) - 1; > + params->flags |= RMI_REALM_PARAM_FLAG_SVE; > + } > + return 0; > +} > + > static int realm_create_rd(struct kvm *kvm) > { > struct realm *realm = &kvm->arch.realm; > @@ -344,6 +382,10 @@ static int realm_create_rd(struct kvm *kvm) > params->flags |= RMI_REALM_PARAM_FLAG_PMU; > } > > + r = realm_init_sve_param(kvm, params); > + if (r) > + goto out_undelegate_tables; > + > params_phys = virt_to_phys(params); > > if (rmi_realm_create(rd_phys, params_phys)) { Thanks, Gavin