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Tue, 21 Apr 2026 10:32:32 -0700 (PDT) Received: from [192.168.88.32] ([150.228.25.104]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2b5fa9ff3bfsm175412135ad.7.2026.04.21.10.32.25 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 21 Apr 2026 10:32:31 -0700 (PDT) Message-ID: Date: Tue, 21 Apr 2026 19:32:23 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH net v4 2/2] net: airoha: Add missing bits in airoha_qdma_cleanup_tx_queue() To: Lorenzo Bianconi Cc: Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Simon Horman , linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, netdev@vger.kernel.org References: <20260417-airoha_qdma_cleanup_tx_queue-fix-net-v4-0-e04bcc2c9642@kernel.org> <20260417-airoha_qdma_cleanup_tx_queue-fix-net-v4-2-e04bcc2c9642@kernel.org> <210f5d0b-6232-4c0f-adff-3a97d54159b3@redhat.com> From: Paolo Abeni In-Reply-To: X-Mimecast-Spam-Score: 0 X-Mimecast-MFC-PROC-ID: nQ_eX1thgJUotfDm0rUPWxvvD2r-OKVw-iVflnXW1mo_1776792753 X-Mimecast-Originator: redhat.com Content-Language: en-US Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260421_103237_081452_1B328DC8 X-CRM114-Status: GOOD ( 20.81 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 4/21/26 7:15 PM, Lorenzo Bianconi wrote: >> On 4/17/26 8:36 AM, Lorenzo Bianconi wrote: >>> @@ -1055,8 +1058,33 @@ static void airoha_qdma_cleanup_tx_queue(struct airoha_queue *q) >>> e->dma_addr = 0; >>> e->skb = NULL; >>> list_add_tail(&e->list, &q->tx_list); >>> + >>> + /* Reset DMA descriptor */ >>> + WRITE_ONCE(desc->ctrl, 0); >>> + WRITE_ONCE(desc->addr, 0); >>> + WRITE_ONCE(desc->data, 0); >>> + WRITE_ONCE(desc->msg0, 0); >>> + WRITE_ONCE(desc->msg1, 0); >>> + WRITE_ONCE(desc->msg2, 0); >> >> Sashiko has some complains on this patch that look legit to me. >> >> Also the pre-existing issues mentioned WRT patch 1/2 makes such patch >> IMHO almost ineffective, I think you should address them in the same series. >> >> Note that you should have commented on sashiko review on the ML, it >> would have saved a significant amount of time on us. > > Since this series is marked as 'Changes Requested', it is not clear to me what > next steps are. I guess we have two possible approach here: > > 1) - Post patch 1/2 ("net: airoha: Move ndesc initialization at > end of airoha_qdma_init_tx()") with the series available upstream > (not merged yet) in [0] where I am fixing similar issues for > airoha_qdma_init_rx_queue() and airoha_qdma_tx_irq_init(). > - Post patch 2/2 ("net: airoha: Add missing bits in > airoha_qdma_cleanup_tx_queue()") with a fix for airoha_ndo_stop() waiting > for TX/RX DMA engine to complete before running > airoha_qdma_cleanup_tx_queue(). > > 2) - Since all the issues rised by Sashiko are not strictly related to this > series and they are already fixed in pending patches, just apply the fixes > separately without the needs to repost this series. Given the current flood on the ML I think option 2 could be the better. Note that the tree is currently in Jakub's hands and he can very legitly disagree. /P