From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5AE4BC54734 for ; Tue, 27 Aug 2024 10:30:39 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: Content-Type:In-Reply-To:From:References:Cc:To:Subject:MIME-Version:Date: Message-ID:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=MkOblmPhkLIe6oEykDBHRoLpfI5FhOdoxnXEnkmHpFs=; b=CHBCb+PXQtKU+wZFk8iYbmQeZ6 /DIoIQjxGjc8DG/Nn2aCRIH6ehlC7KbCxj6bpx0m5zrB52uObIVByURV8pLEr8IcCv+prZ4p7eBK6 9i39vOghr+1GFNzRAP2UCbekqJATnMmPuWKfQlVgcMRX8GkqyY3sRnpA1hPP5sh3etgPPwb25NBhT 2vrS7yiicZKFjXgSnAb7iiTDaygMCrw/MkInT+KQrHYtQpITSRaxfBwQkbEnqJLZo+XGUt//Abz1Y 9Fy7ARbRBynsRUNOzC/FznrjdwmEpZ96B+dSp/eoW1mrGMXoTTWtIFseTGYXcC9NIsEP1jMu9Bc6d mluqMfqg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sitT3-0000000AoWk-1xqv; Tue, 27 Aug 2024 10:30:29 +0000 Received: from mail-wm1-x335.google.com ([2a00:1450:4864:20::335]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sisGT-0000000AXEH-3855 for linux-arm-kernel@lists.infradead.org; Tue, 27 Aug 2024 09:13:27 +0000 Received: by mail-wm1-x335.google.com with SMTP id 5b1f17b1804b1-429da8b5feaso58052255e9.2 for ; Tue, 27 Aug 2024 02:13:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1724750003; x=1725354803; darn=lists.infradead.org; h=content-transfer-encoding:in-reply-to:from:content-language :references:cc:to:subject:user-agent:mime-version:date:message-id :from:to:cc:subject:date:message-id:reply-to; bh=MkOblmPhkLIe6oEykDBHRoLpfI5FhOdoxnXEnkmHpFs=; b=GcpRgNG6ZQYJULKDlf3p3r8trx/51Bz1DsTlPl0ZancL4DKtNFybvbOUT6jcxxKvMk ay4hHRgv5A+JcduYsQ5NebPe816Az6D6MkHyn8i+GYgdHa/Iz4Qnj+kJYry0m9+/C5f6 dBVwVETMM83qVLdX/+Ig8PVC7vmWYBjGuiqKIijgHYWMKOBS8CrwVsBHbsLONublsmGs ldCPc8+0hksCtDlodEbTInwpF0nmvz1JCdUCGoBDIVWwCpNWAq3F6hMYyIBD7l50k8S4 1tc+u8pr5URyJ1ONj0acmKqyUXwCU6JL0NHPQPZSfkXT/3W9zGZagfZdzuZE+Gv9YOoL C+5A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1724750003; x=1725354803; h=content-transfer-encoding:in-reply-to:from:content-language :references:cc:to:subject:user-agent:mime-version:date:message-id :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=MkOblmPhkLIe6oEykDBHRoLpfI5FhOdoxnXEnkmHpFs=; b=PPKjHht3G5RGZClpElUU06TlcrNbDR3pPBTklszBskQXsYsBypLoMcc8vxLM3UGJ23 3MG64OWKWs0PeZrLTcb+6j0OdPX89mEWMqHXZ0gxcPKrGOpV85NJIs42jjKFsTSop/wm uVPhwOIRRgfL+42Z5blkb/oyo63C4115datJp9BFjOzmFhY3UhACnmJsh4yZfhPZoFGZ +tyWFTpGSt4frCU+PAGw2uK81iRFGTt2Y7jIz4INX5Df0TUBBa6cCyuGHBmHD8PcBG96 NRigiLbTvXWq001Asl0iB0P8TTmc2c1qVKM0jYyFlSbrnf2/EX8RuW1Ala1OzLhXnOQR +dQg== X-Forwarded-Encrypted: i=1; AJvYcCUM4PT0Oe32cnAgZ6hTujmU6lOlOIwNHt4ImAvUFL+NyiXTw8y3kxnLXQUfPUW/KkW3RRauoKEIDPxBc7R84Pkr@lists.infradead.org X-Gm-Message-State: AOJu0YzjNu9VZZJ1qfewHkxvp/bv+L/FvaStTcB48qRBRchmRc+qlWHy KDGXSdETutg1EnWBkLpak+dM/uDDdiCYdXOTclzDo0dg3Z7rivtTgaQM8E9+QVY= X-Google-Smtp-Source: AGHT+IELDbQ0YInZRqLz+AEkpiYsCf7f42uK8vcwLez7hBLrv03kT5qUnySR5SzQV+tSfEm/vuuEJg== X-Received: by 2002:a05:6000:1b92:b0:371:79f0:2cfb with SMTP id ffacd0b85a97d-373118c8523mr8634246f8f.46.1724750003086; Tue, 27 Aug 2024 02:13:23 -0700 (PDT) Received: from [192.168.1.3] ([89.47.253.130]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a86e594e809sm83491966b.219.2024.08.27.02.13.21 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 27 Aug 2024 02:13:22 -0700 (PDT) Message-ID: Date: Tue, 27 Aug 2024 10:13:21 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 0/7] Event parsing fixes To: "Liang, Kan" , Ian Rogers Cc: linux-perf-users@vger.kernel.org, John Garry , Will Deacon , Mike Leach , Leo Yan , Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , Mark Rutland , Alexander Shishkin , Jiri Olsa , Adrian Hunter , Weilin Wang , Athira Rajeev , Dominique Martinet , Yang Jihong , Colin Ian King , Andi Kleen , Ze Gao , Jing Zhang , Sun Haiyong , Yicong Yang , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org References: <20240822132506.1468090-1-james.clark@linaro.org> <961ff6d6-a9b3-4329-9a22-6934ca152318@linux.intel.com> Content-Language: en-US From: James Clark In-Reply-To: <961ff6d6-a9b3-4329-9a22-6934ca152318@linux.intel.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240827_021325_968454_36EA8218 X-CRM114-Status: GOOD ( 29.72 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 22/08/2024 4:18 pm, Liang, Kan wrote: > > > On 2024-08-22 11:10 a.m., Ian Rogers wrote: >> On Thu, Aug 22, 2024 at 7:32 AM Liang, Kan wrote: >>> >>> >>> >>> On 2024-08-22 9:24 a.m., James Clark wrote: >>>> I rebased this one and made some other fixes so that I could test it, >>>> so I thought I'd repost it here in case it's helpful. I also added a >>>> new test. >>>> >>>> But for the testing it all looks ok. >>>> >>>> There is one small difference where it now shows "stalled-cycles-..." >>>> as events, when before it just didn't show them at all when >>>> they weren't supported: >>>> >>>> $ perf stat -- true >>>> >>>> Performance counter stats for 'true': >>>> >>>> 0.66 msec task-clock # 0.384 CPUs utilized >>>> 0 context-switches # 0.000 /sec >>>> 0 cpu-migrations # 0.000 /sec >>>> 52 page-faults # 78.999 K/sec >>>> cpu_atom/instructions/ (0.00%) >>>> 978,399 cpu_core/instructions/ # 1.02 insn per cycle >>>> cpu_atom/cycles/ (0.00%) >>>> 959,722 cpu_core/cycles/ # 1.458 GHz >>>> cpu_atom/stalled-cycles-frontend/ >>>> cpu_core/stalled-cycles-frontend/ >>>> >>> >>> Intel didn't support the events for a very long time. It would impact >>> many existing generations and all future generations. >>> The current method is to hide the non-exist events. The TopdownL1 is an >>> example. If it doesn't exist in the json file, perf stat will not >>> display it. >>> I don't think it's a good idea to disclose non-exist events in the perf >>> stat default. >>> >>> The doesn't help here, since there could be many reasons >>> that the perf tool fails to open a counter. It just provides a >>> misleading message for an event that never existed. >> >> The list of "default" events, not metrics, similarly has "> supported>" in many configurations with "-dd" or "-ddd" on AMD. I'm >> not sure the set of default events, at different detail levels, is >> necessarily the best. The default events can also be a source of >> multiplexing, for example, showing branch miss rate alongside topdown >> metrics. Anyway, for the "" we should probably be able >> to tweak should_skip_zero_counter that is in stat-display.c and tag >> these default events as "skippable". > > The "skippable" should be fine as long as it's completely hidden. > > BTW: The stalled-cycles-backend should be similar to the > stalled-cycles-frontend, but it isn't shown in the example. Is the > stalled-cycles-backend event missed? > > Thanks, > Kan Sorry I should have made it clearer that I truncated the output just to focus on the part. The full output is below and it does include stalled-cycles-backend. I'll have a look at trying to hide the ones that don't exist, I think it will look cleaner. But at the same time what it says isn't incorrect, and it's not like we hide the lines from cores where the process didn't run, so it doesn't look out of place with the ones. $ perf stat -- true Performance counter stats for 'true': 0.42 msec task-clock # 0.439 CPUs utilized 0 context-switches # 0.000 /sec 0 cpu-migrations # 0.000 /sec 53 page-faults # 125.592 K/sec 978,160 cpu_atom/instructions/ # 0.91 insn per cycle cpu_core/instructions/ (0.00%) 1,070,525 cpu_atom/cycles/ # 2.537 GHz cpu_core/cycles/ (0.00%) cpu_atom/stalled-cycles-frontend/ cpu_core/stalled-cycles-frontend/ cpu_atom/stalled-cycles-backend/ cpu_core/stalled-cycles-backend/ 175,814 cpu_atom/branches/ # 416.620 M/sec cpu_core/branches/ (0.00%) 6,851 cpu_atom/branch-misses/ # 3.90% of all branches cpu_core/branch-misses/ (0.00%) TopdownL1 (cpu_atom) # 17.4 % tma_bad_speculation # 21.8 % tma_retiring TopdownL1 (cpu_atom) # 27.5 % tma_backend_bound # 33.3 % tma_frontend_bound 0.000960792 seconds time elapsed 0.000000000 seconds user 0.000471000 seconds sys