From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.0 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 620C1C43381 for ; Thu, 21 Mar 2019 13:35:16 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 30E6120693 for ; Thu, 21 Mar 2019 13:35:16 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="ur9QAYRw" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 30E6120693 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:Date: Message-ID:From:References:To:Subject:Reply-To:Content-ID:Content-Description :Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=Yf+O17AtsTaXHpBBEeWGkR3SHxJdiEDsW9F+DWG3NhM=; b=ur9QAYRwFbB05F 6LUsm0soNBUE7+TmCqfVo5ClnxE0GW6DkTiS9qhhUpsHCcGW6AdGZ1vHaQAjcDCbD9f5THS9zAybR h63ZeyieyPsGH8dH1t6lxS6KY1GLmKFv12LpoRxXk1CAj9D7aQMl2LvAGgH+StaYOYDddGRZyisNw 2B6dZXxknEUuuT+TyoFSNEIGYqfTRTJhcy807Z7wbXk8YrIgK9+oGUwuMCIxu5Tv1UwuB/buQUmGw 0D54aaIHE7e1DEyAjiYbOkoKMXo+IAju0aoGAP4COWEui8ud0WFtu1S68E0CtjPlyq7a9vOWh+jtZ VUEDekr+nf8LF8CoBBEQ==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1h6xqf-0007zA-89; Thu, 21 Mar 2019 13:35:09 +0000 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70] helo=foss.arm.com) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1h6xqb-000737-Ao for linux-arm-kernel@lists.infradead.org; Thu, 21 Mar 2019 13:35:07 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 214DE80D; Thu, 21 Mar 2019 06:35:03 -0700 (PDT) Received: from [10.1.197.45] (e112298-lin.cambridge.arm.com [10.1.197.45]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 705A63F71A; Thu, 21 Mar 2019 06:34:57 -0700 (PDT) Subject: Re: [PATCH] perf: Change PMCR write to read-modify-write To: Prasad Sodagudi , will.deacon@arm.com, mingo@redhat.com, catalin.marinas@arm.com, linux-arm-kernel@lists.infradead.org, peterz@infradead.org References: <1553134066-20272-1-git-send-email-psodagud@codeaurora.org> From: Julien Thierry Message-ID: Date: Thu, 21 Mar 2019 13:34:55 +0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.2.1 MIME-Version: 1.0 In-Reply-To: <1553134066-20272-1-git-send-email-psodagud@codeaurora.org> Content-Language: en-US X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190321_063505_439072_044230B8 X-CRM114-Status: GOOD ( 21.15 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Prasad, On 21/03/2019 02:07, Prasad Sodagudi wrote: > Preserves the bitfields of PMCR_EL0(AArch64) during PMU reset. > Reset routine should write a 1 to PMCR.C and PMCR.P fields only > to reset the counters. Other fields should not be changed > as they could be set before PMU initialization and their > value must be preserved even after reset. > Are there any particular bit you are concerned about? Apart from the RO ones and the Res0 ones (to which we are already writing 0), I see: DP -> irrelevant for non-secure X -> This one is the only potentially interesting, however it resets to an architecturally unknown value, so unless we know for a fact it was set before hand, we probably want to clear it D -> ignored when we have LC set (and we do) E -> Since this is the function we use to reset the PMU on the current CPU, we probably want to set this bit to 0 regardless of its previous value So, is there any issue this patch is solving? Thanks, > Signed-off-by: Prasad Sodagudi > --- > arch/arm64/kernel/perf_event.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/arch/arm64/kernel/perf_event.c b/arch/arm64/kernel/perf_event.c > index 4addb38..0c1afdd 100644 > --- a/arch/arm64/kernel/perf_event.c > +++ b/arch/arm64/kernel/perf_event.c > @@ -868,8 +868,8 @@ static void armv8pmu_reset(void *info) > * Initialize & Reset PMNC. Request overflow interrupt for > * 64 bit cycle counter but cheat in armv8pmu_write_counter(). > */ > - armv8pmu_pmcr_write(ARMV8_PMU_PMCR_P | ARMV8_PMU_PMCR_C | > - ARMV8_PMU_PMCR_LC); > + armv8pmu_pmcr_write(armv8pmu_pmcr_read() | ARMV8_PMU_PMCR_P | > + ARMV8_PMU_PMCR_C | ARMV8_PMU_PMCR_LC); > } > > static int __armv8_pmuv3_map_event(struct perf_event *event, > -- Julien Thierry _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel