From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.3 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,NICE_REPLY_A,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0D7A1C6379D for ; Tue, 24 Nov 2020 11:39:41 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 8AD59206D8 for ; Tue, 24 Nov 2020 11:39:40 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="NsstEicE" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 8AD59206D8 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Type: Content-Transfer-Encoding:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:Date:Message-ID:From: References:To:Subject:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=/AwBfrqiKtsbPtoRkoLGNVXO29Qy01uQeBHaasU/Qqs=; b=NsstEicEmji2c26xHkELHbsbE hPQm3Ee7qKpJ5+SprncOCVg04UcXaDkwpH667sGkE7phdc65WPU9tRnrj4pr98qhylVZ4grC7H5m2 0iyzGejX3SUiOpPrdnNzUeM+Smw5qvIR6obJDOEWE0eCSDr/ojWOj8Wsj2asE9MCVPnSCr5FwnZIY FR4rCPxoSdWkrAyaQr0B6cU7IQlXSoL/AqqUNUReVVhYNYhyEzL6BMghxDUHOhh3N3jEC84v4n1hi pSAr7v2G5n/PIcN8c1uxupJ6V4G6q3vMKmPGenwnl0QhHnjjW10XcVDRtCQrCG8rKPuWzliPGzsPR n2nFzRsOg==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1khWf8-0003tW-W6; Tue, 24 Nov 2020 11:39:11 +0000 Received: from foss.arm.com ([217.140.110.172]) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1khWf4-0003pR-Qa for linux-arm-kernel@lists.infradead.org; Tue, 24 Nov 2020 11:39:08 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 327B21396; Tue, 24 Nov 2020 03:39:04 -0800 (PST) Received: from [10.57.56.151] (unknown [10.57.56.151]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 18A623F71F; Tue, 24 Nov 2020 03:39:00 -0800 (PST) Subject: Re: [PATCH v4 20/25] coresight: etm4x: Detect system instructions support To: Tingwei Zhang References: <20201119164547.2982871-1-suzuki.poulose@arm.com> <20201119164547.2982871-21-suzuki.poulose@arm.com> <20201123075827.GA18352@codeaurora.org> <1c8d4b13-0c80-0bd3-29a6-dd586841377f@arm.com> <20201124004155.GA10220@codeaurora.org> From: Suzuki K Poulose Message-ID: Date: Tue, 24 Nov 2020 11:38:55 +0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.5.0 MIME-Version: 1.0 In-Reply-To: <20201124004155.GA10220@codeaurora.org> Content-Language: en-GB X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201124_063907_029595_FE1B060C X-CRM114-Status: GOOD ( 21.67 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: anshuman.khandual@arm.com, coresight@lists.linaro.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, jonathan.zhouwen@huawei.com, mike.leach@linaro.org Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 11/24/20 12:41 AM, Tingwei Zhang wrote: > On Mon, Nov 23, 2020 at 05:39:43PM +0800, Suzuki K Poulose wrote: >> On 11/23/20 7:58 AM, Tingwei Zhang wrote: >>> Hi Suzuki, >>> >>> On Fri, Nov 20, 2020 at 12:45:42AM +0800, Suzuki K Poulose wrote: >>>> ETM v4.4 onwards adds support for system instruction access >>>> to the ETM. Detect the support on an ETM and switch to using the >>>> mode when available. >>>> >>>> Cc: Mike Leach >>>> Reviewed-by: Mathieu Poirier >>>> Signed-off-by: Suzuki K Poulose >>>> --- >>>> .../coresight/coresight-etm4x-core.c | 39 +++++++++++++++++++ >>>> 1 file changed, 39 insertions(+) >>>> >>>> diff --git a/drivers/hwtracing/coresight/coresight-etm4x-core.c >>>> b/drivers/hwtracing/coresight/coresight-etm4x-core.c >>>> index 7ac0a185c146..5cbea9c27f58 100644 >>>> --- a/drivers/hwtracing/coresight/coresight-etm4x-core.c >>>> +++ b/drivers/hwtracing/coresight/coresight-etm4x-core.c >>>> @@ -684,6 +684,37 @@ static const struct coresight_ops etm4_cs_ops = { >>>> .source_ops = &etm4_source_ops, >>>> }; >>>> >>>> +static inline bool cpu_supports_sysreg_trace(void) >>>> +{ >>>> + u64 dfr0 = read_sysreg_s(SYS_ID_AA64DFR0_EL1); >>>> + >>>> + return ((dfr0 >> ID_AA64DFR0_TRACEVER_SHIFT) & 0xfUL) > 0; >>>> +} >>>> + >>>> +static bool etm4_init_sysreg_access(struct etmv4_drvdata *drvdata, >>>> + struct csdev_access *csa) >>>> +{ >>>> + u32 devarch; >>>> + >>>> + if (!cpu_supports_sysreg_trace()) >>>> + return false; >>>> + >>>> + /* >>>> + * ETMs implementing sysreg access must implement TRCDEVARCH. >>>> + */ >>>> + devarch = read_etm4x_sysreg_const_offset(TRCDEVARCH); >>>> + if ((devarch & ETM_DEVARCH_ID_MASK) != ETM_DEVARCH_ETMv4x_ARCH) >>> >>> Is this driver suppose to work on ETM 5.0/ETE trace unit before ETE driver >>> is ready? >> >> No, it is not supposed to work on an ETE without the ETE support. That check >> ensures that we only detect ETMv4x for now. The ETE driver support adds the >> ETE_ARCH as one of the supported ETMs. If you hack around it might still >> probe, >> but things could go terribly wrong if we access registers that are not >> available >> on ETE. >> >> Btw, are you able to test this series on an ETMv4.4+ system ? >> > I'm trying to test this series on an ETE. Look like it's not correct. > I'll apply ETE patch on top of this and test. > Yes please ! Much appreciated. Do you have a TRBE as well ? Or are you using a legacy CoreSight topology ? Kind regards Suzuki _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel