Re: [PATCH v2 2/2] iio: adc: stm32: Fix IRQs on STM32F4 by removing custom spurious IRQs message

From: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
To: Yannick Brosseau <yannick.brosseau@gmail.com>, <jic23@kernel.org>,
	<lars@metafoo.de>, <mcoquelin.stm32@gmail.com>,
	<alexandre.torgue@foss.st.com>, <olivier.moysan@foss.st.com>
Cc: <paul@crapouillou.net>, <linux-iio@vger.kernel.org>,
	<linux-stm32@st-md-mailman.stormreply.com>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v2 2/2] iio: adc: stm32: Fix IRQs on STM32F4 by removing custom spurious IRQs message
Date: Tue, 17 May 2022 10:56:42 +0200	[thread overview]
Message-ID: <bd36b061-9838-868e-d8c6-c7d1b01ea4ab@foss.st.com> (raw)
In-Reply-To: <20220516203939.3498673-3-yannick.brosseau@gmail.com>

On 5/16/22 22:39, Yannick Brosseau wrote:
> The check for spurious IRQs introduced in 695e2f5c289bb assumed that the bits
> in the control and status registers are aligned. This is true for the H7 and MP1
> version, but not the F4. The interrupt was then never handled on the F4.
> 
> Instead of increasing the complexity of the comparison and check each bit specifically,
> we remove this check completely and rely on the generic handler for spurious IRQs.
> 
> Fixes: 695e2f5c289b ("iio: adc: stm32-adc: fix a regression when using dma and irq")
> Signed-off-by: Yannick Brosseau <yannick.brosseau@gmail.com>

Hi Yannick,

Feel free to add my:

Reviewed-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>

Thanks,
Fabrice

> ---
>  drivers/iio/adc/stm32-adc.c | 10 ----------
>  1 file changed, 10 deletions(-)
> 
> diff --git a/drivers/iio/adc/stm32-adc.c b/drivers/iio/adc/stm32-adc.c
> index a68ecbda6480..8c5f05f593ab 100644
> --- a/drivers/iio/adc/stm32-adc.c
> +++ b/drivers/iio/adc/stm32-adc.c
> @@ -1407,7 +1407,6 @@ static irqreturn_t stm32_adc_threaded_isr(int irq, void *data)
>  	struct stm32_adc *adc = iio_priv(indio_dev);
>  	const struct stm32_adc_regspec *regs = adc->cfg->regs;
>  	u32 status = stm32_adc_readl(adc, regs->isr_eoc.reg);
> -	u32 mask = stm32_adc_readl(adc, regs->ier_eoc.reg);
>  
>  	/* Check ovr status right now, as ovr mask should be already disabled */
>  	if (status & regs->isr_ovr.mask) {
> @@ -1422,11 +1421,6 @@ static irqreturn_t stm32_adc_threaded_isr(int irq, void *data)
>  		return IRQ_HANDLED;
>  	}
>  
> -	if (!(status & mask))
> -		dev_err_ratelimited(&indio_dev->dev,
> -				    "Unexpected IRQ: IER=0x%08x, ISR=0x%08x\n",
> -				    mask, status);
> -
>  	return IRQ_NONE;
>  }
>  
> @@ -1436,10 +1430,6 @@ static irqreturn_t stm32_adc_isr(int irq, void *data)
>  	struct stm32_adc *adc = iio_priv(indio_dev);
>  	const struct stm32_adc_regspec *regs = adc->cfg->regs;
>  	u32 status = stm32_adc_readl(adc, regs->isr_eoc.reg);
> -	u32 mask = stm32_adc_readl(adc, regs->ier_eoc.reg);
> -
> -	if (!(status & mask))
> -		return IRQ_WAKE_THREAD;
>  
>  	if (status & regs->isr_ovr.mask) {
>  		/*

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