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Mon, 25 May 2020 11:01:08 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 08D86100034; Mon, 25 May 2020 11:01:07 +0200 (CEST) Received: from Webmail-eu.st.com (sfhdag3node3.st.com [10.75.127.9]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id B16C4207490; Mon, 25 May 2020 11:01:07 +0200 (CEST) Received: from SFHDAG6NODE1.st.com (10.75.127.16) by SFHDAG3NODE3.st.com (10.75.127.9) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Mon, 25 May 2020 11:01:07 +0200 Received: from SFHDAG6NODE1.st.com ([fe80::8d96:4406:44e3:eb27]) by SFHDAG6NODE1.st.com ([fe80::8d96:4406:44e3:eb27%20]) with mapi id 15.00.1473.003; Mon, 25 May 2020 11:01:07 +0200 From: Nicolas TOROMANOFF To: Ard Biesheuvel Subject: RE: [PATCH 5/5] crypto: stm32/crc: protect from concurrent accesses Thread-Topic: [PATCH 5/5] crypto: stm32/crc: protect from concurrent accesses Thread-Index: AQHWMmiSDrJlXuJ7jUCG67XoujoCbKi4bbbg Date: Mon, 25 May 2020 09:01:07 +0000 Message-ID: References: <20200512141113.18972-1-nicolas.toromanoff@st.com> <20200512141113.18972-6-nicolas.toromanoff@st.com> <67c25d90d9714a85b52f3d9c2070af88@SFHDAG6NODE1.st.com> In-Reply-To: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-ms-exchange-transport-fromentityheader: Hosted x-originating-ip: [10.75.127.44] MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.216, 18.0.676 definitions=2020-05-25_04:2020-05-22, 2020-05-25 signatures=0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200525_020133_146406_872F9DB2 X-CRM114-Status: GOOD ( 27.26 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Alexandre TORGUE , Linux Kernel Mailing List , "David S . Miller" , Linux Crypto Mailing List , Maxime Coquelin , "linux-stm32@st-md-mailman.stormreply.com" , Linux ARM , Herbert Xu Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org > -----Original Message----- > From: Ard Biesheuvel > Sent: Monday, May 25, 2020 9:46 AM > To: Nicolas TOROMANOFF > Subject: Re: [PATCH 5/5] crypto: stm32/crc: protect from concurrent accesses > > On Mon, 25 May 2020 at 09:24, Nicolas TOROMANOFF > wrote: > > > > Hello, > > > > > -----Original Message----- > > > From: Ard Biesheuvel > > > Sent: Friday, May 22, 2020 6:12 PM> > > > On Tue, 12 May 2020 at 16:13, Nicolas Toromanoff > > > wrote: > > > > > > > > Protect STM32 CRC device from concurrent accesses. > > > > > > > > As we create a spinlocked section that increase with buffer size, > > > > we provide a module parameter to release the pressure by splitting > > > > critical section in chunks. > > > > > > > > Size of each chunk is defined in burst_size module parameter. > > > > By default burst_size=0, i.e. don't split incoming buffer. > > > > > > > > Signed-off-by: Nicolas Toromanoff > > > > > > Would you mind explaining the usage model here? It looks like you > > > are sharing a CRC hardware accelerator with a synchronous interface > > > between different users by using spinlocks? You are aware that this > > > will tie up the waiting CPUs completely during this time, right? So > > > it would be much better to use a mutex here. Or perhaps it would > > > make more sense to fall back to a s/w based CRC routine if the h/w is tied up > working for another task? > > > > I know mutex are more acceptable here, but shash _update() and _init() > > may be call from any context, and so I cannot take a mutex. > > And to protect my concurrent HW access I only though about spinlock. > > Due to possible constraint on CPUs, I add a burst_size option to force > > slitting long buffer into smaller one, and so decrease time we take the lock. > > But I didn't though to fallback to software CRC. > > > > I'll do a patch on top. > > In in the burst_update() function I'll use a spin_trylock_irqsave() and use > software CRC32 if HW is already in use. > > > > Right. I didn't even notice that you were keeping interrupts disabled the whole > time when using the h/w block. That means that any serious use of this h/w > block will make IRQ latency go through the roof. > > I recommend that you go back to the drawing board on this driver, rather than > papering over the issues with a spin_trylock(). Perhaps it would be better to > model it as a ahash (even though the h/w block itself is synchronous) and use a > kthread to feed in the data. I thought when I updated the driver to move to a ahash interface, but the main usage of crc32 is the ext4 fs, that calls the shash API. Commit 877b5691f27a ("crypto: shash - remove shash_desc::flags") removed possibility to sleep in shash callback. (before this commit and with MAY_SLEEP option set, using a mutex may have been fine). By now the solution I see is to use the spin_trylock_irqsave(), fallback to software crc *AND* capping burst_size to ensure the locked section stay reasonable. Does this seems acceptable ? Nicolas. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel