From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B52EECA6007 for ; Thu, 8 Oct 2026 10:15:00 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: Content-Type:In-Reply-To:From:References:Cc:To:Subject:MIME-Version:Date: Message-ID:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=mdRZrJtN9FgdZCPO3nME/34pN1D6OmSnqjEe0tYXdVE=; b=l+VcnNpdZ9koEr8ukbMDoVYIcq VyvbhZHMxptmfU/d7AuMfsulyhSPm36HikLAJAnp1NBEQ0a+iGynEhuTMPz6ojrMQ1GX2281E445f 3JL+nhIJ2hd5eZEDlsxnhRUiroqAPWTuXHnBImpxgp5u36i+amqiFZOzo3ddclEOiy4LP6COioej/ rJt33o0MTQKrW4gyBAFbP5djtMR+C4KUtt1XaMdYOTnVisH/KdmEJLhlK9GNMFUm1ZuxQnhT4EC8u AZgtFNxq4t0tVwCbjOnQn+DkQxtahhbI1S6KnbOKMmqLptjEPPF4nJvqzXRenLESA8WwZ3w1E3IbD j8LJDoAQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.99.1 #2 (Red Hat Linux)) id 1xEl9G-000000044vv-0vTY; Thu, 08 Oct 2026 10:14:50 +0000 Received: from smtpout-02.galae.net ([185.246.84.56]) by bombadil.infradead.org with esmtps (Exim 4.99.1 #2 (Red Hat Linux)) id 1xEl9C-000000044v0-29m2 for linux-arm-kernel@lists.infradead.org; Thu, 08 Oct 2026 10:14:48 +0000 Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-02.galae.net (Postfix) with ESMTPS id 32D551A1196; Thu, 8 Oct 2026 10:14:42 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id EFE5B60341; Thu, 8 Oct 2026 10:14:41 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 3C50410333874; Thu, 8 Oct 2026 12:14:33 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1791454480; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:content-language:in-reply-to:references; bh=mdRZrJtN9FgdZCPO3nME/34pN1D6OmSnqjEe0tYXdVE=; b=DmDHRn5CPrt/BbOThmCBjnAmlKyqU3XDz6zCOs0/WG5jeiwuZRNwtdARLhor8mGpKXY/xy UUdQUvpw8i8nR+GfitrKZkypI3S1FlaPf9x9cijrs89n7nfMQLLTchQA25kw/uxI2aenOp 8Mafjhf8QH0ka1ZPYz/sS6lsGUge9/VF8dpF3CV1Qj+HnrbWdTkRzpzyBJD0WFvv/IBO18 dJuFjfmteEw2F1O59bnMnh/gBUQ0BRwX/1wcYV9lKujGo8WbUv/rxruhLC3ay5kmzcWqu4 eu06kzZl+6x4o4N10U896lHWeQ3wgdtyI0xNs2SPDB3iNmAFh1PEYXYG7LGRtg== Message-ID: Date: Thu, 8 Oct 2026 12:14:31 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH net-next v2] net: stmmac: dwxgmac2: enable L2 split header support To: Sagar Cheluvegowda , Andrew Lunn , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Maxime Coquelin , Alexandre Torgue Cc: netdev@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Lorenzo Bianconi , Hongmei Xu , Abhishek Chauhan , Sarosh Hasan References: <20261007183905.2582759-1-sagar.cheluvegowda@oss.qualcomm.com> Content-Language: en-US From: Maxime Chevallier In-Reply-To: <20261007183905.2582759-1-sagar.cheluvegowda@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Last-TLS-Session-Version: TLSv1.3 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20261008_031446_844935_E0BC3991 X-CRM114-Status: GOOD ( 22.07 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi, On 10/7/26 20:39, Sagar Cheluvegowda wrote: > XGMAC2 doesn't program the MAC extended configuration registers > needed for L2 header splitting when split-header mode is enabled, > so tagged AV packets can't use the split-header path. Configure > split mode (SPLM) and header saving (SAVE_EN) in XGMAC_EXT_CFG1, > extending the dwmac4 sequence added by commit d10f1a4e44c3 ("net: > stmmac: Programming sequence for VLAN packets with split header") > to XGMAC2. > > Also fix the RX header-length calculation for split-header > descriptors. Per the XGMAC2 descriptor format, RDES3's L34T and > L2T fields are only valid on the last descriptor (LD set); on a > non-last descriptor they can hold stale write-back data from a > previous packet. Read the header length from RDES2[9:0] directly > for non-last descriptors, and only consult L34T/L2T on the last > descriptor: RDES2[9:0] for IP packets (L34T set) and RDES2[9:2] > for non-IP packets (L2T set). > > Finally, disable the variable-length preamble when L2 splitting > is enabled. A variable-length preamble shifts the position of the > Ethernet header, making the L2 split offset non-deterministic. > > Co-developed-by: Abhishek Chauhan > Signed-off-by: Abhishek Chauhan > Co-developed-by: Sarosh Hasan > Signed-off-by: Sarosh Hasan > Signed-off-by: Sagar Cheluvegowda > --- > v2: > - Add XGMAC_CONFIG1_SPLM_MASK and use it in XGMAC_CONFIG1_SPLM() > v1: https://lore.kernel.org/netdev/20260922232116.889630-1-sagar.cheluvegowda@oss.qualcomm.com/ > > drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h | 8 ++++++++ > drivers/net/ethernet/stmicro/stmmac/dwxgmac2_descs.c | 12 +++++++++++- > drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c | 10 ++++++++++ > 3 files changed, 29 insertions(+), 1 deletion(-) > > diff --git a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h > index f8ab347f7b5b..fb29dd489714 100644 > --- a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h > +++ b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h > @@ -167,6 +167,12 @@ > #define XGMAC_HW_FEATURE4 0x0000012c > #define XGMAC_HWFEAT_EASP BIT(4) > #define XGMAC_HWFEAT_PCSEL GENMASK(1, 0) > +#define XGMAC_EXT_CFG0 0x140 Let's keep it coherent and use 0x00000140 > +#define XGMAC_EXT_CFG0_VPRE BIT(8) > +#define XGMAC_EXT_CFG1 0x00000144 > +#define XGMAC_CONFIG1_SAVE_EN BIT(24) > +#define XGMAC_CONFIG1_SPLM_MASK GENMASK(9, 8) > +#define XGMAC_CONFIG1_SPLM(v) FIELD_PREP(XGMAC_CONFIG1_SPLM_MASK, v) > #define XGMAC_MAC_DPP_FSM_INT_STATUS 0x00000150 > #define XGMAC_MAC_FSM_CONTROL 0x00000158 > #define XGMAC_PRTYEN BIT(1) > @@ -434,6 +440,7 @@ > #define XGMAC_RDES2_L4FM BIT(28) > #define XGMAC_RDES2_L3FM BIT(27) > #define XGMAC_RDES2_HL GENMASK(9, 0) > +#define XGMAC_RDES2_NONIPHL GENMASK(9, 2) > #define XGMAC_RDES3_OWN BIT(31) > #define XGMAC_RDES3_CTXT BIT(30) > #define XGMAC_RDES3_IOC BIT(30) > @@ -441,6 +448,7 @@ > #define XGMAC_RDES3_CDA BIT(27) > #define XGMAC_RDES3_RSV BIT(26) > #define XGMAC_RDES3_L34T GENMASK(23, 20) > +#define XGMAC_RDES3_L2T GENMASK(19, 16) > #define XGMAC_RDES3_ET_LT GENMASK(19, 16) > #define XGMAC_L34T_IP4TCP 0x1 > #define XGMAC_L34T_IP4UDP 0x2 > diff --git a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_descs.c b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_descs.c > index 6719ac6e395b..65ac5403ec58 100644 > --- a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_descs.c > +++ b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_descs.c > @@ -292,8 +292,18 @@ static int dwxgmac2_get_rx_hash(struct dma_desc *p, u32 *hash, > > static void dwxgmac2_get_rx_header_len(struct dma_desc *p, unsigned int *len) > { > - if (le32_to_cpu(p->des3) & XGMAC_RDES3_L34T) > + u32 rdes3 = le32_to_cpu(p->des3); > + > + /* when FD=1 and LD=0, HL is RDES2[9:0] */ > + if (!(rdes3 & XGMAC_RDES3_LD)) { > + *len = le32_to_cpu(p->des2) & XGMAC_RDES2_HL; > + return; > + } > + > + if (rdes3 & XGMAC_RDES3_L34T) > *len = le32_to_cpu(p->des2) & XGMAC_RDES2_HL; > + else if (rdes3 & XGMAC_RDES3_L2T) > + *len = (le32_to_cpu(p->des2) & XGMAC_RDES2_NONIPHL) >> 2; > } > > static void dwxgmac2_set_sec_addr(struct dma_desc *p, dma_addr_t addr, bool is_valid) > diff --git a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c > index ff83858ebc1f..0a9c787305a4 100644 > --- a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c > +++ b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c > @@ -561,6 +561,16 @@ static void dwxgmac2_enable_sph(struct stmmac_priv *priv, void __iomem *ioaddr, > value |= XGMAC_CONFIG_HDSMS_256; /* Segment max 256 bytes */ > writel(value, ioaddr + XGMAC_RX_CONFIG); > > + value = readl(ioaddr + XGMAC_EXT_CFG1); > + value |= XGMAC_CONFIG1_SPLM(1); > + value |= XGMAC_CONFIG1_SAVE_EN; > + writel(value, ioaddr + XGMAC_EXT_CFG1); > + > + /* Disable variable preambles to keep the L2 split offset deterministic. */ > + value = readl(ioaddr + XGMAC_EXT_CFG0); > + value &= ~XGMAC_EXT_CFG0_VPRE; > + writel(value, ioaddr + XGMAC_EXT_CFG0); > + > value = readl(ioaddr + XGMAC_DMA_CH_CONTROL(chan)); > if (en) > value |= XGMAC_SPH; The rest looks good to me :) Maxime