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From: neil.armstrong@linaro.org
To: AngeloGioacchino Del Regno
	<angelogioacchino.delregno@collabora.com>,
	chunfeng.yun@mediatek.com
Cc: vkoul@kernel.org, kishon@kernel.org, matthias.bgg@gmail.com,
	linux-arm-kernel@lists.infradead.org,
	linux-mediatek@lists.infradead.org,
	linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org,
	kernel@collabora.com
Subject: Re: [PATCH v1 1/2] phy: mediatek: tphy: Clarify and add kerneldoc to mtk_phy_pdata
Date: Tue, 24 Jun 2025 09:25:45 +0200	[thread overview]
Message-ID: <bfba6751-2fd4-4183-b6d4-b1440a4fc98f@linaro.org> (raw)
In-Reply-To: <20250623120315.109881-2-angelogioacchino.delregno@collabora.com>

On 23/06/2025 14:03, AngeloGioacchino Del Regno wrote:
> As struct mtk_phy_pdata was almost fully documented, transfer
> the comments into kerneldoc on top.
> While at it, also rewrite the comments to both improve the writing
> writing and the actual information in the documentation, and add a
> description for the `version` member of the structure.
> 
> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
> ---
>   drivers/phy/mediatek/phy-mtk-tphy.c | 20 ++++++++++----------
>   1 file changed, 10 insertions(+), 10 deletions(-)
> 
> diff --git a/drivers/phy/mediatek/phy-mtk-tphy.c b/drivers/phy/mediatek/phy-mtk-tphy.c
> index 644a34bd2b0b..858824b4476e 100644
> --- a/drivers/phy/mediatek/phy-mtk-tphy.c
> +++ b/drivers/phy/mediatek/phy-mtk-tphy.c
> @@ -277,19 +277,19 @@ enum mtk_phy_version {
>   	MTK_PHY_V3,
>   };
>   
> +/**
> + * mtk_phy_pdata - SoC specific platform data
> + * @avoid_rx_sen_degradation: Avoid TX Sensitivity level degradation (MT6795/8173 only)
> + * @sw_pll_48m_to_26m:        Workaround for V3 IP (MT8195) - switch the 48MHz PLL from
> + *                            fractional mode to integer to output 26MHz for U2PHY
> + * @sw_efuse_supported:       Switches off eFuse auto-load from PHY and applies values
> + *                            read from different nvmem (usually different eFuse array)
> + *                            that is pointed at in the device tree node for this PHY
> + * @version:                  PHY IP Version
> + */
>   struct mtk_phy_pdata {
> -	/* avoid RX sensitivity level degradation only for mt8173 */
>   	bool avoid_rx_sen_degradation;
> -	/*
> -	 * workaround only for mt8195, HW fix it for others of V3,
> -	 * u2phy should use integer mode instead of fractional mode of
> -	 * 48M PLL, fix it by switching PLL to 26M from default 48M
> -	 */
>   	bool sw_pll_48m_to_26m;
> -	/*
> -	 * Some SoCs (e.g. mt8195) drop a bit when use auto load efuse,
> -	 * support sw way, also support it for v2/v3 optionally.
> -	 */
>   	bool sw_efuse_supported;
>   	enum mtk_phy_version version;
>   };

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>


  reply	other threads:[~2025-06-24  7:40 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-06-23 12:03 [PATCH v1 0/2] MediaTek TPHY Cleanups AngeloGioacchino Del Regno
2025-06-23 12:03 ` [PATCH v1 1/2] phy: mediatek: tphy: Clarify and add kerneldoc to mtk_phy_pdata AngeloGioacchino Del Regno
2025-06-24  7:25   ` neil.armstrong [this message]
2025-06-23 12:03 ` [PATCH v1 2/2] phy: mediatek: tphy: Cleanup and document slew calibration AngeloGioacchino Del Regno
2025-06-24  7:28   ` neil.armstrong
2025-06-27  0:47 ` [PATCH v1 0/2] MediaTek TPHY Cleanups Vinod Koul

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