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From: zhichang.yuan02@gmail.com (zhichang.yuan)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH V8 5/6] ACPI: Support the probing on the devices which apply indirect-IO
Date: Sat, 1 Apr 2017 10:16:53 +0800	[thread overview]
Message-ID: <bfdf2de0-c309-0139-4075-dfcd678b6d51@gmail.com> (raw)
In-Reply-To: <CAJZ5v0gZdghH7jjd-zMmqXNkuvVVVSPDHfBrJXx5OXR2NE0KgA@mail.gmail.com>



On 04/01/2017 07:02 AM, Rafael J. Wysocki wrote:
> On Fri, Mar 31, 2017 at 8:52 AM, zhichang.yuan
> <yuanzhichang@hisilicon.com> wrote:
>> Hi, Rafael,
>>
>> Thanks for reviewing this!
>>
>> On 2017/3/31 4:31, Rafael J. Wysocki wrote:
>>> On Thursday, March 30, 2017 11:26:58 PM zhichang.yuan wrote:
>>>> On some platforms(such as Hip06/Hip07), the legacy ISA/LPC devices access I/O
>>>> with some special host-local I/O ports known on x86. To access the I/O
>>>> peripherals, an indirect-IO mechanism is introduced to mapped the host-local
>>>> I/O to system logical/fake PIO similar the PCI MMIO on architectures where no
>>>> separate I/O space exists. Just as PCI MMIO, the host I/O range should be
>>>> registered before probing the downstream devices and set up the I/O mapping.
>>>> But current ACPI bus probing doesn't support these indirect-IO hosts/devices.
>>>>
>>>> This patch introdueces a new ACPI handler for this device category. Through the
>>>> handler attach callback, the indirect-IO hosts I/O registration is done and
>>>> all peripherals' I/O resources are translated into logic/fake PIO before
>>>> starting the enumeration.
>>>
>>> Can you explain to me briefly what exactly this code is expected to be doing?
>>
>> As you know currently for ARM architecture IO space is memory mapped and
>> is only used by pci devices. The port number is dynamically allocated
>> converting the device IO address into a PIO token: i.e.
>> http://lxr.free-electrons.com/source/drivers/acpi/pci_root.c#L745
>> This patch is meant to support a new class of IO host controller
>> that are not PCI based and that still require to have the IO addresses
>> be translated in the same PIO token space as the PCI controller
> 
> IOW, this is ARM-specific, right?

Yes. The current host added in this patch with _HID "HISI0191" is on ARM64.
But, I think the handler driver is architecture dependent.

Thanks,
Zhichang

> 
> Thanks,
> Rafael
> 

  reply	other threads:[~2017-04-01  2:16 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-03-30 15:26 [PATCH V8 0/7] LPC: legacy ISA I/O support zhichang.yuan
2017-03-30 15:26 ` [PATCH V8 1/6] LIBIO: Introduce a generic PIO mapping method zhichang.yuan
2017-04-01  5:58   ` kbuild test robot
2017-04-05 12:18     ` zhichang.yuan
2017-04-01  6:31   ` kbuild test robot
2017-03-30 15:26 ` [PATCH V8 2/6] PCI: Apply the new generic I/O management on PCI IO hosts zhichang.yuan
2017-03-30 15:26 ` [PATCH V8 3/6] OF: Add missing I/O range exception for indirect-IO devices zhichang.yuan
2017-03-30 15:26 ` [PATCH V8 4/6] LPC: Support the device-tree LPC host on Hip06/Hip07 zhichang.yuan
2017-03-30 15:26 ` [PATCH V8 5/6] ACPI: Support the probing on the devices which apply indirect-IO zhichang.yuan
2017-03-30 20:31   ` Rafael J. Wysocki
2017-03-31  6:52     ` zhichang.yuan
2017-03-31 23:02       ` Rafael J. Wysocki
2017-04-01  2:16         ` zhichang.yuan [this message]
2017-04-01  9:52           ` Rafael J. Wysocki
2017-04-02 14:58             ` Gabriele Paoloni
2017-04-20 20:57   ` dann frazier
2017-04-21  2:22     ` zhichang.yuan
2017-04-21 17:14       ` Lorenzo Pieralisi
2017-03-30 15:26 ` [PATCH V8 6/6] LPC: Add the ACPI LPC support zhichang.yuan
2017-03-30 21:42 ` [PATCH V8 0/7] LPC: legacy ISA I/O support dann frazier
2017-03-31  6:36   ` zhichang.yuan

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