Re: [PATCH 4/5] drm: lcdif: move pitch setup to plane atomic update

From: Marek Vasut <marex@denx.de>
To: Lucas Stach <l.stach@pengutronix.de>, Liu Ying <victor.liu@nxp.com>
Cc: Pengutronix Kernel Team <kernel@pengutronix.de>,
	NXP Linux Team <linux-imx@nxp.com>,
	dri-devel@lists.freedesktop.org,
	linux-arm-kernel@lists.infradead.org,
	patchwork-lst@pengutronix.de
Subject: Re: [PATCH 4/5] drm: lcdif: move pitch setup to plane atomic update
Date: Wed, 20 Sep 2023 19:32:47 +0200	[thread overview]
Message-ID: <c01540fa-b99a-96d8-95f9-aae582afcf80@denx.de> (raw)
In-Reply-To: <20230920103126.2759601-5-l.stach@pengutronix.de>

On 9/20/23 12:31, Lucas Stach wrote:
> The buffer pitch may change when switching the buffer on a
> atomic update. As the register is double buffered it can be
> safely changed while the display is active.
> 
> Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
> ---
>   drivers/gpu/drm/mxsfb/lcdif_kms.c | 26 +++++++++++++-------------
>   1 file changed, 13 insertions(+), 13 deletions(-)
> 
> diff --git a/drivers/gpu/drm/mxsfb/lcdif_kms.c b/drivers/gpu/drm/mxsfb/lcdif_kms.c
> index 33a082366b25..3ebf55d06027 100644
> --- a/drivers/gpu/drm/mxsfb/lcdif_kms.c
> +++ b/drivers/gpu/drm/mxsfb/lcdif_kms.c
> @@ -327,19 +327,6 @@ static void lcdif_set_mode(struct lcdif_drm_private *lcdif, u32 bus_flags)
>   	writel(CTRLDESCL0_1_HEIGHT(m->vdisplay) |
>   	       CTRLDESCL0_1_WIDTH(m->hdisplay),
>   	       lcdif->base + LCDC_V8_CTRLDESCL0_1);
> -
> -	/*
> -	 * Undocumented P_SIZE and T_SIZE bitfields written in the downstream
> -	 * driver. Those bitfields control the AXI burst size. As of now there
> -	 * are two known values:
> -	 *  1 - 128Byte
> -	 *  2 - 256Byte
> -	 * Downstream sets this to 256B burst size to improve the memory access
> -	 * efficiency so set it here too.
> -	 */
> -	ctrl = CTRLDESCL0_3_P_SIZE(2) | CTRLDESCL0_3_T_SIZE(2) |
> -	       CTRLDESCL0_3_PITCH(lcdif->crtc.primary->state->fb->pitches[0]);
> -	writel(ctrl, lcdif->base + LCDC_V8_CTRLDESCL0_3);
>   }
>   
>   static void lcdif_enable_controller(struct lcdif_drm_private *lcdif)
> @@ -689,6 +676,19 @@ static void lcdif_plane_primary_atomic_update(struct drm_plane *plane,
>   		writel(CTRLDESCL_HIGH0_4_ADDR_HIGH(upper_32_bits(paddr)),
>   		       lcdif->base + LCDC_V8_CTRLDESCL_HIGH0_4);
>   	}
> +
> +	/*
> +	 * Undocumented P_SIZE and T_SIZE bitfields written in the downstream
> +	 * driver. Those bitfields control the AXI burst size. As of now there
> +	 * are two known values:
> +	 *  1 - 128Byte
> +	 *  2 - 256Byte
> +	 * Downstream sets this to 256B burst size to improve the memory access
> +	 * efficiency so set it here too.
> +	 */
> +	writel(CTRLDESCL0_3_P_SIZE(2) | CTRLDESCL0_3_T_SIZE(2) |
> +	       CTRLDESCL0_3_PITCH(new_pstate->fb->pitches[0]),
> +	       lcdif->base + LCDC_V8_CTRLDESCL0_3);
>   }
>   
>   static bool lcdif_format_mod_supported(struct drm_plane *plane,

Reviewed-by: Marek Vasut <marex@denx.de>

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