From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.6 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, NICE_REPLY_A,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 92B60C433E6 for ; Mon, 18 Jan 2021 13:35:20 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 335D42065E for ; Mon, 18 Jan 2021 13:35:20 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 335D42065E Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:Date:Message-ID:From: References:To:Subject:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=y22DjWzBCTvRqA6g1ezcaMcvzu4WkkS7taeG+4mtHJ8=; b=QNJcxX+3C9EvfzWiUNDrOtejY RTbHgh1oqeQWqj6SdiocDPB7od09I5uNqyE5qQ7MFwCCVvB+BPMKhdee0K7QdPIlrUp6hWT2bIxEA cKO0jL1X7+ZUOVnQj/po+C/1SivX+zsgPoVRWRS8IH4hIZElWJvqnVlqo0yA0sR0ShnqABZ96tl1M mCG1NGx3RiZqHqxi1oE4+zyHe8h5IVVrcZBrmpZp4JDOtBijkpWazhQ8HplJuMBpGdpt5b21DkLMl NTJag8j/YjfeKH0AvQl8z64hqup4HLn0ad6kYoTJcTTtnZcPMmvKv42bj3ym69C4FpFf7Wp3Y6wCO ciA1UpjDg==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1l1UfI-0001o1-3Z; Mon, 18 Jan 2021 13:33:52 +0000 Received: from foss.arm.com ([217.140.110.172]) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1l1UfG-0001nN-5O for linux-arm-kernel@lists.infradead.org; Mon, 18 Jan 2021 13:33:50 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 4869E31B; Mon, 18 Jan 2021 05:33:49 -0800 (PST) Received: from [10.37.8.29] (unknown [10.37.8.29]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 57ABE3F719; Mon, 18 Jan 2021 05:33:47 -0800 (PST) Subject: Re: [PATCH v3 3/4] arm64: mte: Enable async tag check fault To: Catalin Marinas References: <20210115120043.50023-1-vincenzo.frascino@arm.com> <20210115120043.50023-4-vincenzo.frascino@arm.com> <20210118125715.GA4483@gaia> From: Vincenzo Frascino Message-ID: Date: Mon, 18 Jan 2021 13:37:35 +0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 MIME-Version: 1.0 In-Reply-To: <20210118125715.GA4483@gaia> Content-Language: en-US X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210118_083350_250020_230BA7A0 X-CRM114-Status: GOOD ( 17.45 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Branislav Rankov , Marco Elver , Andrey Konovalov , Evgenii Stepanov , linux-kernel@vger.kernel.org, kasan-dev@googlegroups.com, Alexander Potapenko , linux-arm-kernel@lists.infradead.org, Andrey Ryabinin , Will Deacon , Dmitry Vyukov Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 1/18/21 12:57 PM, Catalin Marinas wrote: >> +#ifdef CONFIG_KASAN_HW_TAGS >> +void mte_check_tfsr_el1_no_sync(void) >> +{ >> + u64 tfsr_el1; >> + >> + if (!system_supports_mte()) >> + return; >> + >> + tfsr_el1 = read_sysreg_s(SYS_TFSR_EL1); >> + >> + /* >> + * The kernel should never hit the condition TF0 == 1 >> + * at this point because for the futex code we set >> + * PSTATE.TCO. >> + */ >> + WARN_ON(tfsr_el1 & SYS_TFSR_EL1_TF0); > I'd change this to a WARN_ON_ONCE() in case we trip over this due to > model bugs etc. and it floods the log. > I will merge yours and Mark's comment using WARN_ONCE() here. Did not think of potential bug in the model and you are completely right. >> + if (tfsr_el1 & SYS_TFSR_EL1_TF1) { >> + write_sysreg_s(0, SYS_TFSR_EL1); >> + isb(); > While in general we use ISB after a sysreg update, I haven't convinced > myself it's needed here. There's no side-effect to updating this reg and > a subsequent TFSR access should see the new value. Why there is no side-effect? > If a speculated load is allowed to update this reg, we'd probably need an > ISB+DSB (I don't think it does, something to check with the architects). > I will check this with the architects and let you know. -- Regards, Vincenzo _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel