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Thu, 13 Mar 2025 18:09:36 +0100 (CET) Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-ap.st.com (STMicroelectronics) with ESMTP id 1780B4004D; Thu, 13 Mar 2025 18:08:27 +0100 (CET) Received: from Webmail-eu.st.com (eqndag1node5.st.com [10.75.129.134]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id B3E4E589337; Thu, 13 Mar 2025 18:07:18 +0100 (CET) Received: from SAFDAG1NODE1.st.com (10.75.90.17) by EQNDAG1NODE5.st.com (10.75.129.134) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Thu, 13 Mar 2025 18:07:18 +0100 Received: from [10.48.86.222] (10.48.86.222) by SAFDAG1NODE1.st.com (10.75.90.17) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Thu, 13 Mar 2025 18:07:17 +0100 Message-ID: Date: Thu, 13 Mar 2025 18:07:16 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 2/8] mfd: stm32-lptimer: add support for stm32mp25 To: Lee Jones CC: , , , , , , , , , , , , , , , , , References: <20250305094935.595667-1-fabrice.gasnier@foss.st.com> <20250305094935.595667-3-fabrice.gasnier@foss.st.com> <20250313164008.GC3645863@google.com> Content-Language: en-US From: Fabrice Gasnier In-Reply-To: <20250313164008.GC3645863@google.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-Originating-IP: [10.48.86.222] X-ClientProxiedBy: EQNCAS1NODE3.st.com (10.75.129.80) To SAFDAG1NODE1.st.com (10.75.90.17) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1093,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-03-13_08,2025-03-11_02,2024-11-22_01 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250313_100944_384944_A69A8E0A X-CRM114-Status: GOOD ( 14.22 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 3/13/25 17:40, Lee Jones wrote: > On Wed, 05 Mar 2025, Fabrice Gasnier wrote: > >> Add support for STM32MP25 SoC. >> A new hardware configuration register (HWCFGR2) has been added, to gather >> number of capture/compare channels, autonomous mode and input capture >> capability. The full feature set is implemented in LPTIM1/2/3/4. LPTIM5 >> supports a smaller set of features. This can now be read from HWCFGR >> registers. >> >> Add new registers to the stm32-lptimer.h: CCMR1, CCR2, HWCFGR1/2 and VERR. >> Update the stm32_lptimer data struct so signal the number of >> capture/compare channels to the child devices. >> Also Remove some unused bit masks (CMPOK_ARROK / CMPOKCF_ARROKCF). >> >> Signed-off-by: Fabrice Gasnier >> --- >> Changes in V2: >> - rely on fallback compatible as no specific .data is associated to the >> driver. Compatibility is added by reading hardware configuration >> registers. >> - read version register, to be used by clockevent child driver >> - rename register/bits definitions >> --- >> drivers/mfd/stm32-lptimer.c | 33 ++++++++++++++++++++++++++++- > > Looks okay. Hi Lee, Thanks for reviewing, > >> include/linux/mfd/stm32-lptimer.h | 35 ++++++++++++++++++++++++++++--- > > Assumingly this patch is not independent of the others? Please hold on, I'll submit a V4, with some additional bit definition for the clocksource driver (see my last reply to Daniel). Best Regards, Fabrice >