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* A quick question about ASID on KPTI
@ 2020-03-03  1:08 FF
  2020-03-03  9:45 ` Catalin Marinas
  0 siblings, 1 reply; 2+ messages in thread
From: FF @ 2020-03-03  1:08 UTC (permalink / raw)
  To: linux-arm-kernel


hi  folks,

i am look at some patches about the KPTI on ARM64, a quick question about the ASDI on KPTI:
On KPIT, it will allocate a pairs ASID for a process, when the process running on kernel space, it will set the even ASID into TTBR1 register in tramp_map_kernel function, when the process running on User space, it will set the odd ASID into the TTBR1 register in tramp_unmap_kernel function.
my question is, when the process running in kernel space, if the process want to access the userspace address by copy_to/from_user(), the CPU will look-up the TLB with even ASID or odd ASID? if it use even ASID to look-up  TLB for userspace, it will always TLB miss, that will be performance impact. is it right? pls correct me if i am wrong.

Best
Ben
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* Re: A quick question about ASID on KPTI
  2020-03-03  1:08 A quick question about ASID on KPTI FF
@ 2020-03-03  9:45 ` Catalin Marinas
  0 siblings, 0 replies; 2+ messages in thread
From: Catalin Marinas @ 2020-03-03  9:45 UTC (permalink / raw)
  To: FF; +Cc: linux-arm-kernel

On Tue, Mar 03, 2020 at 09:08:00AM +0800, FF wrote:
> i am look at some patches about the KPTI on ARM64, a quick question
> about the ASDI on KPTI:
> On KPIT, it will allocate a pairs ASID for a process, when the process
> running on kernel space, it will set the even ASID into TTBR1 register
> in tramp_map_kernel function, when the process running on User space,
> it will set the odd ASID into the TTBR1 register in tramp_unmap_kernel
> function.

Correct.

> my question is, when the process running in kernel space, if the
> process want to access the userspace address by copy_to/from_user(),
> the CPU will look-up the TLB with even ASID or odd ASID?

The even ASID as that's the current one.

> if it use even ASID to look-up  TLB for userspace, it will always TLB
> miss, that will be performance impact. is it right?

As with any other TLB miss, a TLB entry will be allocated and may or may
not be removed, depending on what other activities happen on the CPU. In
theory, there is a small performance impact but I don't think it's
significant in practice (with real-world benchmarks).

-- 
Catalin

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