From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 86A9BC4345F for ; Mon, 22 Apr 2024 16:06:20 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:Content-Type: Content-Transfer-Encoding:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:From:References:Cc:To:Subject: MIME-Version:Date:Message-ID:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=9LQY5DLC1Vgur3n5oLgIo7MZJ300AueqGbAH5rxzSSk=; b=DrLk1F1q1BHT2E DK9Vt27/tau0UhjzxdUjAhmO6TP8GrKOPkzw0zbbIZ3mkPt41wT8wW1Uh0aR56DKRTVsI3oaHOUHa jo1zvr4Tp/c9n5c0JHDdKSX46TsOGb1WreRO35dlObWKQJPhiXyh9U4GZdxfZhkNzdqrNkA4bu3bX a7dpBlSE8wHwpBHwbAsP3pj5DU2iLGJ944hjRbis/I4bJoZjQcDeu6NENJdv5h6sy6FoDwkuuwLxr gGOQi83S49U2bZIMKTBeidWsobT1ZmKNAYkI8Riyn/iJybarzDs3qDlsoinZ61d94cNy7nrMQvKSg 1aEhXi0ypY9KhaI+Mf5g==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rywB9-0000000EDyJ-31Xy; Mon, 22 Apr 2024 16:06:03 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rywB5-0000000EDxC-2Gdb for linux-arm-kernel@lists.infradead.org; Mon, 22 Apr 2024 16:06:01 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 42D0D339; Mon, 22 Apr 2024 09:06:26 -0700 (PDT) Received: from [10.57.84.177] (unknown [10.57.84.177]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 5534A3F7BD; Mon, 22 Apr 2024 09:05:56 -0700 (PDT) Message-ID: Date: Mon, 22 Apr 2024 17:05:54 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [kvm-unit-tests PATCH 08/33] arm: realm: Make uart available before MMU is enabled Content-Language: en-GB To: Alexandru Elisei Cc: kvmarm@lists.linux.dev, kvm@vger.kernel.org, linux-coco@lists.linux.dev, linux-arm-kernel@lists.infradead.org, maz@kernel.org, joey.gouly@arm.com, steven.price@arm.com, james.morse@arm.com, oliver.upton@linux.dev, yuzenghui@huawei.com, andrew.jones@linux.dev, eric.auger@redhat.com References: <20240412103408.2706058-1-suzuki.poulose@arm.com> <20240412103408.2706058-9-suzuki.poulose@arm.com> From: Suzuki K Poulose In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240422_090559_703994_F8AA6C76 X-CRM114-Status: GOOD ( 22.54 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 22/04/2024 16:38, Alexandru Elisei wrote: > Hi, > > On Fri, Apr 12, 2024 at 11:33:43AM +0100, Suzuki K Poulose wrote: >> From: Joey Gouly >> >> A Realm must access any emulated I/O mappings with the PTE_NS_SHARED bit set. > > What entity requires that a realm must access I/O mappings with the > PTE_NS_SHARED bit set? Is that an architectural requirement? Or is it an > implementation choice made by the VMM and/or KVM? RMM spec. An MMIO access in the Protected IPA must be emulated by Realm world. If an MMIO access must be emulated by NS Host, it must be in the Unprotected IPA. Technically, a VMM could create a memory map, where the NS emulated I/O are kept in the unprotected (upper) half. Or the VMM retains the current model and expects the Realm to use the "Unprotected" alias. Either way, applying the PTE_NS_SHARED attribute doesn't change anything and works for both the models, as far as the Realm is concerned. Suzuki > > Thanks, > Alex > >> This is modelled as a PTE attribute, but is actually part of the address. >> >> So, when MMU is disabled, the "physical address" must reflect this bit set. We >> access the UART early before the MMU is enabled. So, make sure the UART is >> accessed always with the bit set. >> >> Signed-off-by: Joey Gouly >> Signed-off-by: Suzuki K Poulose >> --- >> lib/arm/asm/pgtable.h | 5 +++++ >> lib/arm/io.c | 24 +++++++++++++++++++++++- >> lib/arm64/asm/pgtable.h | 5 +++++ >> 3 files changed, 33 insertions(+), 1 deletion(-) >> >> diff --git a/lib/arm/asm/pgtable.h b/lib/arm/asm/pgtable.h >> index 350039ff..7e85e7c6 100644 >> --- a/lib/arm/asm/pgtable.h >> +++ b/lib/arm/asm/pgtable.h >> @@ -112,4 +112,9 @@ static inline pte_t *pte_alloc(pmd_t *pmd, unsigned long addr) >> return pte_offset(pmd, addr); >> } >> >> +static inline unsigned long arm_shared_phys_alias(void *x) >> +{ >> + return ((unsigned long)(x) | PTE_NS_SHARED); >> +} >> + >> #endif /* _ASMARM_PGTABLE_H_ */ >> diff --git a/lib/arm/io.c b/lib/arm/io.c >> index 836fa854..127727e4 100644 >> --- a/lib/arm/io.c >> +++ b/lib/arm/io.c >> @@ -15,6 +15,8 @@ >> #include >> #include >> #include >> +#include >> +#include >> >> #include "io.h" >> >> @@ -30,6 +32,24 @@ static struct spinlock uart_lock; >> static volatile u8 *uart0_base = UART_EARLY_BASE; >> bool is_pl011_uart; >> >> +static inline volatile u8 *get_uart_base(void) >> +{ >> + /* >> + * The address of the UART base may be different >> + * based on whether we are running with/without >> + * MMU enabled. >> + * >> + * For realms, we must force to use the shared physical >> + * alias with MMU disabled, to make sure the I/O can >> + * be emulated. >> + * When the MMU is turned ON, the mappings are created >> + * appropriately. >> + */ >> + if (mmu_enabled()) >> + return uart0_base; >> + return (u8 *)arm_shared_phys_alias((void *)uart0_base); >> +} >> + >> static void uart0_init_fdt(void) >> { >> /* >> @@ -109,9 +129,11 @@ void io_init(void) >> >> void puts(const char *s) >> { >> + volatile u8 *uart_base = get_uart_base(); >> + >> spin_lock(&uart_lock); >> while (*s) >> - writeb(*s++, uart0_base); >> + writeb(*s++, uart_base); >> spin_unlock(&uart_lock); >> } >> >> diff --git a/lib/arm64/asm/pgtable.h b/lib/arm64/asm/pgtable.h >> index 5b9f40b0..871c03e9 100644 >> --- a/lib/arm64/asm/pgtable.h >> +++ b/lib/arm64/asm/pgtable.h >> @@ -28,6 +28,11 @@ extern unsigned long prot_ns_shared; >> */ >> #define PTE_NS_SHARED (prot_ns_shared) >> >> +static inline unsigned long arm_shared_phys_alias(void *addr) >> +{ >> + return ((unsigned long)addr | PTE_NS_SHARED); >> +} >> + >> /* >> * Highest possible physical address supported. >> */ >> -- >> 2.34.1 >> _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel