From: Ilkka Koskinen <ilkka@os.amperecomputing.com>
To: James Clark <james.clark@linaro.org>
Cc: Ilkka Koskinen <ilkka@os.amperecomputing.com>,
linux-arm-kernel@lists.infradead.org,
linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org,
John Garry <john.g.garry@oracle.com>,
Will Deacon <will@kernel.org>,
Mike Leach <mike.leach@linaro.org>, Leo Yan <leo.yan@linux.dev>,
Peter Zijlstra <peterz@infradead.org>,
Ingo Molnar <mingo@redhat.com>,
Arnaldo Carvalho de Melo <acme@kernel.org>,
Namhyung Kim <namhyung@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Alexander Shishkin <alexander.shishkin@linux.intel.com>,
Jiri Olsa <jolsa@kernel.org>, Ian Rogers <irogers@google.com>,
Adrian Hunter <adrian.hunter@intel.com>,
"Liang, Kan" <kan.liang@linux.intel.com>
Subject: Re: [PATCH] perf vendor events arm64 AmpereOneX: Fix typo - should be l1d_cache_access_prefetches
Date: Wed, 10 Sep 2025 12:46:24 -0700 (PDT) [thread overview]
Message-ID: <c48690ca-f7d-e711-5b9a-d18c138568d@os.amperecomputing.com> (raw)
In-Reply-To: <6a24df18-832c-41b8-8226-5dc5b3c9995d@linaro.org>
On Wed, 10 Sep 2025, James Clark wrote:
> On 09/09/2025 10:01 pm, Ilkka Koskinen wrote:
>> Add missing 'h' to l1d_cache_access_prefetces
>>
>> Also fix a couple of typos and use consistent term in brief descriptions
>>
>> Fixes: 16438b652b46 ("perf vendor events arm64 AmpereOneX: Add core PMU
>> events and metrics")
>> Signed-off-by: Ilkka Koskinen <ilkka@os.amperecomputing.com>
>> ---
>> .../arch/arm64/ampere/ampereonex/metrics.json | 10 +++++-----
>
> The same typos are in arch/arm64/ampere/ampereone/metrics.json as well.
Ah, that's right. The descriptions do have the same typos. I'll prepare
another patch for AmpereOne and submit them together as v2.
Cheers, Ilkka
>
> Reviewed-by: James Clark <james.clark@linaro.org>
>
>> 1 file changed, 5 insertions(+), 5 deletions(-)
>>
>> diff --git
>> a/tools/perf/pmu-events/arch/arm64/ampere/ampereonex/metrics.json
>> b/tools/perf/pmu-events/arch/arm64/ampere/ampereonex/metrics.json
>> index 5228f94a793f..6817cac149e0 100644
>> --- a/tools/perf/pmu-events/arch/arm64/ampere/ampereonex/metrics.json
>> +++ b/tools/perf/pmu-events/arch/arm64/ampere/ampereonex/metrics.json
>> @@ -113,7 +113,7 @@
>> {
>> "MetricName": "load_store_spec_rate",
>> "MetricExpr": "LDST_SPEC / INST_SPEC",
>> - "BriefDescription": "The rate of load or store instructions
>> speculatively executed to overall instructions speclatively executed",
>> + "BriefDescription": "The rate of load or store instructions
>> speculatively executed to overall instructions speculatively executed",
>> "MetricGroup": "Operation_Mix",
>> "ScaleUnit": "100percent of operations"
>> },
>> @@ -132,7 +132,7 @@
>> {
>> "MetricName": "pc_write_spec_rate",
>> "MetricExpr": "PC_WRITE_SPEC / INST_SPEC",
>> - "BriefDescription": "The rate of software change of the PC
>> speculatively executed to overall instructions speclatively executed",
>> + "BriefDescription": "The rate of software change of the PC
>> speculatively executed to overall instructions speculatively executed",
>> "MetricGroup": "Operation_Mix",
>> "ScaleUnit": "100percent of operations"
>> },
>> @@ -195,14 +195,14 @@
>> {
>> "MetricName": "stall_frontend_cache_rate",
>> "MetricExpr": "STALL_FRONTEND_CACHE / CPU_CYCLES",
>> - "BriefDescription": "Proportion of cycles stalled and no ops
>> delivered from frontend and cache miss",
>> + "BriefDescription": "Proportion of cycles stalled and no
>> operations delivered from frontend and cache miss",
>> "MetricGroup": "Stall",
>> "ScaleUnit": "100percent of cycles"
>> },
>> {
>> "MetricName": "stall_frontend_tlb_rate",
>> "MetricExpr": "STALL_FRONTEND_TLB / CPU_CYCLES",
>> - "BriefDescription": "Proportion of cycles stalled and no ops
>> delivered from frontend and TLB miss",
>> + "BriefDescription": "Proportion of cycles stalled and no
>> operations delivered from frontend and TLB miss",
>> "MetricGroup": "Stall",
>> "ScaleUnit": "100percent of cycles"
>> },
>> @@ -391,7 +391,7 @@
>> "ScaleUnit": "100percent of cache acceses"
>> },
>> {
>> - "MetricName": "l1d_cache_access_prefetces",
>> + "MetricName": "l1d_cache_access_prefetches",
>> "MetricExpr": "L1D_CACHE_PRFM / L1D_CACHE",
>> "BriefDescription": "L1D cache access - prefetch",
>> "MetricGroup": "Cache",
>
>
next prev parent reply other threads:[~2025-09-10 19:46 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-09 21:01 [PATCH] perf vendor events arm64 AmpereOneX: Fix typo - should be l1d_cache_access_prefetches Ilkka Koskinen
2025-09-10 9:07 ` James Clark
2025-09-10 19:46 ` Ilkka Koskinen [this message]
2025-09-12 21:31 ` Arnaldo Carvalho de Melo
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