From: Donald Shannon <donalds@nvidia.com>
To: Krzysztof Kozlowski <krzk@kernel.org>
Cc: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org,
joel@jms.id.au, andrew@codeconstruct.com.au,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-aspeed@lists.ozlabs.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v5 2/2] ARM: dts: aspeed: Add device tree for Nvidia's GB200 UT3.0b platform BMC
Date: Tue, 22 Jul 2025 10:47:29 -0700 [thread overview]
Message-ID: <c6bb6b69-fcf7-40be-9597-883581fa0589@nvidia.com> (raw)
In-Reply-To: <20250721-hulking-violet-mastodon-16e87a@kuoka>
Hi Krzysztof,
Thank you for the button catch.
Though, I don't see a redundant status = "okay"; in the FMC flash.
It is disabled by default in the aspeed-g6.dtsi:
fmc: spi@1e620000 {
reg = <0x1e620000 0xc4>, <0x20000000 0x10000000>;
#address-cells = <1>;
#size-cells = <0>;
compatible = "aspeed,ast2600-fmc";
clocks = <&syscon ASPEED_CLK_AHB>;
status = "disabled";
interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
flash@0 {
reg = < 0 >;
compatible = "jedec,spi-nor";
spi-max-frequency = <50000000>;
spi-rx-bus-width = <2>;
status = "disabled";
};
I will reupload v6 with the button and subject line correction and assume the status okay is okay.
Thanks,
Donald
On 7/21/25 00:44, Krzysztof Kozlowski wrote:
> External email: Use caution opening links or attachments
>
>
> On Fri, Jul 18, 2025 at 04:11:18PM -0700, Donald Shannon wrote:
>> +
>> +/ {
>> + model = "AST2600 GB200 UT3.0b BMC";
>> + compatible = "nvidia,gb200-ut30b", "aspeed,ast2600";
>> +
>> + aliases {
>> + serial2 = &uart3;
>> + serial4 = &uart5;
>> + i2c16 = &imux16;
>> + i2c17 = &imux17;
>> + i2c18 = &imux18;
>> + i2c19 = &imux19;
>> + i2c20 = &imux20;
>> + i2c21 = &imux21;
>> + i2c22 = &imux22;
>> + i2c23 = &imux23;
>> + i2c24 = &imux24;
>> + i2c25 = &imux25;
>> + i2c26 = &imux26;
>> + i2c27 = &imux27;
>> + i2c28 = &imux28;
>> + i2c29 = &imux29;
>> + i2c30 = &imux30;
>> + i2c31 = &imux31;
>> + i2c32 = &imux32;
>> + i2c33 = &imux33;
>> + i2c34 = &imux34;
>> + i2c35 = &imux35;
>> + i2c36 = &imux36;
>> + i2c37 = &imux37;
>> + i2c38 = &imux38;
>> + i2c39 = &imux39;
>> + i2c40 = &e1si2c0;
>> + i2c41 = &e1si2c1;
>> + i2c42 = &e1si2c2;
>> + i2c43 = &e1si2c3;
>> + i2c48 = &i2c17mux0;
>> + i2c49 = &i2c17mux1;
>> + i2c50 = &i2c17mux2;
>> + i2c51 = &i2c17mux3;
>> + i2c52 = &i2c25mux0;
>> + i2c53 = &i2c25mux1;
>> + i2c54 = &i2c25mux2;
>> + i2c55 = &i2c25mux3;
>> + i2c56 = &i2c29mux0;
>> + i2c57 = &i2c29mux1;
>> + i2c58 = &i2c29mux2;
>> + i2c59 = &i2c29mux3;
>> + };
>> +
>> + buttons {
>> + button-power {
>> + label = "power-btn";
> How is this supposed to work? How does anything bind here?
>
>> + gpio = <&sgpiom0 156 GPIO_ACTIVE_LOW>;
>> + };
>> + button-uid {
>> + label = "uid-btn";
>> + gpio = <&sgpiom0 154 GPIO_ACTIVE_LOW>;
>> + };
>> + };
>> +
>> + chosen {
>> + stdout-path = &uart5;
>> + };
>> +
>> + leds {
>> + compatible = "gpio-leds";
>> + led-0 {
>> + label = "uid_led";
>> + gpios = <&sgpiom0 27 GPIO_ACTIVE_LOW>;
>> + };
>> + led-1 {
>> + label = "fault_led";
>> + gpios = <&sgpiom0 29 GPIO_ACTIVE_LOW>;
>> + };
>> + led-2 {
>> + label = "power_led";
>> + gpios = <&sgpiom0 31 GPIO_ACTIVE_LOW>;
>> + };
>> + };
>> +
>> + memory@80000000 {
>> + device_type = "memory";
>> + reg = <0x80000000 0x80000000>;
>> + };
>> +
>> + reg_3v3_stby: regulator-3v3-standby {
>> + compatible = "regulator-fixed";
>> + regulator-name = "3v3-standby";
>> + regulator-min-microvolt = <1800000>;
>> + regulator-max-microvolt = <1800000>;
>> + gpio = <&gpio0 ASPEED_GPIO(M, 3) GPIO_ACTIVE_HIGH>;
>> + enable-active-high;
>> + regulator-always-on;
>> + };
>> +
>> + reserved-memory {
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + ranges;
>> +
>> + vga_memory: framebuffer@9f000000 {
>> + no-map;
>> + reg = <0x9f000000 0x01000000>; /* 16M */
>> + };
>> +
>> + ramoops@a0000000 {
>> + compatible = "ramoops";
>> + reg = <0xa0000000 0x100000>; /* 1MB */
>> + record-size = <0x10000>; /* 64KB */
>> + max-reason = <2>; /* KMSG_DUMP_OOPS */
>> + };
>> +
>> + gfx_memory: framebuffer {
>> + compatible = "shared-dma-pool";
>> + reusable;
>> + size = <0x01000000>;
>> + alignment = <0x01000000>;
>> + };
>> +
>> + video_engine_memory: jpegbuffer {
>> + compatible = "shared-dma-pool";
>> + reusable;
>> + size = <0x02000000>; /* 32M */
>> + alignment = <0x01000000>;
>> + };
>> + };
>> +};
>> +
>> +// Enable Primary flash on FMC for bring up activity
>> +&fmc {
>> + status = "okay";
>> + flash@0 {
>> + compatible = "jedec,spi-nor";
>> + label = "bmc";
>> + spi-max-frequency = <50000000>;
>> + status = "okay";
> Why do you need it? Anything disabled it?
>
> Best regards,
> Krzysztof
>
next prev parent reply other threads:[~2025-07-22 17:50 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-07-18 23:11 [PATCH v5 0/2] Adding device tree and binding for NVIDIA GB200-UT3.0b Donald Shannon
2025-07-18 23:11 ` [PATCH v5 1/2] Documentation: devicetree: Add binding for NVIDIA GB200-UT3.0b platform Donald Shannon
2025-07-21 7:42 ` Krzysztof Kozlowski
2025-07-18 23:11 ` [PATCH v5 2/2] ARM: dts: aspeed: Add device tree for Nvidia's GB200 UT3.0b platform BMC Donald Shannon
2025-07-21 7:44 ` Krzysztof Kozlowski
2025-07-22 17:47 ` Donald Shannon [this message]
2025-07-20 23:06 ` [PATCH v5 0/2] Adding device tree and binding for NVIDIA GB200-UT3.0b Rob Herring (Arm)
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