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Fri, 25 Apr 2025 14:53:01 +0200 (MEST) Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-ap.st.com (STMicroelectronics) with ESMTP id 5872B40055; Fri, 25 Apr 2025 14:51:56 +0200 (CEST) Received: from Webmail-eu.st.com (eqndag1node4.st.com [10.75.129.133]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 344329F78E9; Fri, 25 Apr 2025 14:50:08 +0200 (CEST) Received: from SAFDAG1NODE1.st.com (10.75.90.17) by EQNDAG1NODE4.st.com (10.75.129.133) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Fri, 25 Apr 2025 14:50:07 +0200 Received: from [10.252.15.6] (10.252.15.6) by SAFDAG1NODE1.st.com (10.75.90.17) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Fri, 25 Apr 2025 14:50:06 +0200 Message-ID: Date: Fri, 25 Apr 2025 14:50:06 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 2/8] mfd: stm32-lptimer: add support for stm32mp25 To: Lee Jones CC: , , , , , , , , , , , , , , , , , References: <20250314171451.3497789-1-fabrice.gasnier@foss.st.com> <20250314171451.3497789-3-fabrice.gasnier@foss.st.com> <20250404144006.GB372032@google.com> <20250424130112.GD8734@google.com> Content-Language: en-US From: Fabrice Gasnier In-Reply-To: <20250424130112.GD8734@google.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-Originating-IP: [10.252.15.6] X-ClientProxiedBy: EQNCAS1NODE4.st.com (10.75.129.82) To SAFDAG1NODE1.st.com (10.75.90.17) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.0.736,FMLib:17.12.80.40 definitions=2025-04-25_03,2025-04-24_02,2025-02-21_01 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250425_055319_432220_5DF3BD0D X-CRM114-Status: GOOD ( 13.96 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 4/24/25 15:01, Lee Jones wrote: > On Fri, 04 Apr 2025, Lee Jones wrote: > >> On Fri, 14 Mar 2025, Fabrice Gasnier wrote: >> >>> Add support for STM32MP25 SoC. >>> A new hardware configuration register (HWCFGR2) has been added, to gather >>> number of capture/compare channels, autonomous mode and input capture >>> capability. The full feature set is implemented in LPTIM1/2/3/4. LPTIM5 >>> supports a smaller set of features. This can now be read from HWCFGR >>> registers. >>> >>> Add new registers to the stm32-lptimer.h: CCMR1, CCR2, HWCFGR1/2 and VERR. >>> Update the stm32_lptimer data struct so signal the number of >>> capture/compare channels to the child devices. >>> Also Remove some unused bit masks (CMPOK_ARROK / CMPOKCF_ARROKCF). >>> >>> Signed-off-by: Fabrice Gasnier >>> --- >>> Changes in V4: >>> - Add DIEROK, ARROK status flags, and their clear flags. >>> Changes in V2: >>> - rely on fallback compatible as no specific .data is associated to the >>> driver. Compatibility is added by reading hardware configuration >>> registers. >>> - read version register, to be used by clockevent child driver >>> - rename register/bits definitions >>> --- >>> drivers/mfd/stm32-lptimer.c | 33 ++++++++++++++++++++++++++- >>> include/linux/mfd/stm32-lptimer.h | 37 ++++++++++++++++++++++++++++--- >> >> At least the Clocksource driver depends on this. >> >> I need Acks from the other Maintainers before I can merge this. > > Suggest you resubmit the set as a [RESEND] to re-gain traction. > Hi Lee, Thanks for suggesting. I recently found I needed to add a small delay in clocksource driver. So I just have sent a V5. Best Regards, Fabrice