From: Krzysztof Kozlowski <krzk@kernel.org>
To: Crystal Guo <crystal.guo@mediatek.com>,
Rob Herring <robh@kernel.org>, Conor Dooley <conor+dt@kernel.org>,
Matthias Brugger <matthias.bgg@gmail.com>,
AngeloGioacchino Del Regno
<angelogioacchino.delregno@collabora.com>
Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-mediatek@lists.infradead.org,
Project_Global_Chrome_Upstream_Group@mediatek.com
Subject: Re: [PATCH 2/2] dt-bindings: memory-controllers: Add mediatek common-dramc dt-bindings
Date: Thu, 12 Dec 2024 11:58:00 +0100 [thread overview]
Message-ID: <c978937a-e589-4e9a-ba37-265dbfc1b252@kernel.org> (raw)
In-Reply-To: <20241212090029.13692-3-crystal.guo@mediatek.com>
On 12/12/2024 09:59, Crystal Guo wrote:
> Add devicetree binding for mediatek common-dramc driver.
>
> The DRAM controller of MediaTek SoC provides an interface to
> get the current data rate of DRAM.
Bindings are before users.
A nit, subject: drop second/last, redundant "dt-bindings". The
"dt-bindings" prefix is already stating that these are bindings.
See also:
https://elixir.bootlin.com/linux/v6.7-rc8/source/Documentation/devicetree/bindings/submitting-patches.rst#L18
>
> Signed-off-by: Crystal Guo <crystal.guo@mediatek.com>
> ---
> .../mediatek,common-dramc.yaml | 129 ++++++++++++++++++
> 1 file changed, 129 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/memory-controllers/mediatek,common-dramc.yaml
>
> diff --git a/Documentation/devicetree/bindings/memory-controllers/mediatek,common-dramc.yaml b/Documentation/devicetree/bindings/memory-controllers/mediatek,common-dramc.yaml
> new file mode 100644
> index 000000000000..c9e608c7f183
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/memory-controllers/mediatek,common-dramc.yaml
> @@ -0,0 +1,129 @@
> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> +# Copyright (c) 2024 MediaTek Inc.
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/memory-controllers/mediatek,common-dramc.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: MediaTek Common DRAMC (DRAM Controller)
Common? Is this a real thing? Please describe the hardware.
> +
> +maintainers:
> + - Crystal Guo <crystal.guo@mediatek.com>
> +
> +description: |
Do not need '|' unless you need to preserve formatting.
> + The DRAM controller of MediaTek SoC provides an interface to
> + get the current data rate of DRAM.
So not common here?
> +
> +properties:
> + compatible:
> + const: mediatek,common-dramc
This has to be SoC.
> +
> + reg:
> + minItems: 9
Why this is flexible?
> + items:
> + - description: DRAMC_AO_CHA_BASE
> + - description: DRAMC_AO_CHB_BASE
> + - description: DRAMC_AO_CHC_BASE
> + - description: DRAMC_AO_CHD_BASE
> + - description: DRAMC_NAO_CHA_BASE
> + - description: DRAMC_NAO_CHB_BASE
> + - description: DRAMC_NAO_CHC_BASE
> + - description: DRAMC_NAO_CHD_BASE
> + - description: DDRPHY_AO_CHA_BASE
> + - description: DDRPHY_AO_CHB_BASE
> + - description: DDRPHY_AO_CHC_BASE
> + - description: DDRPHY_AO_CHD_BASE
> + - description: DDRPHY_NAO_CHA_BASE
> + - description: DDRPHY_NAO_CHB_BASE
> + - description: DDRPHY_NAO_CHC_BASE
> + - description: DDRPHY_NAO_CHD_BASE
> + - description: SLEEP_BASE
Don't use some defines. Look at other bindings how they describe items.
> +
> + support-ch-cnt:
Nope
> + maxItems: 1
> +
> + fmeter-version:
> + maxItems: 1
> + description:
> + Fmeter version for calculating dram data rate
> +
> + crystal-freq:
> + maxItems: 1
> + description:
> + Reference clock rate in MHz
> +
> + shu-of:
> + maxItems: 1
> +
> + pll-id: true
> + shu-lv: true
> + sdmpcw: true
> + posdiv: true
> + fbksel: true
> + dqsopen: true
> + async-ca: true
> + dq-ser-mode: true
This binding is terrible. Was not tested and does not follow any
guidelines. Please read example schema and writing bindings document.
You can also read slides from my talks...
> +
> +required:
> + - compatible
> + - reg
> + - support-ch-cnt
> + - fmeter-version
> + - crystal-freq
> + - pll-id
> + - shu-lv
> + - shu-of
> + - sdmpcw
> + - posdiv
> + - fbksel
> + - dqsopen
> + - async-ca
> + - dq-ser-mode
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + soc {
> + #address-cells = <2>;
> + #size-cells = <2>;
> +
> + dramc: dramc@10230000 {
memory-controller@
and drop unused label.
Best regards,
Krzysztof
next prev parent reply other threads:[~2024-12-12 10:59 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-12-12 8:59 [PATCH 0/2] Add MediaTek DRAMC driver support Crystal Guo
2024-12-12 8:59 ` [PATCH 1/2] memory/mediatek: Add an interface to get current DDR data rate Crystal Guo
2024-12-12 10:46 ` AngeloGioacchino Del Regno
2025-02-08 4:14 ` Crystal Guo (郭晶)
2025-02-11 12:13 ` Crystal Guo (郭晶)
2024-12-12 11:02 ` Krzysztof Kozlowski
2025-02-08 4:21 ` Crystal Guo (郭晶)
2025-02-11 12:21 ` Crystal Guo (郭晶)
2024-12-21 1:42 ` kernel test robot
2024-12-21 11:03 ` kernel test robot
2024-12-12 8:59 ` [PATCH 2/2] dt-bindings: memory-controllers: Add mediatek common-dramc dt-bindings Crystal Guo
2024-12-12 10:27 ` Rob Herring (Arm)
2025-02-08 4:24 ` Crystal Guo (郭晶)
2024-12-12 10:27 ` AngeloGioacchino Del Regno
2025-02-08 4:33 ` Crystal Guo (郭晶)
2025-02-11 12:46 ` Crystal Guo (郭晶)
2024-12-12 10:58 ` Krzysztof Kozlowski [this message]
2025-02-08 4:40 ` Crystal Guo (郭晶)
2025-02-09 10:52 ` Krzysztof Kozlowski
2025-02-11 12:59 ` Crystal Guo (郭晶)
2025-02-11 15:57 ` Krzysztof Kozlowski
2025-02-12 3:21 ` Crystal Guo (郭晶)
2025-02-11 12:56 ` Crystal Guo (郭晶)
2025-02-11 15:55 ` Krzysztof Kozlowski
2025-02-12 2:47 ` Crystal Guo (郭晶)
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