From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 30F84CD80B3 for ; Tue, 10 Oct 2023 11:39:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:Content-Type: Content-Transfer-Encoding:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:From:References:Cc:To:Subject: MIME-Version:Date:Message-ID:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=JNpUZ47Ma0TNxxEqpDh08Cdpjmw+qlUJeuYzkuM4a9o=; b=XWu7rRJ3TWSOIQ nY2nSwryJ1vYmsgL9Oon7DrOp5d2UJRpbIOdTHBmAdTlqwrUExE7UpQq50tAiovwVUnDFXAYP5bkc j5FLHIFLoTa6mkVwEucITI9wipUtFPIMsqPUsfOGTEKpDFvJr/PEODSDIovVLAR+fVmILWGJ8m2X/ RXZQictHuyjG4d/XaBx55kOCAXUNcEMKBypGohL7iibe6YoQhl5DIh/epED+PcN+8SBbrL/mZlVfr 2acOpm4zQ1k5tz237Eecg0QibFBx0IeRNhXs55/M2fsnMHTXVA8nZIXWMOBDvjHaGdMkFia+rXxKJ gef1yd1r8cH7CPBlDlQg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qqB4L-00DFPY-09; Tue, 10 Oct 2023 11:38:33 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qqB4H-00DFOL-0K for linux-arm-kernel@lists.infradead.org; Tue, 10 Oct 2023 11:38:31 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id F2A0F1FB; Tue, 10 Oct 2023 04:39:05 -0700 (PDT) Received: from [10.1.196.40] (e121345-lin.cambridge.arm.com [10.1.196.40]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 751713F7A6; Tue, 10 Oct 2023 04:38:24 -0700 (PDT) Message-ID: Date: Tue, 10 Oct 2023 12:38:22 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] drivers: perf: arm_pmuv3: Update 'pmc_width' based on actual HW event width Content-Language: en-GB To: Anshuman Khandual , linux-arm-kernel@lists.infradead.org Cc: Will Deacon , Mark Rutland , linux-kernel@vger.kernel.org References: <20231009043724.175100-1-anshuman.khandual@arm.com> From: Robin Murphy In-Reply-To: <20231009043724.175100-1-anshuman.khandual@arm.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231010_043829_204771_6F196082 X-CRM114-Status: GOOD ( 17.02 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 09/10/2023 5:37 am, Anshuman Khandual wrote: > This updates 'perf_event_mmap_page->pmc_width' based on actual HW event's > width that are currently missing i.e ARMPMU_EVT_63BIT and ARMPMU_EVT_47BIT. > > Cc: Will Deacon > Cc: Mark Rutland > Cc: linux-arm-kernel@lists.infradead.org > Cc: linux-kernel@vger.kernel.org > Signed-off-by: Anshuman Khandual > --- > This applies on v6.6-rc5. > > drivers/perf/arm_pmuv3.c | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/drivers/perf/arm_pmuv3.c b/drivers/perf/arm_pmuv3.c > index fe4db1831662..94723d00548e 100644 > --- a/drivers/perf/arm_pmuv3.c > +++ b/drivers/perf/arm_pmuv3.c > @@ -1375,6 +1375,10 @@ void arch_perf_update_userpage(struct perf_event *event, > if (userpg->cap_user_rdpmc) { > if (event->hw.flags & ARMPMU_EVT_64BIT) > userpg->pmc_width = 64; > + else if (event->hw.flags & ARMPMU_EVT_63BIT) > + userpg->pmc_width = 63; > + else if (event->hw.flags & ARMPMU_EVT_47BIT) > + userpg->pmc_width = 47; I think this will give the wrong behaviour in at least some cases - if the user has not requested a "long" event which would lead to ARMPMU_EVT_64BIT being set, we will bias the values to only count 32 effective bits regardless of how wide the physical counters are. I believe this is what "the valid width of the counter" in the documentation is trying to refer to. Thanks, Robin. > else > userpg->pmc_width = 32; > } _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel