* [PATCH 1/1] arm: sunxi: Add alternative pins for spi0
@ 2017-12-13 7:44 Stefan Mavrodiev
2017-12-13 15:40 ` Maxime Ripard
0 siblings, 1 reply; 7+ messages in thread
From: Stefan Mavrodiev @ 2017-12-13 7:44 UTC (permalink / raw)
To: linux-arm-kernel
Allwinner A10/A13/A20 SoCs have pinmux for spi0
on port C. The patch adds these pins in the respective
dts includes.
Signed-off-by: Stefan Mavrodiev <stefan@olimex.com>
---
arch/arm/boot/dts/sun4i-a10.dtsi | 10 ++++++++++
arch/arm/boot/dts/sun5i.dtsi | 10 ++++++++++
arch/arm/boot/dts/sun7i-a20.dtsi | 10 ++++++++++
3 files changed, 30 insertions(+)
diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi
index 5840f5c..d835741 100644
--- a/arch/arm/boot/dts/sun4i-a10.dtsi
+++ b/arch/arm/boot/dts/sun4i-a10.dtsi
@@ -705,11 +705,21 @@
bias-pull-up;
};
+ spi0_pc_pins: spi0-pc-pins {
+ pins = "PC0", "PC1", "PC2";
+ function = "spi0";
+ };
+
spi0_pi_pins: spi0-pi-pins {
pins = "PI11", "PI12", "PI13";
function = "spi0";
};
+ spi0_cs0_pc_pin: spi0-cs0-pc-pin {
+ pins = "PC23";
+ function = "spi0";
+ };
+
spi0_cs0_pi_pin: spi0-cs0-pi-pin {
pins = "PI10";
function = "spi0";
diff --git a/arch/arm/boot/dts/sun5i.dtsi b/arch/arm/boot/dts/sun5i.dtsi
index 07f2248..9290e26 100644
--- a/arch/arm/boot/dts/sun5i.dtsi
+++ b/arch/arm/boot/dts/sun5i.dtsi
@@ -492,6 +492,16 @@
function = "nand0";
};
+ spi0_pins_a: spi0 at 0 {
+ pins = "PC0", "PC1", "PC2";
+ function = "spi0";
+ };
+
+ spi0_cs0_pins_a: spi0-cs0 at 0 {
+ pins = "PC3";
+ function = "spi0";
+ };
+
spi2_pins_a: spi2 at 0 {
pins = "PE1", "PE2", "PE3";
function = "spi2";
diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
index 59655e4..6930527 100644
--- a/arch/arm/boot/dts/sun7i-a20.dtsi
+++ b/arch/arm/boot/dts/sun7i-a20.dtsi
@@ -838,11 +838,21 @@
function = "spi0";
};
+ spi0_pins_b: spi0 at 1 {
+ pins = "PC0", "PC1", "PC2";
+ function = "spi0";
+ };
+
spi0_cs0_pins_a: spi0_cs0 at 0 {
pins = "PI10";
function = "spi0";
};
+ spi0_cs0_pins_b: spi0_cs0 at 1 {
+ pins = "PC23";
+ function = "spi0";
+ };
+
spi0_cs1_pins_a: spi0_cs1 at 0 {
pins = "PI14";
function = "spi0";
--
2.7.4
^ permalink raw reply related [flat|nested] 7+ messages in thread* [PATCH 1/1] arm: sunxi: Add alternative pins for spi0
2017-12-13 7:44 [PATCH 1/1] arm: sunxi: Add alternative pins for spi0 Stefan Mavrodiev
@ 2017-12-13 15:40 ` Maxime Ripard
2017-12-14 6:24 ` Stefan Mavrodiev
0 siblings, 1 reply; 7+ messages in thread
From: Maxime Ripard @ 2017-12-13 15:40 UTC (permalink / raw)
To: linux-arm-kernel
Hi,
On Wed, Dec 13, 2017 at 09:44:34AM +0200, Stefan Mavrodiev wrote:
> Allwinner A10/A13/A20 SoCs have pinmux for spi0
> on port C. The patch adds these pins in the respective
> dts includes.
>
> Signed-off-by: Stefan Mavrodiev <stefan@olimex.com>
Do you have any boards that are using these?
We won't merge that patch if there's no users for it.
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 833 bytes
Desc: not available
URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20171213/6c0122b7/attachment.sig>
^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH 1/1] arm: sunxi: Add alternative pins for spi0
2017-12-13 15:40 ` Maxime Ripard
@ 2017-12-14 6:24 ` Stefan Mavrodiev
2017-12-15 15:08 ` Maxime Ripard
0 siblings, 1 reply; 7+ messages in thread
From: Stefan Mavrodiev @ 2017-12-14 6:24 UTC (permalink / raw)
To: linux-arm-kernel
On 12/13/2017 05:40 PM, Maxime Ripard wrote:
> Hi,
>
> On Wed, Dec 13, 2017 at 09:44:34AM +0200, Stefan Mavrodiev wrote:
>> Allwinner A10/A13/A20 SoCs have pinmux for spi0
>> on port C. The patch adds these pins in the respective
>> dts includes.
>>
>> Signed-off-by: Stefan Mavrodiev <stefan@olimex.com>
> Do you have any boards that are using these?
>
> We won't merge that patch if there's no users for it.
>
> Maxime
>
A20-OLinuXino-Lime/Lime2 and A10-OLinuXino-Lime with spi flash.
For A13 we still doesn't have that option.
^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH 1/1] arm: sunxi: Add alternative pins for spi0
2017-12-14 6:24 ` Stefan Mavrodiev
@ 2017-12-15 15:08 ` Maxime Ripard
2017-12-18 6:24 ` Stefan Mavrodiev
0 siblings, 1 reply; 7+ messages in thread
From: Maxime Ripard @ 2017-12-15 15:08 UTC (permalink / raw)
To: linux-arm-kernel
Hi,
On Thu, Dec 14, 2017 at 08:24:54AM +0200, Stefan Mavrodiev wrote:
> On 12/13/2017 05:40 PM, Maxime Ripard wrote:
> > Hi,
> >
> > On Wed, Dec 13, 2017 at 09:44:34AM +0200, Stefan Mavrodiev wrote:
> > > Allwinner A10/A13/A20 SoCs have pinmux for spi0
> > > on port C. The patch adds these pins in the respective
> > > dts includes.
> > >
> > > Signed-off-by: Stefan Mavrodiev <stefan@olimex.com>
> > Do you have any boards that are using these?
> >
> > We won't merge that patch if there's no users for it.
>
> A20-OLinuXino-Lime/Lime2 and A10-OLinuXino-Lime with spi flash.
> For A13 we still doesn't have that option.
If this bus is exposed on the headers, you can add those to the DT but
leave them disabled if you want. Buf if there's no users of those
nodes, our policy is not to merge them.
Thanks!
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 833 bytes
Desc: not available
URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20171215/09e5ec43/attachment.sig>
^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH 1/1] arm: sunxi: Add alternative pins for spi0
2017-12-15 15:08 ` Maxime Ripard
@ 2017-12-18 6:24 ` Stefan Mavrodiev
2017-12-18 9:28 ` Maxime Ripard
0 siblings, 1 reply; 7+ messages in thread
From: Stefan Mavrodiev @ 2017-12-18 6:24 UTC (permalink / raw)
To: linux-arm-kernel
On 12/15/2017 05:08 PM, Maxime Ripard wrote:
> Hi,
>
> On Thu, Dec 14, 2017 at 08:24:54AM +0200, Stefan Mavrodiev wrote:
>> On 12/13/2017 05:40 PM, Maxime Ripard wrote:
>>> Hi,
>>>
>>> On Wed, Dec 13, 2017 at 09:44:34AM +0200, Stefan Mavrodiev wrote:
>>>> Allwinner A10/A13/A20 SoCs have pinmux for spi0
>>>> on port C. The patch adds these pins in the respective
>>>> dts includes.
>>>>
>>>> Signed-off-by: Stefan Mavrodiev <stefan@olimex.com>
>>> Do you have any boards that are using these?
>>>
>>> We won't merge that patch if there's no users for it.
>> A20-OLinuXino-Lime/Lime2 and A10-OLinuXino-Lime with spi flash.
>> For A13 we still doesn't have that option.
> If this bus is exposed on the headers, you can add those to the DT but
> leave them disabled if you want. Buf if there's no users of those
> nodes, our policy is not to merge them.
So basically I should resend the patch, enabling the those pins only for
sun4i and sun7i platform?
>
> Thanks!
> Maxime
>
Regards,
Stefan Mavrodiev
^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH 1/1] arm: sunxi: Add alternative pins for spi0
2017-12-18 6:24 ` Stefan Mavrodiev
@ 2017-12-18 9:28 ` Maxime Ripard
2017-12-18 11:00 ` Stefan Mavrodiev
0 siblings, 1 reply; 7+ messages in thread
From: Maxime Ripard @ 2017-12-18 9:28 UTC (permalink / raw)
To: linux-arm-kernel
On Mon, Dec 18, 2017 at 08:24:21AM +0200, Stefan Mavrodiev wrote:
> On 12/15/2017 05:08 PM, Maxime Ripard wrote:
> > Hi,
> >
> > On Thu, Dec 14, 2017 at 08:24:54AM +0200, Stefan Mavrodiev wrote:
> > > On 12/13/2017 05:40 PM, Maxime Ripard wrote:
> > > > Hi,
> > > >
> > > > On Wed, Dec 13, 2017 at 09:44:34AM +0200, Stefan Mavrodiev wrote:
> > > > > Allwinner A10/A13/A20 SoCs have pinmux for spi0
> > > > > on port C. The patch adds these pins in the respective
> > > > > dts includes.
> > > > >
> > > > > Signed-off-by: Stefan Mavrodiev <stefan@olimex.com>
> > > > Do you have any boards that are using these?
> > > >
> > > > We won't merge that patch if there's no users for it.
> > > A20-OLinuXino-Lime/Lime2 and A10-OLinuXino-Lime with spi flash.
> > > For A13 we still doesn't have that option.
> > If this bus is exposed on the headers, you can add those to the DT but
> > leave them disabled if you want. Buf if there's no users of those
> > nodes, our policy is not to merge them.
>
> So basically I should resend the patch, enabling the those pins only for
> sun4i and sun7i platform?
I'm not quite sure what you mean, but you should do something like
77df9d66b0b1ad01c685fd6341ce501493899658
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 833 bytes
Desc: not available
URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20171218/717315d0/attachment.sig>
^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH 1/1] arm: sunxi: Add alternative pins for spi0
2017-12-18 9:28 ` Maxime Ripard
@ 2017-12-18 11:00 ` Stefan Mavrodiev
0 siblings, 0 replies; 7+ messages in thread
From: Stefan Mavrodiev @ 2017-12-18 11:00 UTC (permalink / raw)
To: linux-arm-kernel
On 12/18/2017 11:28 AM, Maxime Ripard wrote:
> On Mon, Dec 18, 2017 at 08:24:21AM +0200, Stefan Mavrodiev wrote:
>> On 12/15/2017 05:08 PM, Maxime Ripard wrote:
>>> Hi,
>>>
>>> On Thu, Dec 14, 2017 at 08:24:54AM +0200, Stefan Mavrodiev wrote:
>>>> On 12/13/2017 05:40 PM, Maxime Ripard wrote:
>>>>> Hi,
>>>>>
>>>>> On Wed, Dec 13, 2017 at 09:44:34AM +0200, Stefan Mavrodiev wrote:
>>>>>> Allwinner A10/A13/A20 SoCs have pinmux for spi0
>>>>>> on port C. The patch adds these pins in the respective
>>>>>> dts includes.
>>>>>>
>>>>>> Signed-off-by: Stefan Mavrodiev <stefan@olimex.com>
>>>>> Do you have any boards that are using these?
>>>>>
>>>>> We won't merge that patch if there's no users for it.
>>>> A20-OLinuXino-Lime/Lime2 and A10-OLinuXino-Lime with spi flash.
>>>> For A13 we still doesn't have that option.
>>> If this bus is exposed on the headers, you can add those to the DT but
>>> leave them disabled if you want. Buf if there's no users of those
>>> nodes, our policy is not to merge them.
>> So basically I should resend the patch, enabling the those pins only for
>> sun4i and sun7i platform?
> I'm not quite sure what you mean, but you should do something like
> 77df9d66b0b1ad01c685fd6341ce501493899658
>
> Maxime
>
I guess, since this patch actually supports optional component, it
shouldn't be applied.
(This is already commented here:
https://patchwork.kernel.org/patch/10076721/ )
Thanks,
Stefan Mavrodiev
^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2017-12-18 11:00 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2017-12-13 7:44 [PATCH 1/1] arm: sunxi: Add alternative pins for spi0 Stefan Mavrodiev
2017-12-13 15:40 ` Maxime Ripard
2017-12-14 6:24 ` Stefan Mavrodiev
2017-12-15 15:08 ` Maxime Ripard
2017-12-18 6:24 ` Stefan Mavrodiev
2017-12-18 9:28 ` Maxime Ripard
2017-12-18 11:00 ` Stefan Mavrodiev
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).