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Miller" , Eric Dumazet , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Richard Cochran , Michal Simek , Sebastian Andrzej Siewior , Clark Williams , Steven Rostedt , netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rt-devel@lists.linux.dev, neelisrinivas18@gmail.com, git@amd.com References: <20260909-patches_v2_external-v2-0-3a40babaff4c@amd.com> <20260915172232.04df37b2@kernel.org> Content-Language: en-US From: "Neeli, Srinivas" In-Reply-To: <20260915172232.04df37b2@kernel.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-ClientProxiedBy: PN4PR01CA0076.INDPRD01.PROD.OUTLOOK.COM (2603:1096:c01:26d::7) To SN7PR12MB8147.namprd12.prod.outlook.com (2603:10b6:806:32e::5) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SN7PR12MB8147:EE_|CH2PR12MB4167:EE_ X-MS-Office365-Filtering-Correlation-Id: 8eed17a1-9295-408c-78bb-08df13c8bb13 X-LD-Processed: 3dd8961f-e488-4e60-8e11-a82d994e183d,ExtAddr X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|7416014|23010399003|366016|1800799024|6133799003|18002099003|22082099003|4143699003|10067099003|56012099006|11063799006; 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The switch-facing >> part is exposed through the Distributed Switch Architecture (DSA) framework >> in a follow-up series, so that MAC1 and MAC2 show up to Linux as switch >> ports with the endpoint acting as the CPU/conduit port. The endpoint frames >> are already classified by source-port id and tagged with DSA port metadata >> here, so the switch series can consume them without further endpoint >> change. > I'm not sure why you're implementing this as DSA. > This needs to be explained, if a single driver can bind and control > the whole thing, that's AFAIU preferable. You can keep the > implementation details in the driver without exposing the conduit > to user space When we sent the RFC(https://lore.kernel.org/lkml/5f884e29-151a-4ee7-9e1a-d7e1f84d9f6c@lunn.ch/), Andrew framed the choice as: if the host sees a netdev connected to a port of the switch, it is most likely a DSA switch. That matches our hardware, the host sees the Endpoint as a netdev on a switch port, with the two external MACs as user ports, so we implemented it as DSA. The Endpoint is not only the switch conduit. It is also a scheduling endpoint in its own. It drives a dedicated hardware block for time-triggered per-stream scheduling (IEEE 802.1Qcc-2018, Annex U.1.3, "Using per-stream scheduling"). That block is armed by a schedule programmed on the Endpoint's own Qbv scheduler, which acts as its time trigger. Configuring that schedule and the per-stream trigger requires an Endpoint netdev, so we keep it to expose the Endpoint's Qbv/taprio configuration, distinct from the wire-port schedules on the user netdevs. On the data path, DSA maps onto the hardware cleanly. On RX, the EP DMA path delivers the source port in sideband metadata, which feeds DSA's existing metadata-based demultiplexing to the per-port netdevs. On TX, the normal data path has no destination-port selector and the switch has no independent per-port forwarding mask, so standalone isolation is done with a private VLAN containing only the selected port and the EP. The next version uses DSA's tag_8021q helpers to manage those VLANs, insert the destination port's VLAN tag (which the hardware strips before wire egress), and handle the transitions between standalone and bridged operation. A single driver could control the whole block, but it would still have to reimplement the same pieces, RX demultiplexing, TX tagging, the VLAN lifecycle, and the per-port netdevs. We chose DSA to reuse that existing infrastructure while keeping the Endpoint and wire-port scheduling controls separate. Thanks, Srinivas Neeli