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From: James Morse <james.morse@arm.com>
To: "Zhang, Lei" <zhang.lei@jp.fujitsu.com>
Cc: 'Mark Rutland' <mark.rutland@arm.com>,
	'Catalin Marinas' <catalin.marinas@arm.com>,
	"'will.deacon@arm.com'" <will.deacon@arm.com>,
	"'linux-kernel@vger.kernel.org'" <linux-kernel@vger.kernel.org>,
	"'linux-arm-kernel@lists.infradead.org'"
	<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH v3 0/1] arm64: Add workaround for Fujitsu A64FX erratum 010001
Date: Wed, 30 Jan 2019 15:00:28 +0000	[thread overview]
Message-ID: <cb7544e2-bd85-df4c-1f48-0afeedefc962@arm.com> (raw)
In-Reply-To: <8898674D84E3B24BA3A2D289B872026A6A2C04E6@G01JPEXMBKW03>

Hi!

On 01/29/2019 12:29 PM, Zhang, Lei wrote:
> On some variants of the Fujitsu-A64FX cores ver(1.0, 1.1),
> memory accesses may cause undefined fault (Data abort, DFSC=0b111111).
> This problem will be fixed by next version of Fujitsu-A64FX.
> 
> This fault occurs under a specific hardware condition
> when a load/store instruction perform an address translation using:
>    case-1  TTBR0_EL1 with TCR_EL1.NFD0 == 1.
>    case-2  TTBR0_EL2 with TCR_EL2.NFD0 == 1.
>    case-3  TTBR1_EL1 with TCR_EL1.NFD1 == 1.
>    case-4  TTBR1_EL2 with TCR_EL2.NFD1 == 1.
> And this fault occurs completely spurious.
> 
> Since TCR_ELx.NFD1 is set to '1' at the kernel in versions
> past 4.17, the case-3 or case-4 may happen.

e03e61c3173c ("arm64: kaslr: Set TCR_EL1.NFD1 when 
CONFIG_RANDOMIZE_BASE=y") ?

So you'd never see it if you disabled CONFIG_RANDOMIZE_BASE?


Thanks,

James

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  parent reply	other threads:[~2019-01-30 15:00 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-01-29 12:29 [PATCH v3 0/1] arm64: Add workaround for Fujitsu A64FX erratum 010001 Zhang, Lei
2019-01-29 18:10 ` Catalin Marinas
2019-01-30 14:56   ` James Morse
2019-02-05 12:49   ` Zhang, Lei
2019-01-30 15:00 ` James Morse [this message]
2019-02-01  5:53   ` Zhang, Lei
2019-02-01 10:51     ` Will Deacon
2019-02-05 13:32       ` Zhang, Lei
2019-02-13 13:19         ` Will Deacon

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