From mboxrd@z Thu Jan 1 00:00:00 1970 From: clg@kaod.org (=?UTF-8?Q?C=c3=a9dric_Le_Goater?=) Date: Fri, 14 Sep 2018 07:38:37 +0200 Subject: [PATCH i2c-next v6] i2c: aspeed: Handle master/slave combined irq events properly In-Reply-To: References: <20180911233302.GA18799@roeck-us.net> <5698ca34-14c9-8d05-c4e6-5acf85ff9d14@linux.intel.com> <20180912013449.GA12612@roeck-us.net> <7fd98646-fb5a-be4d-ce37-84b74e0fa8b3@linux.intel.com> <20180912195844.GA6893@roeck-us.net> <20180912203059.GA18201@roeck-us.net> <3f86e75f-1502-eae8-0633-d087937111c8@roeck-us.net> <20180913155703.GA22605@roeck-us.net> <2c481986-7ee0-4887-5c9b-64e2cd9d8c04@kaod.org> Message-ID: To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org >>> That seems to suggest that none of the status bits auto-clears, and that >>> the above code clearing intr_status should be removed entirely. >>> Am I missing something ? >> >> You are right. I just pushed another version of the previous patch with this >> new hunk : >> >> @@ -188,7 +200,6 @@ static void aspeed_i2c_bus_handle_cmd(As >> ? { >> ????? bus->cmd &= ~0xFFFF; >> ????? bus->cmd |= value & 0xFFFF; >> -??? bus->intr_status = 0; >> ? ????? if (bus->cmd & I2CD_M_START_CMD) { >> ????????? uint8_t state = aspeed_i2c_get_state(bus) & I2CD_MACTIVE ? >> >> >> The QEMU palmetto and witherspoon machines seem to behave fine. Can you give >> it a try ? >> > > Works fine for me for all affected qemu platforms. > > How do you want to proceed with the qemu patches ? I attached my patches > for reference. Maybe you can add them to your tree if they are ok and submit > the entire series together to the qemu mailing list ? yes. They are pushed in my aspeed-3.1 branch. I will send the series on the list. Thanks, C.