From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 44024C3DA45 for ; Mon, 15 Jul 2024 07:48:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: Content-Type:In-Reply-To:References:Cc:To:Subject:From:MIME-Version:Date: Message-ID:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=pSJdtWGa0fOrfBVyUizmIPgeXI/HBX5q8fp2M5QTpdw=; b=LZB/+Nbttmvj63FWZPPrxHjCpm v8XDaRvO+8ejDMEBbdpSCvfjGBqKJZ08NKKeQvMLOHiU/iO6oAOUPrcJn5zRdVA7K17lot8v6Cd0L bEkHcVJldQEQdGSVyh95y+pz+riQxPmaYlgT1bTNNF1061MSpeHNEFeByMlchhYyXDF03iS3zBNPT pVNeJSak2D2mIWZGVjQfUlkTH5pRLulYAXGKrfo2y7llMQzWLx/gObfWPS379WkFIXP+9hKDLSGJ0 1OGmhZ9Syz4SU/Aq2RrFisrB+oMZI4WUxivGv5oVcxXzjCpTzZD2jdLQwpwO2bX+CX27MUT/7L9YD L6ZH57/Q==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sTGRi-00000006E8k-0Fit; Mon, 15 Jul 2024 07:48:30 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sTGRO-00000006DzM-172M for linux-arm-kernel@lists.infradead.org; Mon, 15 Jul 2024 07:48:11 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 0E370FEC; Mon, 15 Jul 2024 00:48:35 -0700 (PDT) Received: from [10.162.40.16] (a077893.blr.arm.com [10.162.40.16]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 734203F762; Mon, 15 Jul 2024 00:48:01 -0700 (PDT) Message-ID: Date: Mon, 15 Jul 2024 13:17:58 +0530 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird From: Anshuman Khandual Subject: Re: [PATCH v4 05/29] arm64: cpufeature: add Permission Overlay Extension cpucap To: Joey Gouly , linux-arm-kernel@lists.infradead.org Cc: akpm@linux-foundation.org, aneesh.kumar@kernel.org, aneesh.kumar@linux.ibm.com, bp@alien8.de, broonie@kernel.org, catalin.marinas@arm.com, christophe.leroy@csgroup.eu, dave.hansen@linux.intel.com, hpa@zytor.com, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linuxppc-dev@lists.ozlabs.org, maz@kernel.org, mingo@redhat.com, mpe@ellerman.id.au, naveen.n.rao@linux.ibm.com, npiggin@gmail.com, oliver.upton@linux.dev, shuah@kernel.org, szabolcs.nagy@arm.com, tglx@linutronix.de, will@kernel.org, x86@kernel.org, kvmarm@lists.linux.dev References: <20240503130147.1154804-1-joey.gouly@arm.com> <20240503130147.1154804-6-joey.gouly@arm.com> Content-Language: en-US In-Reply-To: <20240503130147.1154804-6-joey.gouly@arm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240715_004810_377276_87B456CC X-CRM114-Status: GOOD ( 12.45 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 5/3/24 18:31, Joey Gouly wrote: > This indicates if the system supports POE. This is a CPUCAP_BOOT_CPU_FEATURE > as the boot CPU will enable POE if it has it, so secondary CPUs must also > have this feature. > > Signed-off-by: Joey Gouly > Cc: Catalin Marinas > Cc: Will Deacon > --- > arch/arm64/kernel/cpufeature.c | 9 +++++++++ > arch/arm64/tools/cpucaps | 1 + > 2 files changed, 10 insertions(+) > > diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c > index 56583677c1f2..2f3c2346e156 100644 > --- a/arch/arm64/kernel/cpufeature.c > +++ b/arch/arm64/kernel/cpufeature.c > @@ -2861,6 +2861,15 @@ static const struct arm64_cpu_capabilities arm64_features[] = { > .matches = has_nv1, > ARM64_CPUID_FIELDS_NEG(ID_AA64MMFR4_EL1, E2H0, NI_NV1) > }, > +#ifdef CONFIG_ARM64_POE > + { > + .desc = "Stage-1 Permission Overlay Extension (S1POE)", > + .capability = ARM64_HAS_S1POE, > + .type = ARM64_CPUCAP_BOOT_CPU_FEATURE, > + .matches = has_cpuid_feature, > + ARM64_CPUID_FIELDS(ID_AA64MMFR3_EL1, S1POE, IMP) > + }, > +#endif > {}, > }; > > diff --git a/arch/arm64/tools/cpucaps b/arch/arm64/tools/cpucaps > index 62b2838a231a..45f558fc0d87 100644 > --- a/arch/arm64/tools/cpucaps > +++ b/arch/arm64/tools/cpucaps > @@ -45,6 +45,7 @@ HAS_MOPS > HAS_NESTED_VIRT > HAS_PAN > HAS_S1PIE > +HAS_S1POE > HAS_RAS_EXTN > HAS_RNG > HAS_SB Reviewed-by: Anshuman Khandual