From: Alexandre Mergnat <amergnat@baylibre.com>
To: Wenbin Mei <wenbin.mei@mediatek.com>,
Ulf Hansson <ulf.hansson@linaro.org>
Cc: Chaotian Jing <chaotian.jing@mediatek.com>,
Matthias Brugger <matthias.bgg@gmail.com>,
AngeloGioacchino Del Regno
<angelogioacchino.delregno@collabora.com>,
Adrian Hunter <adrian.hunter@intel.com>,
Ritesh Harjani <riteshh@codeaurora.org>,
Asutosh Das <asutoshd@codeaurora.org>,
linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-mediatek@lists.infradead.org,
kernel test robot <lkp@intel.com>
Subject: Re: [PATCH v5 1/1] mmc: mtk-sd: reduce CIT for better performance
Date: Wed, 7 Jun 2023 13:08:30 +0200 [thread overview]
Message-ID: <ce2737b7-a2fa-b4f2-16f2-09971d5877fb@baylibre.com> (raw)
In-Reply-To: <20230606113249.28057-2-wenbin.mei@mediatek.com>
On 06/06/2023 13:32, Wenbin Mei wrote:
> CQHCI_SSC1 indicates to CQE the polling period to use when using periodic
> SEND_QUEUE_STATUS(CMD13) polling.
> Since MSDC CQE uses msdc_hclk as ITCFVAL, so driver should use hclk
> frequency to get the actual time.
> The default value 0x1000 that corresponds to 150us for MediaTek SoCs, let's
> decrease it to 0x40 that corresponds to 2.35us, which can improve the
> performance of some eMMC devices.
Reviewed-by: Alexandre Mergnat <amergnat@baylibre.com>
--
Regards,
Alexandre
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next prev parent reply other threads:[~2023-06-07 11:09 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-06-06 11:32 [PATCH v5 0/1] mmc: mtk-sd: reduce CIT for better performance Wenbin Mei
2023-06-06 11:32 ` [PATCH v5 1/1] " Wenbin Mei
2023-06-06 11:41 ` AngeloGioacchino Del Regno
2023-06-07 6:06 ` Adrian Hunter
2023-06-07 11:08 ` Alexandre Mergnat [this message]
2023-06-08 23:10 ` Ulf Hansson
2023-06-09 10:24 ` Wenbin Mei (梅文彬)
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