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From: Sascha Bischoff <Sascha.Bischoff@arm.com>
To: "lpieralisi@kernel.org" <lpieralisi@kernel.org>
Cc: "yuzenghui@huawei.com" <yuzenghui@huawei.com>,
	"tglx@linutronix.de" <tglx@linutronix.de>,
	Timothy Hayes <Timothy.Hayes@arm.com>, nd <nd@arm.com>,
	"oliver.upton@linux.dev" <oliver.upton@linux.dev>,
	"kvmarm@lists.linux.dev" <kvmarm@lists.linux.dev>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>,
	"kvm@vger.kernel.org" <kvm@vger.kernel.org>,
	Joey Gouly <Joey.Gouly@arm.com>,
	"maz@kernel.org" <maz@kernel.org>,
	Suzuki Poulose <Suzuki.Poulose@arm.com>,
	"will@kernel.org" <will@kernel.org>
Subject: Re: [PATCH v2 2/5] irqchip/gic-v5: Populate struct gic_kvm_info
Date: Thu, 3 Jul 2025 08:58:17 +0000	[thread overview]
Message-ID: <ce9d030796cbbc5ee7eec15a653d1d360215ee3c.camel@arm.com> (raw)
In-Reply-To: <aGOuVhED/SSnzwWU@lpieralisi>

On Tue, 2025-07-01 at 11:45 +0200, Lorenzo Pieralisi wrote:
> On Fri, Jun 27, 2025 at 10:09:01AM +0000, Sascha Bischoff wrote:
> > Populate the gic_kvm_info struct based on support for
> > FEAT_GCIE_LEGACY.  The struct is used by KVM to probe for a
> > compatible
> > GIC.
> > 
> > Co-authored-by: Timothy Hayes <timothy.hayes@arm.com>
> > Signed-off-by: Timothy Hayes <timothy.hayes@arm.com>
> > Signed-off-by: Sascha Bischoff <sascha.bischoff@arm.com>
> > ---
> >  drivers/irqchip/irq-gic-v5.c          | 33
> > +++++++++++++++++++++++++++
> >  include/linux/irqchip/arm-vgic-info.h |  4 ++++
> >  2 files changed, 37 insertions(+)
> 
> Reviewed-by: Lorenzo Pieralisi <lpieralisi@kernel.org>

Done, thanks!

> 
> > diff --git a/drivers/irqchip/irq-gic-v5.c b/drivers/irqchip/irq-
> > gic-v5.c
> > index 6b42c4af5c79..9ba43ec9318b 100644
> > --- a/drivers/irqchip/irq-gic-v5.c
> > +++ b/drivers/irqchip/irq-gic-v5.c
> > @@ -13,6 +13,7 @@
> >  
> >  #include <linux/irqchip.h>
> >  #include <linux/irqchip/arm-gic-v5.h>
> > +#include <linux/irqchip/arm-vgic-info.h>
> >  
> >  #include <asm/cpufeature.h>
> >  #include <asm/exception.h>
> > @@ -1049,6 +1050,36 @@ static void gicv5_set_cpuif_idbits(void)
> >  	}
> >  }
> >  
> > +#ifdef CONFIG_KVM
> > +static struct gic_kvm_info gic_v5_kvm_info __initdata;
> > +
> > +static bool __init gicv5_cpuif_has_gcie_legacy(void)
> > +{
> > +	u64 idr0 = read_sysreg_s(SYS_ICC_IDR0_EL1);
> > +	return !!FIELD_GET(ICC_IDR0_EL1_GCIE_LEGACY, idr0);
> > +}
> > +
> > +static void __init gic_of_setup_kvm_info(struct device_node *node)
> > +{
> > +	gic_v5_kvm_info.type = GIC_V5;
> > +	gic_v5_kvm_info.has_gcie_v3_compat =
> > gicv5_cpuif_has_gcie_legacy();
> > +
> > +	/* GIC Virtual CPU interface maintenance interrupt */
> > +	gic_v5_kvm_info.no_maint_irq_mask = false;
> > +	gic_v5_kvm_info.maint_irq = irq_of_parse_and_map(node, 0);
> > +	if (!gic_v5_kvm_info.maint_irq) {
> > +		pr_warn("cannot find GICv5 virtual CPU interface
> > maintenance interrupt\n");
> > +		return;
> > +	}
> > +
> > +	vgic_set_kvm_info(&gic_v5_kvm_info);
> > +}
> > +#else
> > +static inline void __init gic_of_setup_kvm_info(struct device_node
> > *node)
> > +{
> > +}
> > +#endif // CONFIG_KVM
> > +
> >  static int __init gicv5_of_init(struct device_node *node, struct
> > device_node *parent)
> >  {
> >  	int ret = gicv5_irs_of_probe(node);
> > @@ -1081,6 +1112,8 @@ static int __init gicv5_of_init(struct
> > device_node *node, struct device_node *pa
> >  
> >  	gicv5_irs_its_probe();
> >  
> > +	gic_of_setup_kvm_info(node);
> > +
> >  	return 0;
> >  
> >  out_int:
> > diff --git a/include/linux/irqchip/arm-vgic-info.h
> > b/include/linux/irqchip/arm-vgic-info.h
> > index a75b2c7de69d..ca1713fac6e3 100644
> > --- a/include/linux/irqchip/arm-vgic-info.h
> > +++ b/include/linux/irqchip/arm-vgic-info.h
> > @@ -15,6 +15,8 @@ enum gic_type {
> >  	GIC_V2,
> >  	/* Full GICv3, optionally with v2 compat */
> >  	GIC_V3,
> > +	/* Full GICv5, optionally with v3 compat */
> > +	GIC_V5,
> >  };
> >  
> >  struct gic_kvm_info {
> > @@ -34,6 +36,8 @@ struct gic_kvm_info {
> >  	bool		has_v4_1;
> >  	/* Deactivation impared, subpar stuff */
> >  	bool		no_hw_deactivation;
> > +	/* v3 compat support (GICv5 hosts, only) */
> > +	bool		has_gcie_v3_compat;
> >  };
> >  
> >  #ifdef CONFIG_KVM
> > -- 
> > 2.34.1


  reply	other threads:[~2025-07-03 10:06 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-06-27 10:09 [PATCH v2 0/5] KVM: arm64: Enable GICv3 guests on GICv5 hosts using FEAT_GCIE_LEGACY Sascha Bischoff
2025-06-27 10:09 ` [PATCH v2 2/5] irqchip/gic-v5: Populate struct gic_kvm_info Sascha Bischoff
2025-07-01  9:45   ` Lorenzo Pieralisi
2025-07-03  8:58     ` Sascha Bischoff [this message]
2025-06-27 10:09 ` [PATCH v2 3/5] arm64/sysreg: Add ICH_VCTLR_EL2 Sascha Bischoff
2025-06-27 10:09 ` [PATCH v2 1/5] irqchip/gic-v5: Skip deactivate for forwarded PPI interrupts Sascha Bischoff
2025-07-02 14:28   ` Jonathan Cameron
2025-07-03  8:58     ` Sascha Bischoff
2025-06-27 10:09 ` [PATCH v2 4/5] KVM: arm64: gic-v5: Support GICv3 compat Sascha Bischoff
2025-06-27 10:09 ` [PATCH v2 5/5] KVM: arm64: gic-v5: Probe for GICv5 Sascha Bischoff
2025-07-08 22:24 ` [PATCH v2 0/5] KVM: arm64: Enable GICv3 guests on GICv5 hosts using FEAT_GCIE_LEGACY Oliver Upton

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