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Thu, 27 Oct 2022 16:21:29 +0100 MIME-Version: 1.0 Date: Thu, 27 Oct 2022 16:21:28 +0100 From: Marc Zyngier To: Reiji Watanabe Cc: Linux ARM , kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org, kernel-team@android.com Subject: Re: [PATCH 1/9] KVM: arm64: PMU: Align chained counter implementation with architecture pseudocode In-Reply-To: References: <20220805135813.2102034-1-maz@kernel.org> <20220805135813.2102034-2-maz@kernel.org> <86zgdlms58.wl-maz@kernel.org> User-Agent: Roundcube Webmail/1.4.13 Message-ID: X-Sender: maz@kernel.org X-SA-Exim-Connect-IP: 51.254.78.96 X-SA-Exim-Rcpt-To: reijiw@google.com, linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org, kernel-team@android.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221027_082137_824809_3AD79F2C X-CRM114-Status: GOOD ( 23.95 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Reiji, On 2022-10-27 15:33, Reiji Watanabe wrote: > Hi Marc, > >> > > +static void kvm_pmu_counter_increment(struct kvm_vcpu *vcpu, >> > > + unsigned long mask, u32 event) >> > > +{ >> > > + int i; >> > > + >> > > + if (!kvm_vcpu_has_pmu(vcpu)) >> > > + return; >> > > + >> > > + if (!(__vcpu_sys_reg(vcpu, PMCR_EL0) & ARMV8_PMU_PMCR_E)) >> > > + return; >> > > + >> > > + /* Weed out disabled counters */ >> > > + mask &= __vcpu_sys_reg(vcpu, PMCNTENSET_EL0); >> > > + >> > > + for_each_set_bit(i, &mask, ARMV8_PMU_CYCLE_IDX) { >> > > + u64 type, reg; >> > > + >> > > + /* Filter on event type */ >> > > + type = __vcpu_sys_reg(vcpu, PMEVTYPER0_EL0 + i); >> > > + type &= kvm_pmu_event_mask(vcpu->kvm); >> > > + if (type != event) >> > > + continue; >> > > + >> > > + /* Increment this counter */ >> > > + reg = __vcpu_sys_reg(vcpu, PMEVCNTR0_EL0 + i) + 1; >> > > + reg = lower_32_bits(reg); >> > > + __vcpu_sys_reg(vcpu, PMEVCNTR0_EL0 + i) = reg; >> > > + >> > > + if (reg) /* No overflow? move on */ >> > > + continue; >> > > + >> > > + /* Mark overflow */ >> > > + __vcpu_sys_reg(vcpu, PMOVSSET_EL0) |= BIT(i); >> > >> > Perhaps it might be useful to create another helper that takes >> > care of just one counter (it would essentially do the code above >> > in the loop). The helper could be used (in addition to the above >> > loop) from the code below for the CHAIN event case and from >> > kvm_pmu_perf_overflow(). Then unnecessary execution of >> > for_each_set_bit() could be avoided for these two cases. >> >> I'm not sure it really helps. We would still need to check whether the >> counter is enabled, and we'd need to bring that into the helper >> instead of keeping it outside of the loop. > > That's true. It seems that I overlooked that. > Although it appears checking with kvm_vcpu_has_pmu() is unnecessary > (redundant), the check with PMCR_EL0.E is necessary. Ah indeed, I'll drop the kvm_vcpu_has_pmu() check. Thanks, M. -- Jazz is not dead. It just smells funny... _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel