From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.4 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,NICE_REPLY_A,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C2ADCC55178 for ; Tue, 27 Oct 2020 17:42:48 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 5890E20578 for ; Tue, 27 Oct 2020 17:42:48 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="qF8a7J9C" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 5890E20578 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:Date:Message-ID:From: References:To:Subject:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=379+HtF27E0TYJiQusKd6cXLG8krnNnI5Dd0+fI9TU8=; b=qF8a7J9CynFXePRuOTEl0H8H3 HfCj2GL50Ro0XdtUm+CxMQ1itK1QYxj23/1h+tSGrNlv0vTPQqbCxo6RFR9x7Wc/eShKsxX2tFqbt MLkb/MCgiMJh+5wefrXfI6KFeCCNgMq8mQ50wisdWnBxWqzDh5wuomKxDbt7AOqFM3fF5XvhzFyCF JNiqbblkEFyoIaA0m17zL7IU0P3mw8eyCfCe/7Xl3Hp8OamXALsxo1EarbEdFLDpaGmb7/gjVEMT1 VLCpfL+IE7ZSqyNbC4nncabExyuE98edV+CFQfRvYk1t1DPlhRjAWU0D22aJOP2qsHnfLHUC+SSee so63CpQfA==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kXSyL-0001oe-6U; Tue, 27 Oct 2020 17:41:25 +0000 Received: from foss.arm.com ([217.140.110.172]) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kXSyH-0001nM-RS for linux-arm-kernel@lists.infradead.org; Tue, 27 Oct 2020 17:41:22 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 78F08139F; Tue, 27 Oct 2020 10:41:20 -0700 (PDT) Received: from [172.16.1.113] (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id BE14A3F719; Tue, 27 Oct 2020 10:41:18 -0700 (PDT) Subject: Re: [PATCH 07/11] KVM: arm64: Inject AArch64 exceptions from HYP To: Marc Zyngier References: <20201026133450.73304-1-maz@kernel.org> <20201026133450.73304-8-maz@kernel.org> From: James Morse Message-ID: Date: Tue, 27 Oct 2020 17:41:16 +0000 User-Agent: Mozilla/5.0 (X11; Linux aarch64; rv:68.0) Gecko/20100101 Thunderbird/68.12.0 MIME-Version: 1.0 In-Reply-To: <20201026133450.73304-8-maz@kernel.org> Content-Language: en-GB X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201027_134122_016146_8A6B0CA7 X-CRM114-Status: GOOD ( 19.13 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org, Suzuki K Poulose , kernel-team@android.com, Quentin Perret , Andrew Scull , David Brazdil , Will Deacon , kvmarm@lists.cs.columbia.edu, Julien Thierry Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Marc, On 26/10/2020 13:34, Marc Zyngier wrote: > Move the AArch64 exception injection code from EL1 to HYP, leaving > only the ESR_EL1 updates to EL1. In order to come with the differences (cope with the differences?) > between VHE and nVHE, two set of system register accessors are provided. > > SPSR, ELR, PC and PSTATE are now completely handled in the hypervisor. > diff --git a/arch/arm64/kvm/hyp/exception.c b/arch/arm64/kvm/hyp/exception.c > index 6533a9270850..cd6e643639e8 100644 > --- a/arch/arm64/kvm/hyp/exception.c > +++ b/arch/arm64/kvm/hyp/exception.c > @@ -11,7 +11,167 @@ > */ > > #include > +#include > +#include > + > +#if defined (__KVM_NVHE_HYPERVISOR__) > +/* > + * System registers are never loaded on the CPU until we actually > + * restore them. > + */ > +static inline u64 __vcpu_read_sys_reg(const struct kvm_vcpu *vcpu, int reg) > +{ > + return __vcpu_sys_reg(vcpu, reg); > +} > + > +static inline void __vcpu_write_sys_reg(struct kvm_vcpu *vcpu, u64 val, int reg) > +{ > + __vcpu_sys_reg(vcpu, reg) = val; > +} > + > +static void __vcpu_write_spsr(struct kvm_vcpu *vcpu, u64 val) > +{ > + write_sysreg_el1(val, SYS_SPSR); > +} > +#elif defined (__KVM_VHE_HYPERVISOR__) > +/* On VHE, all the registers are already loaded on the CPU */ > +static inline u64 __vcpu_read_sys_reg(const struct kvm_vcpu *vcpu, int reg) > +{ > + u64 val; > + if (__vcpu_read_sys_reg_from_cpu(reg, &val)) > + return val; As has_vhe()'s behaviour changes based on these KVM preprocessor symbols, would: | if (has_vhe() && __vcpu_read_sys_reg_from_cpu(reg, &val)) | return val; let you do both of these with only one copy of the function? > + return __vcpu_sys_reg(vcpu, reg); > +} > + > +static inline void __vcpu_write_sys_reg(struct kvm_vcpu *vcpu, u64 val, int reg) > +{ > + if (__vcpu_write_sys_reg_to_cpu(val, reg)) > + return; > + > + __vcpu_sys_reg(vcpu, reg) = val; > +} > +static void __vcpu_write_spsr(struct kvm_vcpu *vcpu, u64 val) > +{ > + write_sysreg_el1(val, SYS_SPSR); > +} This one doesn't look like it needs duplicating. > +#else > +#error Hypervisor code only! > +#endif Thanks, James _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel