[PATCH 1/2] mx1: fix build when DEBUG_LL is enabled

[PATCH 1/2] mx1: fix build when DEBUG_LL is enabled

[Baruch Siach]

Commit "mx1: prefix SOC specific defines with MX1_ and deprecate old names"
redefined the IO_ADDRESS macro in a way that is incompatible with
debug-macro.S. Reintroduce AVIC_IO_ADDRESS, and use it in debug-macro.S.

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
---
 arch/arm/plat-mxc/include/mach/debug-macro.S |    2 +-
 arch/arm/plat-mxc/include/mach/mx1.h         |    5 ++++-
 2 files changed, 5 insertions(+), 2 deletions(-)

diff --git a/arch/arm/plat-mxc/include/mach/debug-macro.S b/arch/arm/plat-mxc/include/mach/debug-macro.S
index 133d66b..8f82ff4 100644
--- a/arch/arm/plat-mxc/include/mach/debug-macro.S
+++ b/arch/arm/plat-mxc/include/mach/debug-macro.S
@@ -15,7 +15,7 @@
 #ifdef CONFIG_ARCH_MX1
 #include <mach/mx1.h>
 #define UART_PADDR	UART1_BASE_ADDR
-#define UART_VADDR	IO_ADDRESS(UART1_BASE_ADDR)
+#define UART_VADDR	AVIC_IO_ADDRESS(UART1_BASE_ADDR)
 #endif
 
 #ifdef CONFIG_ARCH_MX25
diff --git a/arch/arm/plat-mxc/include/mach/mx1.h b/arch/arm/plat-mxc/include/mach/mx1.h
index 5eba7e6..37d3560 100644
--- a/arch/arm/plat-mxc/include/mach/mx1.h
+++ b/arch/arm/plat-mxc/include/mach/mx1.h
@@ -72,6 +72,10 @@
 #define MX1_AVIC_BASE_ADDR		(0x23000 + MX1_IO_BASE_ADDR)
 #define MX1_CSI_BASE_ADDR		(0x24000 + MX1_IO_BASE_ADDR)
 
+/* define macro needed for entry-macro.S */
+#define AVIC_IO_ADDRESS(x)	((x) - MX1_IO_BASE_ADDR			\
+		+ MX1_IO_BASE_ADDR_VIRT)
+
 /* macro to get at IO space when running virtually */
 #define MX1_IO_ADDRESS(x) (						\
 	IMX_IO_ADDRESS(x, MX1_IO))
@@ -213,7 +217,6 @@
 #define AVIC_BASE_ADDR MX1_AVIC_BASE_ADDR
 #define CSI_BASE_ADDR MX1_CSI_BASE_ADDR
 #define IO_ADDRESS(x) MX1_IO_ADDRESS(x)
-#define AVIC_IO_ADDRESS(x) IO_ADDRESS(x)
 #define INT_SOFTINT MX1_INT_SOFTINT
 #define CSI_INT MX1_CSI_INT
 #define DSPA_MAC_INT MX1_DSPA_MAC_INT
-- 
1.7.0

[PATCH 2/2] mx25: fix build when DEBUG_LL is enabled

[Baruch Siach]

From: Alex Greshgorin <alexg@orex-cr.com>

Commit "imx25: redefine MX25_IO_ADDRESS using IMX_IO_ADDRESS" removed the
MX25_AIPS1_IO_ADDRESS macro which is used in debug-macro.S. Reintroduce this
macro.

Signed-off-by: Alex Greshgorin <alexg@orex-cr.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
---
 arch/arm/plat-mxc/include/mach/mx25.h |    4 ++++
 1 files changed, 4 insertions(+), 0 deletions(-)

diff --git a/arch/arm/plat-mxc/include/mach/mx25.h b/arch/arm/plat-mxc/include/mach/mx25.h
index 4eb6e33..e2e35db 100644
--- a/arch/arm/plat-mxc/include/mach/mx25.h
+++ b/arch/arm/plat-mxc/include/mach/mx25.h
@@ -22,6 +22,10 @@
 #define MX25_GPIO3_BASE_ADDR_VIRT	(MX25_AIPS2_BASE_ADDR_VIRT + 0xa4000)
 #define MX25_GPIO4_BASE_ADDR_VIRT	(MX25_AIPS2_BASE_ADDR_VIRT + 0x9c000)
 
+/* define macro needed for debug-macro.S */
+#define MX25_AIPS1_IO_ADDRESS(x)	\
+	(((x) - MX25_AIPS1_BASE_ADDR) + MX25_AIPS1_BASE_ADDR_VIRT)
+
 #define MX25_IO_ADDRESS(x) (					\
 	IMX_IO_ADDRESS(x, MX25_AIPS1) ?:			\
 	IMX_IO_ADDRESS(x, MX25_AIPS2) ?:			\
-- 
1.7.0

[PATCH 1/2] mx1: fix build when DEBUG_LL is enabled

[Uwe Kleine-König]

Hello,

On Tue, Mar 09, 2010 at 12:12:04PM +0200, Baruch Siach wrote:
> Commit "mx1: prefix SOC specific defines with MX1_ and deprecate old names"
> redefined the IO_ADDRESS macro in a way that is incompatible with
> debug-macro.S. Reintroduce AVIC_IO_ADDRESS, and use it in debug-macro.S.
This feels wrong.  Can you please instead fix IMX_IO_ADDRESS?

Something like:

	#ifdef __ASSEMBLY__
	#define IOREG(x) (x)
	#else
	#define IOREG(x) ((void __force __iomem *)(x))
	#endif

	#define IMX_IO_ADDRESS(addr, module) IOREG(\
	...

could work.  Don't know if the cast to unsigned long works in assembler.
Maybe it's unneeded?  Don't remember.

Best regards
Uwe

-- 
Pengutronix e.K.                           | Uwe Kleine-K?nig            |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |

[PATCH 1/2] mx1: fix build when DEBUG_LL is enabled

[Russell King - ARM Linux]

On Thu, Mar 11, 2010 at 11:39:41AM +0100, Uwe Kleine-K?nig wrote:
> Hello,
> 
> On Tue, Mar 09, 2010 at 12:12:04PM +0200, Baruch Siach wrote:
> > Commit "mx1: prefix SOC specific defines with MX1_ and deprecate old names"
> > redefined the IO_ADDRESS macro in a way that is incompatible with
> > debug-macro.S. Reintroduce AVIC_IO_ADDRESS, and use it in debug-macro.S.
> This feels wrong.  Can you please instead fix IMX_IO_ADDRESS?
> 
> Something like:
> 
> 	#ifdef __ASSEMBLY__
> 	#define IOREG(x) (x)
> 	#else
> 	#define IOREG(x) ((void __force __iomem *)(x))
> 	#endif
> 
> 	#define IMX_IO_ADDRESS(addr, module) IOREG(\
> 	...
> 
> could work.  Don't know if the cast to unsigned long works in assembler.
> Maybe it's unneeded?  Don't remember.

This is what I put in place for OMAP:

#ifdef __ASSEMBLER__
#define IOMEM(x)                (x)
#else
#define IOMEM(x)                ((void __force __iomem *)(x))
#endif

and then define all your device virtual addresses as normal hex integers
wrapped in IOMEM().

You can then use those symbols in assembly and C without any harm.

I'd prefer folk use the same macro across all platforms - it's something
we should eventually move to the asm/ includes - but not yet because there
isn't a clear include that it should go in.  (asm/io.h seems logical but
has problems for assembly.)

[PATCH 1/2] mx1: fix build when DEBUG_LL is enabled

[Baruch Siach]

Hi Russel, Uwe,
On Thu, Mar 11, 2010 at 10:56:37AM +0000, Russell King - ARM Linux wrote:
> On Thu, Mar 11, 2010 at 11:39:41AM +0100, Uwe Kleine-K?nig wrote:
> > Hello,
> > 
> > On Tue, Mar 09, 2010 at 12:12:04PM +0200, Baruch Siach wrote:
> > > Commit "mx1: prefix SOC specific defines with MX1_ and deprecate old names"
> > > redefined the IO_ADDRESS macro in a way that is incompatible with
> > > debug-macro.S. Reintroduce AVIC_IO_ADDRESS, and use it in debug-macro.S.
> > This feels wrong.  Can you please instead fix IMX_IO_ADDRESS?
> > 
> > Something like:
> > 
> > 	#ifdef __ASSEMBLY__
> > 	#define IOREG(x) (x)
> > 	#else
> > 	#define IOREG(x) ((void __force __iomem *)(x))
> > 	#endif
> > 
> > 	#define IMX_IO_ADDRESS(addr, module) IOREG(\
> > 	...
> > 
> > could work.  Don't know if the cast to unsigned long works in assembler.
> > Maybe it's unneeded?  Don't remember.
> 
> This is what I put in place for OMAP:
> 
> #ifdef __ASSEMBLER__
> #define IOMEM(x)                (x)
> #else
> #define IOMEM(x)                ((void __force __iomem *)(x))
> #endif
> 
> and then define all your device virtual addresses as normal hex integers
> wrapped in IOMEM().
> 
> You can then use those symbols in assembly and C without any harm.

OK. I'll try this approach and send an updated patch shortly.

baruch

-- 
                                                     ~. .~   Tk Open Systems
=}------------------------------------------------ooO--U--Ooo------------{=
   - baruch at tkos.co.il - tel: +972.2.679.5364, http://www.tkos.co.il -

[PATCH 0/3] imx: fix build of assembly code using P2V macros

[Baruch Siach]

This set of patches fixes the build of mx1 and mx25 which CONFIG_DEBUG_LL is 
enabled. The first patch makes IMX_IO_ADDRESS compatible with assmebly code, 
and the other two use IMX_IO_ADDRESS to fix debug-macro.S.

Alex Greshgorin (1):
  mx25: fix build when DEBUG_LL is enabled

Baruch Siach (2):
  imx: make IMX_IO_ADDRESS assembly compatible
  mx1: fix build when DEBUG_LL is enabled

 arch/arm/plat-mxc/include/mach/debug-macro.S |    6 +++---
 arch/arm/plat-mxc/include/mach/hardware.h    |   16 ++++++++++++----
 2 files changed, 15 insertions(+), 7 deletions(-)

[PATCH 1/3] imx: make IMX_IO_ADDRESS assembly compatible

[Baruch Siach]

The IMX_IO_ADDRESS macro may be used directly on indirectly in assembly code.
Make it assembly compatible by using the IOMEM helper macro.

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
---
 arch/arm/plat-mxc/include/mach/hardware.h |   16 ++++++++++++----
 1 files changed, 12 insertions(+), 4 deletions(-)

diff --git a/arch/arm/plat-mxc/include/mach/hardware.h b/arch/arm/plat-mxc/include/mach/hardware.h
index ebadf4a..f75a5cc 100644
--- a/arch/arm/plat-mxc/include/mach/hardware.h
+++ b/arch/arm/plat-mxc/include/mach/hardware.h
@@ -22,10 +22,18 @@
 
 #include <asm/sizes.h>
 
-#define IMX_IO_ADDRESS(addr, module)					\
-	((void __force __iomem *)					\
-	 (((unsigned long)((addr) - (module ## _BASE_ADDR)) < module ## _SIZE) ?\
-	 (addr) - (module ## _BASE_ADDR) + (module ## _BASE_ADDR_VIRT) : 0))
+#ifdef __ASSEMBLER__
+#define IOMEM(addr,base,size,virt)	((addr) - (base) + (virt))
+#else
+#define IOMEM(addr,base,size,virt)			\
+	((void __force __iomem *)			\
+	((unsigned long) ((addr) - (base)) < size) ?	\
+	(addr) - (base) + (virt) : 0)
+#endif
+
+#define IMX_IO_ADDRESS(addr, module)				\
+	IOMEM(addr, module ## _BASE_ADDR, module ## _SIZE,	\
+	module ## _BASE_ADDR_VIRT)
 
 #ifdef CONFIG_ARCH_MX5
 #include <mach/mx51.h>
-- 
1.7.0

[PATCH, RESEND] imx: make IMX_IO_ADDRESS assembly compatible

[Baruch Siach]

The IMX_IO_ADDRESS macro may be used directly on indirectly in assembly code.
Make it assembly compatible by using the IOMEM helper macro.

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
---

Fixed the unsigned long cast. Please ignore the previous patch.

 arch/arm/plat-mxc/include/mach/hardware.h |   16 ++++++++++++----
 1 files changed, 12 insertions(+), 4 deletions(-)

diff --git a/arch/arm/plat-mxc/include/mach/hardware.h b/arch/arm/plat-mxc/include/mach/hardware.h
index ebadf4a..6bb0928 100644
--- a/arch/arm/plat-mxc/include/mach/hardware.h
+++ b/arch/arm/plat-mxc/include/mach/hardware.h
@@ -22,10 +22,18 @@
 
 #include <asm/sizes.h>
 
-#define IMX_IO_ADDRESS(addr, module)					\
-	((void __force __iomem *)					\
-	 (((unsigned long)((addr) - (module ## _BASE_ADDR)) < module ## _SIZE) ?\
-	 (addr) - (module ## _BASE_ADDR) + (module ## _BASE_ADDR_VIRT) : 0))
+#ifdef __ASSEMBLER__
+#define IOMEM(addr,base,size,virt)	((addr) - (base) + (virt))
+#else
+#define IOMEM(addr,base,size,virt)			\
+	((void __force __iomem *)			\
+	(((unsigned long) ((addr) - (base)) < size) ?	\
+	(addr) - (base) + (virt) : 0))
+#endif
+
+#define IMX_IO_ADDRESS(addr, module)				\
+	IOMEM(addr, module ## _BASE_ADDR, module ## _SIZE,	\
+	module ## _BASE_ADDR_VIRT)
 
 #ifdef CONFIG_ARCH_MX5
 #include <mach/mx51.h>
-- 
1.7.0

[PATCH, RESEND] imx: make IMX_IO_ADDRESS assembly compatible

[Russell King - ARM Linux]

On Tue, Mar 16, 2010 at 10:41:45AM +0200, Baruch Siach wrote:
> +#ifdef __ASSEMBLER__
> +#define IOMEM(addr,base,size,virt)	((addr) - (base) + (virt))
> +#else
> +#define IOMEM(addr,base,size,virt)			\
> +	((void __force __iomem *)			\
> +	(((unsigned long) ((addr) - (base)) < size) ?	\
> +	(addr) - (base) + (virt) : 0))
> +#endif

If you look at:

http://lists.arm.linux.org.uk/lurker/message/20100311.105637.21ac15c1.en.html

you'll see this definition is incompatible with my stated aim for this
macro.

[PATCH 1/3] imx: make IMX_IO_ADDRESS assembly compatible

[Uwe Kleine-König]

Hello Baruch,

On Tue, Mar 16, 2010 at 08:35:37AM +0200, Baruch Siach wrote:
> The IMX_IO_ADDRESS macro may be used directly on indirectly in assembly code.
> Make it assembly compatible by using the IOMEM helper macro.
> 
> Signed-off-by: Baruch Siach <baruch@tkos.co.il>
> ---
>  arch/arm/plat-mxc/include/mach/hardware.h |   16 ++++++++++++----
>  1 files changed, 12 insertions(+), 4 deletions(-)
> 
> diff --git a/arch/arm/plat-mxc/include/mach/hardware.h b/arch/arm/plat-mxc/include/mach/hardware.h
> index ebadf4a..f75a5cc 100644
> --- a/arch/arm/plat-mxc/include/mach/hardware.h
> +++ b/arch/arm/plat-mxc/include/mach/hardware.h
> @@ -22,10 +22,18 @@
>  
>  #include <asm/sizes.h>
>  
> -#define IMX_IO_ADDRESS(addr, module)					\
> -	((void __force __iomem *)					\
> -	 (((unsigned long)((addr) - (module ## _BASE_ADDR)) < module ## _SIZE) ?\
> -	 (addr) - (module ## _BASE_ADDR) + (module ## _BASE_ADDR_VIRT) : 0))
> +#ifdef __ASSEMBLER__
> +#define IOMEM(addr,base,size,virt)	((addr) - (base) + (virt))
> +#else
> +#define IOMEM(addr,base,size,virt)			\
> +	((void __force __iomem *)			\
> +	((unsigned long) ((addr) - (base)) < size) ?	\
> +	(addr) - (base) + (virt) : 0)
> +#endif
> +
> +#define IMX_IO_ADDRESS(addr, module)				\
> +	IOMEM(addr, module ## _BASE_ADDR, module ## _SIZE,	\
> +	module ## _BASE_ADDR_VIRT)
hmmm, the construct used to define MX27_IO_ADDRESS et al. does only work
without __ASSEMBLER__ anyhow, still I think it might be at least
surprising that e.g.

	IOMEM(MX27_WDOG_BASE_ADDR, MX27_SAHB1_BASE_ADDR, MX27_SAHB1_SIZE, MX27_SAHB1_BASE_ADDR_VIRT)

evaluates to 0x84102000 if __ASSEMBLER__ is defined but 0 if not.

I tend to think we should use a different solution.

IMHO it would be great to have a macro that maps physical to virtual
addresses for both assembler and C.  E.g. ns9xxx has something like
that[1], other probably, too, but for imx it would be harder as the used
addresses differ and are spread over the whole address space.  Some time
ago I found a function that would do the task, but Sascha didn't agree
to use it because it involved too much magic.

Best regards
Uwe

[1] io_p2v defined in arch/arm/mach-ns9xxx/include/mach/hardware.h

-- 
Pengutronix e.K.                           | Uwe Kleine-K?nig            |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |

[PATCH 1/3] imx: make IMX_IO_ADDRESS assembly compatible

[Baruch Siach]

Hi Uwe,

On Tue, Mar 16, 2010 at 09:52:12AM +0100, Uwe Kleine-K?nig wrote:
> On Tue, Mar 16, 2010 at 08:35:37AM +0200, Baruch Siach wrote:
> > The IMX_IO_ADDRESS macro may be used directly on indirectly in assembly code.
> > Make it assembly compatible by using the IOMEM helper macro.
> > 
> > Signed-off-by: Baruch Siach <baruch@tkos.co.il>
> > ---
> >  arch/arm/plat-mxc/include/mach/hardware.h |   16 ++++++++++++----
> >  1 files changed, 12 insertions(+), 4 deletions(-)
> > 
> > diff --git a/arch/arm/plat-mxc/include/mach/hardware.h b/arch/arm/plat-mxc/include/mach/hardware.h
> > index ebadf4a..f75a5cc 100644
> > --- a/arch/arm/plat-mxc/include/mach/hardware.h
> > +++ b/arch/arm/plat-mxc/include/mach/hardware.h
> > @@ -22,10 +22,18 @@
> >  
> >  #include <asm/sizes.h>
> >  
> > -#define IMX_IO_ADDRESS(addr, module)					\
> > -	((void __force __iomem *)					\
> > -	 (((unsigned long)((addr) - (module ## _BASE_ADDR)) < module ## _SIZE) ?\
> > -	 (addr) - (module ## _BASE_ADDR) + (module ## _BASE_ADDR_VIRT) : 0))
> > +#ifdef __ASSEMBLER__
> > +#define IOMEM(addr,base,size,virt)	((addr) - (base) + (virt))
> > +#else
> > +#define IOMEM(addr,base,size,virt)			\
> > +	((void __force __iomem *)			\
> > +	((unsigned long) ((addr) - (base)) < size) ?	\
> > +	(addr) - (base) + (virt) : 0)
> > +#endif
> > +
> > +#define IMX_IO_ADDRESS(addr, module)				\
> > +	IOMEM(addr, module ## _BASE_ADDR, module ## _SIZE,	\
> > +	module ## _BASE_ADDR_VIRT)
> hmmm, the construct used to define MX27_IO_ADDRESS et al. does only work
> without __ASSEMBLER__ anyhow, still I think it might be at least
> surprising that e.g.
> 
> 	IOMEM(MX27_WDOG_BASE_ADDR, MX27_SAHB1_BASE_ADDR, MX27_SAHB1_SIZE, MX27_SAHB1_BASE_ADDR_VIRT)
> 
> evaluates to 0x84102000 if __ASSEMBLER__ is defined but 0 if not.
> 
> I tend to think we should use a different solution.
> 
> IMHO it would be great to have a macro that maps physical to virtual
> addresses for both assembler and C.  E.g. ns9xxx has something like
> that[1], other probably, too, but for imx it would be harder as the used
> addresses differ and are spread over the whole address space.  Some time
> ago I found a function that would do the task, but Sascha didn't agree
> to use it because it involved too much magic.

So, what you actually suggest is to use the simple arithmetic IOMEM version 
which is assembly compatible, and remove the C only ?: error checking, as is 
being done in ns9xxx, right? Or are you suggesting to change the P2V mapping 
of the entire i.MX platform so that this error checking is not needed?

baruch

-- 
                                                     ~. .~   Tk Open Systems
=}------------------------------------------------ooO--U--Ooo------------{=
   - baruch at tkos.co.il - tel: +972.2.679.5364, http://www.tkos.co.il -

[PATCH 1/3] imx: make IMX_IO_ADDRESS assembly compatible

[Uwe Kleine-König]

Hi Baruch,

> > > -#define IMX_IO_ADDRESS(addr, module)					\
> > > -	((void __force __iomem *)					\
> > > -	 (((unsigned long)((addr) - (module ## _BASE_ADDR)) < module ## _SIZE) ?\
> > > -	 (addr) - (module ## _BASE_ADDR) + (module ## _BASE_ADDR_VIRT) : 0))
> > > +#ifdef __ASSEMBLER__
> > > +#define IOMEM(addr,base,size,virt)	((addr) - (base) + (virt))
> > > +#else
> > > +#define IOMEM(addr,base,size,virt)			\
> > > +	((void __force __iomem *)			\
> > > +	((unsigned long) ((addr) - (base)) < size) ?	\
> > > +	(addr) - (base) + (virt) : 0)
> > > +#endif
> > > +
> > > +#define IMX_IO_ADDRESS(addr, module)				\
> > > +	IOMEM(addr, module ## _BASE_ADDR, module ## _SIZE,	\
> > > +	module ## _BASE_ADDR_VIRT)
> > hmmm, the construct used to define MX27_IO_ADDRESS et al. does only work
> > without __ASSEMBLER__ anyhow, still I think it might be at least
> > surprising that e.g.
> > 
> > 	IOMEM(MX27_WDOG_BASE_ADDR, MX27_SAHB1_BASE_ADDR, MX27_SAHB1_SIZE, MX27_SAHB1_BASE_ADDR_VIRT)
> > 
> > evaluates to 0x84102000 if __ASSEMBLER__ is defined but 0 if not.
> > 
> > I tend to think we should use a different solution.
> > 
> > IMHO it would be great to have a macro that maps physical to virtual
> > addresses for both assembler and C.  E.g. ns9xxx has something like
> > that[1], other probably, too, but for imx it would be harder as the used
> > addresses differ and are spread over the whole address space.  Some time
> > ago I found a function that would do the task, but Sascha didn't agree
> > to use it because it involved too much magic.
> 
> So, what you actually suggest is to use the simple arithmetic IOMEM version 
> which is assembly compatible, and remove the C only ?: error checking, as is 
> being done in ns9xxx, right? Or are you suggesting to change the P2V mapping 
> of the entire i.MX platform so that this error checking is not needed?
We currently need the ?: construct for the definition of
MX.._IO_ADDRESS.   Maybe using it would work for assembler, too, as
there are only constants involved?

For reference:  The function I found back then is:

	#define io_p2v(x)	(0xf4000000 + \
				(((x) & 0x50000000) >> 8) + \
				(((x) & 0x02000000) >> 4) + \
				(((x) & 0x000fffff)))

This would introduce an injective mapping of the io space to
[0xf4000000;0xf47fffff] for mx1, mx21, mx25, mx27, mx31 and mx35.
(Skipping the chip select mappings that are (AFAIK unnecessarily)
currently used on some socs.):

        mx1:            0x00200000 -> 0xf4000000
        mx2[17]:        0x10000000 -> 0xf4100000
                        0x80000000 -> 0xf4000000
        mx21:           0xdf000000 -> 0xf4700000
        mx27:           0xd8000000 -> 0xf4500000
        mx3[15]:        0xb8000000 -> 0xf4100000
        mx{25,31,35}:   0x68000000 -> 0xf4400000
                        0x43f00000 -> 0xf4600000
                        0x53f00000 -> 0xf4700000

The upside of this approach is that it just works in C and Assembler,
but it's ugly and the mapped sections are spread over
[0xf4000000;0xf47fffff] instead of being one after another as they are
now.  For mx51 this might need further adaption.

So in my order of preference the possibilities are:

 1) IOMEM with ?: for Assembler, too
 2) "my" io_p2v as above
 3) IOMEM as you suggested

The nice thing about 1) (and 2)) is that we could just use
MX.._IO_ADDRESS in debug-macro.h.

Best regards
Uwe

-- 
Pengutronix e.K.                           | Uwe Kleine-K?nig            |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |

[PATCH 1/3] imx: make IMX_IO_ADDRESS assembly compatible

[Uwe Kleine-König]

Hello,

On Tue, Mar 16, 2010 at 11:30:52AM +0100, Uwe Kleine-K?nig wrote:
> > > > -#define IMX_IO_ADDRESS(addr, module)					\
> > > > -	((void __force __iomem *)					\
> > > > -	 (((unsigned long)((addr) - (module ## _BASE_ADDR)) < module ## _SIZE) ?\
> > > > -	 (addr) - (module ## _BASE_ADDR) + (module ## _BASE_ADDR_VIRT) : 0))
> > > > +#ifdef __ASSEMBLER__
> > > > +#define IOMEM(addr,base,size,virt)	((addr) - (base) + (virt))
> > > > +#else
> > > > +#define IOMEM(addr,base,size,virt)			\
> > > > +	((void __force __iomem *)			\
> > > > +	((unsigned long) ((addr) - (base)) < size) ?	\
> > > > +	(addr) - (base) + (virt) : 0)
> > > > +#endif
> > > > +
> > > > +#define IMX_IO_ADDRESS(addr, module)				\
> > > > +	IOMEM(addr, module ## _BASE_ADDR, module ## _SIZE,	\
> > > > +	module ## _BASE_ADDR_VIRT)
> > > hmmm, the construct used to define MX27_IO_ADDRESS et al. does only work
> > > without __ASSEMBLER__ anyhow, still I think it might be at least
> > > surprising that e.g.
> > > 
> > > 	IOMEM(MX27_WDOG_BASE_ADDR, MX27_SAHB1_BASE_ADDR, MX27_SAHB1_SIZE, MX27_SAHB1_BASE_ADDR_VIRT)
> > > 
> > > evaluates to 0x84102000 if __ASSEMBLER__ is defined but 0 if not.
> > > 
> > > I tend to think we should use a different solution.
> > > 
> > > IMHO it would be great to have a macro that maps physical to virtual
> > > addresses for both assembler and C.  E.g. ns9xxx has something like
> > > that[1], other probably, too, but for imx it would be harder as the used
> > > addresses differ and are spread over the whole address space.  Some time
> > > ago I found a function that would do the task, but Sascha didn't agree
> > > to use it because it involved too much magic.
> > 
> > So, what you actually suggest is to use the simple arithmetic IOMEM version 
> > which is assembly compatible, and remove the C only ?: error checking, as is 
> > being done in ns9xxx, right? Or are you suggesting to change the P2V mapping 
> > of the entire i.MX platform so that this error checking is not needed?
> We currently need the ?: construct for the definition of
> MX.._IO_ADDRESS.   Maybe using it would work for assembler, too, as
> there are only constants involved?
> 
> For reference:  The function I found back then is:
> 
> 	#define io_p2v(x)	(0xf4000000 + \
> 				(((x) & 0x50000000) >> 8) + \
> 				(((x) & 0x02000000) >> 4) + \
> 				(((x) & 0x000fffff)))
> 
> This would introduce an injective mapping of the io space to
> [0xf4000000;0xf47fffff] for mx1, mx21, mx25, mx27, mx31 and mx35.
> (Skipping the chip select mappings that are (AFAIK unnecessarily)
> currently used on some socs.):
> 
>         mx1:            0x00200000 -> 0xf4000000
>         mx2[17]:        0x10000000 -> 0xf4100000
>                         0x80000000 -> 0xf4000000
>         mx21:           0xdf000000 -> 0xf4700000
>         mx27:           0xd8000000 -> 0xf4500000
>         mx3[15]:        0xb8000000 -> 0xf4100000
>         mx{25,31,35}:   0x68000000 -> 0xf4400000
>                         0x43f00000 -> 0xf4600000
>                         0x53f00000 -> 0xf4700000
> 
> The upside of this approach is that it just works in C and Assembler,
> but it's ugly and the mapped sections are spread over
> [0xf4000000;0xf47fffff] instead of being one after another as they are
> now.  For mx51 this might need further adaption.
> 
> So in my order of preference the possibilities are:
> 
>  1) IOMEM with ?: for Assembler, too
>  2) "my" io_p2v as above
>  3) IOMEM as you suggested
> 
> The nice thing about 1) (and 2)) is that we could just use
> MX.._IO_ADDRESS in debug-macro.h.
While trying to get rid of IMX_NEEDS_DEPRECATED_SYMBOLS I tried 1), but
it seems it doesn't work (using a gcc 4.3.2 + binutils 2.19 toolchain). :-(

So I tried if my function works for mx51, and it does.  Unfortunately it
fails for mxc91231.  But I already have a different function that works
on all mxc-SoCs.

I will create an RFC patch that introduces my suggestion in reply to
this mail.  Would be nice to hear (or better read) your thoughts on
that.

Best regards
Uwe

-- 
Pengutronix e.K.                           | Uwe Kleine-K?nig            |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |

[PATCH 1/7] mx3: fix the last users of IMX_NEEDS_DEPRECATED_SYMBOLS

[Uwe Kleine-König]

Signed-off-by: Uwe Kleine-K?nig <u.kleine-koenig@pengutronix.de>
---
 arch/arm/mach-mx3/Makefile        |    3 --
 arch/arm/mach-mx3/devices.c       |   72 ++++++++++++++++++++-----------------
 arch/arm/mach-mx3/mach-mx31_3ds.c |    2 +-
 arch/arm/mach-mx3/mm.c            |   48 ++++++++++++------------
 4 files changed, 64 insertions(+), 61 deletions(-)

diff --git a/arch/arm/mach-mx3/Makefile b/arch/arm/mach-mx3/Makefile
index 8a182d0a..7feb6c4 100644
--- a/arch/arm/mach-mx3/Makefile
+++ b/arch/arm/mach-mx3/Makefile
@@ -5,8 +5,6 @@
 # Object file lists.
 
 obj-y				:= mm.o devices.o cpu.o
-CFLAGS_mm.o = -DIMX_NEEDS_DEPRECATED_SYMBOLS
-CFLAGS_devices.o = -DIMX_NEEDS_DEPRECATED_SYMBOLS
 obj-$(CONFIG_ARCH_MX31)		+= clock-imx31.o iomux-imx31.o
 obj-$(CONFIG_ARCH_MX35)		+= clock-imx35.o
 obj-$(CONFIG_MACH_MX31ADS)	+= mach-mx31ads.o
@@ -15,7 +13,6 @@ obj-$(CONFIG_MACH_MX31LITE)	+= mach-mx31lite.o mx31lite-db.o
 obj-$(CONFIG_MACH_PCM037)	+= mach-pcm037.o
 obj-$(CONFIG_MACH_PCM037_EET)	+= mach-pcm037_eet.o
 obj-$(CONFIG_MACH_MX31_3DS)	+= mach-mx31_3ds.o
-CFLAGS_mach-mx31_3ds.o = -DIMX_NEEDS_DEPRECATED_SYMBOLS
 obj-$(CONFIG_MACH_MX31MOBOARD)	+= mach-mx31moboard.o mx31moboard-devboard.o \
 				   mx31moboard-marxbot.o mx31moboard-smartbot.o
 obj-$(CONFIG_MACH_QONG)		+= mach-qong.o
diff --git a/arch/arm/mach-mx3/devices.c b/arch/arm/mach-mx3/devices.c
index d4da949..1e737ad 100644
--- a/arch/arm/mach-mx3/devices.c
+++ b/arch/arm/mach-mx3/devices.c
@@ -33,18 +33,18 @@
 static struct mxc_gpio_port imx_gpio_ports[] = {
 	{
 		.chip.label = "gpio-0",
-		.base = IO_ADDRESS(GPIO1_BASE_ADDR),
-		.irq = MXC_INT_GPIO1,
+		.base = MX31_IO_ADDRESS(MX31_GPIO1_BASE_ADDR),
+		.irq = MX3x_INT_GPIO1,
 		.virtual_irq_start = MXC_GPIO_IRQ_START,
 	}, {
 		.chip.label = "gpio-1",
-		.base = IO_ADDRESS(GPIO2_BASE_ADDR),
-		.irq = MXC_INT_GPIO2,
+		.base = MX31_IO_ADDRESS(MX31_GPIO2_BASE_ADDR),
+		.irq = MX3x_INT_GPIO2,
 		.virtual_irq_start = MXC_GPIO_IRQ_START + 32,
 	}, {
 		.chip.label = "gpio-2",
-		.base = IO_ADDRESS(GPIO3_BASE_ADDR),
-		.irq = MXC_INT_GPIO3,
+		.base = MX31_IO_ADDRESS(MX31_GPIO3_BASE_ADDR),
+		.irq = MX3x_INT_GPIO3,
 		.virtual_irq_start = MXC_GPIO_IRQ_START + 64,
 	}
 };
@@ -56,8 +56,8 @@ int __init imx3x_register_gpios(void)
 
 static struct resource mxc_w1_master_resources[] = {
 	{
-		.start = OWIRE_BASE_ADDR,
-		.end   = OWIRE_BASE_ADDR + SZ_4K - 1,
+		.start = MX3x_OWIRE_BASE_ADDR,
+		.end = MX3x_OWIRE_BASE_ADDR + SZ_4K - 1,
 		.flags = IORESOURCE_MEM,
 	},
 };
@@ -110,8 +110,8 @@ struct platform_device mxcsdhc_device1 = {
 
 static struct resource rnga_resources[] = {
 	{
-		.start = RNGA_BASE_ADDR,
-		.end = RNGA_BASE_ADDR + 0x28,
+		.start = MX3x_RNGA_BASE_ADDR,
+		.end = MX3x_RNGA_BASE_ADDR + 0x28,
 		.flags = IORESOURCE_MEM,
 	},
 };
@@ -129,20 +129,20 @@ struct platform_device mxc_rnga_device = {
 /* The resource order is important! */
 static struct resource mx3_ipu_rsrc[] = {
 	{
-		.start = IPU_CTRL_BASE_ADDR,
-		.end = IPU_CTRL_BASE_ADDR + 0x5F,
+		.start = MX3x_IPU_CTRL_BASE_ADDR,
+		.end = MX3x_IPU_CTRL_BASE_ADDR + 0x5F,
 		.flags = IORESOURCE_MEM,
 	}, {
-		.start = IPU_CTRL_BASE_ADDR + 0x88,
-		.end = IPU_CTRL_BASE_ADDR + 0xB3,
+		.start = MX3x_IPU_CTRL_BASE_ADDR + 0x88,
+		.end = MX3x_IPU_CTRL_BASE_ADDR + 0xB3,
 		.flags = IORESOURCE_MEM,
 	}, {
-		.start = MXC_INT_IPU_SYN,
-		.end = MXC_INT_IPU_SYN,
+		.start = MX3x_INT_IPU_SYN,
+		.end = MX3x_INT_IPU_SYN,
 		.flags = IORESOURCE_IRQ,
 	}, {
-		.start = MXC_INT_IPU_ERR,
-		.end = MXC_INT_IPU_ERR,
+		.start = MX3x_INT_IPU_ERR,
+		.end = MX3x_INT_IPU_ERR,
 		.flags = IORESOURCE_IRQ,
 	},
 };
@@ -156,8 +156,8 @@ struct platform_device mx3_ipu = {
 
 static struct resource fb_resources[] = {
 	{
-		.start	= IPU_CTRL_BASE_ADDR + 0xB4,
-		.end	= IPU_CTRL_BASE_ADDR + 0x1BF,
+		.start	= MX3x_IPU_CTRL_BASE_ADDR + 0xB4,
+		.end	= MX3x_IPU_CTRL_BASE_ADDR + 0x1BF,
 		.flags	= IORESOURCE_MEM,
 	},
 };
@@ -174,8 +174,8 @@ struct platform_device mx3_fb = {
 
 static struct resource camera_resources[] = {
 	{
-		.start	= IPU_CTRL_BASE_ADDR + 0x60,
-		.end	= IPU_CTRL_BASE_ADDR + 0x87,
+		.start	= MX3x_IPU_CTRL_BASE_ADDR + 0x60,
+		.end	= MX3x_IPU_CTRL_BASE_ADDR + 0x87,
 		.flags	= IORESOURCE_MEM,
 	},
 };
@@ -190,14 +190,15 @@ struct platform_device mx3_camera = {
 	},
 };
 
+#ifdef CONFIG_ARCH_MX31
 static struct resource otg_resources[] = {
 	{
 		.start	= MX31_OTG_BASE_ADDR,
 		.end	= MX31_OTG_BASE_ADDR + 0x1ff,
 		.flags	= IORESOURCE_MEM,
 	}, {
-		.start	= MXC_INT_USB3,
-		.end	= MXC_INT_USB3,
+		.start	= MX31_INT_USB3,
+		.end	= MX31_INT_USB3,
 		.flags	= IORESOURCE_IRQ,
 	},
 };
@@ -215,6 +216,7 @@ struct platform_device mxc_otg_udc_device = {
 	.resource	= otg_resources,
 	.num_resources	= ARRAY_SIZE(otg_resources),
 };
+#endif
 
 /* OTG host */
 struct platform_device mxc_otg_host = {
@@ -228,8 +230,8 @@ struct platform_device mxc_otg_host = {
 	.num_resources = ARRAY_SIZE(otg_resources),
 };
 
+#ifdef CONFIG_ARCH_MX31
 /* USB host 1 */
-
 static u64 usbh1_dmamask = ~(u32)0;
 
 static struct resource mxc_usbh1_resources[] = {
@@ -238,8 +240,8 @@ static struct resource mxc_usbh1_resources[] = {
 		.end = MX31_OTG_BASE_ADDR + 0x3ff,
 		.flags = IORESOURCE_MEM,
 	}, {
-		.start = MXC_INT_USB1,
-		.end = MXC_INT_USB1,
+		.start = MX31_INT_USB1,
+		.end = MX31_INT_USB1,
 		.flags = IORESOURCE_IRQ,
 	},
 };
@@ -264,8 +266,8 @@ static struct resource mxc_usbh2_resources[] = {
 		.end = MX31_OTG_BASE_ADDR + 0x5ff,
 		.flags = IORESOURCE_MEM,
 	}, {
-		.start = MXC_INT_USB2,
-		.end = MXC_INT_USB2,
+		.start = MX31_INT_USB2,
+		.end = MX31_INT_USB2,
 		.flags = IORESOURCE_IRQ,
 	},
 };
@@ -280,6 +282,7 @@ struct platform_device mxc_usbh2 = {
 	.resource = mxc_usbh2_resources,
 	.num_resources = ARRAY_SIZE(mxc_usbh2_resources),
 };
+#endif
 
 static struct resource imx_wdt_resources[] = {
 	{
@@ -343,14 +346,17 @@ static int __init mx3_devices_init(void)
 #endif
 #if defined(CONFIG_ARCH_MX35)
 	if (cpu_is_mx35()) {
+		imx_gpio_ports[0].base = MX35_IO_ADDRESS(MX35_GPIO1_BASE_ADDR),
+		imx_gpio_ports[1].base = MX35_IO_ADDRESS(MX35_GPIO2_BASE_ADDR),
+		imx_gpio_ports[2].base = MX35_IO_ADDRESS(MX35_GPIO3_BASE_ADDR),
 		otg_resources[0].start = MX35_OTG_BASE_ADDR;
 		otg_resources[0].end = MX35_OTG_BASE_ADDR + 0x1ff;
-		otg_resources[1].start = MXC_INT_USBOTG;
-		otg_resources[1].end = MXC_INT_USBOTG;
+		otg_resources[1].start = MX35_INT_USBOTG;
+		otg_resources[1].end = MX35_INT_USBOTG;
 		mxc_usbh1_resources[0].start = MX35_OTG_BASE_ADDR + 0x400;
 		mxc_usbh1_resources[0].end = MX35_OTG_BASE_ADDR + 0x5ff;
-		mxc_usbh1_resources[1].start = MXC_INT_USBHS;
-		mxc_usbh1_resources[1].end = MXC_INT_USBHS;
+		mxc_usbh1_resources[1].start = MX35_INT_USBHS;
+		mxc_usbh1_resources[1].end = MX35_INT_ESAI;
 		imx_wdt_resources[0].start = MX35_WDOG_BASE_ADDR;
 		imx_wdt_resources[0].end = MX35_WDOG_BASE_ADDR + 0x3fff;
 	}
diff --git a/arch/arm/mach-mx3/mach-mx31_3ds.c b/arch/arm/mach-mx3/mach-mx31_3ds.c
index 6fe69e1..1d24617 100644
--- a/arch/arm/mach-mx3/mach-mx31_3ds.c
+++ b/arch/arm/mach-mx3/mach-mx31_3ds.c
@@ -281,7 +281,7 @@ static void __init mxc_board_init(void)
 	mx31_3ds_usbotg_init();
 	mxc_register_device(&mxc_otg_udc_device, &usbotg_pdata);
 
-	if (!mxc_expio_init(CS5_BASE_ADDR, EXPIO_PARENT_INT))
+	if (!mxc_expio_init(MX31_CS5_BASE_ADDR, EXPIO_PARENT_INT))
 		printk(KERN_WARNING "Init of the debugboard failed, all "
 				    "devices on the board are unusable.\n");
 }
diff --git a/arch/arm/mach-mx3/mm.c b/arch/arm/mach-mx3/mm.c
index b4ffc53..809ee40 100644
--- a/arch/arm/mach-mx3/mm.c
+++ b/arch/arm/mach-mx3/mm.c
@@ -42,29 +42,29 @@
  */
 static struct map_desc mxc_io_desc[] __initdata = {
 	{
-		.virtual	= X_MEMC_BASE_ADDR_VIRT,
-		.pfn		= __phys_to_pfn(X_MEMC_BASE_ADDR),
-		.length		= X_MEMC_SIZE,
-		.type		= MT_DEVICE
+		.virtual = MX3x_X_MEMC_BASE_ADDR_VIRT,
+		.pfn = __phys_to_pfn(MX3x_X_MEMC_BASE_ADDR),
+		.length = MX3x_X_MEMC_SIZE,
+		.type = MT_DEVICE
 	}, {
-		.virtual	= AVIC_BASE_ADDR_VIRT,
-		.pfn		= __phys_to_pfn(AVIC_BASE_ADDR),
-		.length		= AVIC_SIZE,
-		.type		= MT_DEVICE_NONSHARED
+		.virtual = MX3x_AVIC_BASE_ADDR_VIRT,
+		.pfn = __phys_to_pfn(MX3x_AVIC_BASE_ADDR),
+		.length = MX3x_AVIC_SIZE,
+		.type = MT_DEVICE_NONSHARED
 	}, {
-		.virtual	= AIPS1_BASE_ADDR_VIRT,
-		.pfn		= __phys_to_pfn(AIPS1_BASE_ADDR),
-		.length		= AIPS1_SIZE,
-		.type		= MT_DEVICE_NONSHARED
+		.virtual = MX3x_AIPS1_BASE_ADDR_VIRT,
+		.pfn = __phys_to_pfn(MX3x_AIPS1_BASE_ADDR),
+		.length = MX3x_AIPS1_SIZE,
+		.type = MT_DEVICE_NONSHARED
 	}, {
-		.virtual	= AIPS2_BASE_ADDR_VIRT,
-		.pfn		= __phys_to_pfn(AIPS2_BASE_ADDR),
-		.length		= AIPS2_SIZE,
-		.type		= MT_DEVICE_NONSHARED
+		.virtual = MX3x_AIPS2_BASE_ADDR_VIRT,
+		.pfn = __phys_to_pfn(MX3x_AIPS2_BASE_ADDR),
+		.length = MX3x_AIPS2_SIZE,
+		.type = MT_DEVICE_NONSHARED
 	}, {
-		.virtual = SPBA0_BASE_ADDR_VIRT,
-		.pfn = __phys_to_pfn(SPBA0_BASE_ADDR),
-		.length = SPBA0_SIZE,
+		.virtual = MX3x_SPBA0_BASE_ADDR_VIRT,
+		.pfn = __phys_to_pfn(MX3x_SPBA0_BASE_ADDR),
+		.length = MX3x_SPBA0_SIZE,
 		.type = MT_DEVICE_NONSHARED
 	},
 };
@@ -77,7 +77,7 @@ static struct map_desc mxc_io_desc[] __initdata = {
 void __init mx31_map_io(void)
 {
 	mxc_set_cpu_type(MXC_CPU_MX31);
-	mxc_arch_reset_init(IO_ADDRESS(WDOG_BASE_ADDR));
+	mxc_arch_reset_init(MX31_IO_ADDRESS(MX31_WDOG_BASE_ADDR));
 
 	iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc));
 }
@@ -86,8 +86,8 @@ void __init mx31_map_io(void)
 void __init mx35_map_io(void)
 {
 	mxc_set_cpu_type(MXC_CPU_MX35);
-	mxc_iomux_v3_init(IO_ADDRESS(IOMUXC_BASE_ADDR));
-	mxc_arch_reset_init(IO_ADDRESS(WDOG_BASE_ADDR));
+	mxc_iomux_v3_init(MX35_IO_ADDRESS(MX35_IOMUXC_BASE_ADDR));
+	mxc_arch_reset_init(MX35_IO_ADDRESS(MX3x_WDOG_BASE_ADDR));
 
 	iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc));
 }
@@ -97,7 +97,7 @@ int imx3x_register_gpios(void);
 
 void __init mx31_init_irq(void)
 {
-	mxc_init_irq(IO_ADDRESS(AVIC_BASE_ADDR));
+	mxc_init_irq(MX31_IO_ADDRESS(MX3x_AVIC_BASE_ADDR));
 	imx3x_register_gpios();
 }
 
@@ -129,7 +129,7 @@ static int mxc_init_l2x0(void)
 		pr_err("L2 cache: Cannot fix timing. Trying to continue without\n");
 	}
 
-	l2x0_base = ioremap(L2CC_BASE_ADDR, 4096);
+	l2x0_base = ioremap(MX3x_L2CC_BASE_ADDR, 4096);
 	if (IS_ERR(l2x0_base)) {
 		printk(KERN_ERR "remapping L2 cache area failed with %ld\n",
 				PTR_ERR(l2x0_base));
-- 
1.7.2.3

[PATCH 2/7] imx: refactor the io mapping macro

[Uwe Kleine-König]

This makes it more assembler friendly and allows it to be used in situation
that need an unsigned long and not a pointer.  Also the naming is
clearer.  IOMEM is introduced without IMX_ prefix as it is used this way
in more than one ARM subarch and it might become globally available
soon.

Signed-off-by: Uwe Kleine-K?nig <u.kleine-koenig@pengutronix.de>
---
 arch/arm/mach-mx3/mach-kzm_arm11_01.c     |    6 +++---
 arch/arm/plat-mxc/include/mach/hardware.h |   13 +++++++++----
 arch/arm/plat-mxc/include/mach/mx1.h      |    5 +++--
 arch/arm/plat-mxc/include/mach/mx21.h     |    9 +++++----
 arch/arm/plat-mxc/include/mach/mx25.h     |    9 +++++----
 arch/arm/plat-mxc/include/mach/mx27.h     |    9 +++++----
 arch/arm/plat-mxc/include/mach/mx31.h     |   13 +++++++------
 arch/arm/plat-mxc/include/mach/mx35.h     |   13 +++++++------
 arch/arm/plat-mxc/include/mach/mx51.h     |   13 +++++++------
 arch/arm/plat-mxc/include/mach/mxc91231.h |   19 ++++++++++---------
 10 files changed, 61 insertions(+), 48 deletions(-)

diff --git a/arch/arm/mach-mx3/mach-kzm_arm11_01.c b/arch/arm/mach-mx3/mach-kzm_arm11_01.c
index 5b23e41..423387d 100644
--- a/arch/arm/mach-mx3/mach-kzm_arm11_01.c
+++ b/arch/arm/mach-mx3/mach-kzm_arm11_01.c
@@ -41,9 +41,9 @@
 #include "devices-imx31.h"
 #include "devices.h"
 
-#define KZM_ARM11_IO_ADDRESS(x) (					\
-	IMX_IO_ADDRESS(x, MX31_CS4) ?:					\
-	IMX_IO_ADDRESS(x, MX31_CS5) ?:					\
+#define KZM_ARM11_IO_ADDRESS(x) (IOMEM(					\
+	IMX_IO_P2V_MODULE(x, MX31_CS4) ?:				\
+	IMX_IO_P2V_MODULE(x, MX31_CS5)) ?:				\
 	MX31_IO_ADDRESS(x))
 
 /*
diff --git a/arch/arm/plat-mxc/include/mach/hardware.h b/arch/arm/plat-mxc/include/mach/hardware.h
index ebadf4a..4bbe506 100644
--- a/arch/arm/plat-mxc/include/mach/hardware.h
+++ b/arch/arm/plat-mxc/include/mach/hardware.h
@@ -22,10 +22,15 @@
 
 #include <asm/sizes.h>
 
-#define IMX_IO_ADDRESS(addr, module)					\
-	((void __force __iomem *)					\
-	 (((unsigned long)((addr) - (module ## _BASE_ADDR)) < module ## _SIZE) ?\
-	 (addr) - (module ## _BASE_ADDR) + (module ## _BASE_ADDR_VIRT) : 0))
+#ifdef __ASSEMBLER__
+#define IOMEM(addr)	(addr)
+#else
+#define IOMEM(addr)	((void __force __iomem *)(addr))
+#endif
+
+#define IMX_IO_P2V_MODULE(addr, module)					\
+	(((addr) - module ## _BASE_ADDR) < module ## _SIZE ?		\
+	 (addr) - (module ## _BASE_ADDR) + (module ## _BASE_ADDR_VIRT) : 0)
 
 #ifdef CONFIG_ARCH_MX5
 #include <mach/mx51.h>
diff --git a/arch/arm/plat-mxc/include/mach/mx1.h b/arch/arm/plat-mxc/include/mach/mx1.h
index 641b246..6faa7d2 100644
--- a/arch/arm/plat-mxc/include/mach/mx1.h
+++ b/arch/arm/plat-mxc/include/mach/mx1.h
@@ -73,8 +73,9 @@
 #define MX1_CSI_BASE_ADDR		(0x24000 + MX1_IO_BASE_ADDR)
 
 /* macro to get at IO space when running virtually */
-#define MX1_IO_ADDRESS(x) (						\
-	IMX_IO_ADDRESS(x, MX1_IO))
+#define MX1_IO_P2V(x)	(						\
+	IMX_IO_P2V_MODULE(x, MX1_IO))
+#define MX1_IO_ADDRESS(x) 		IOMEM(MX1_IO_P2V(x))
 
 /* fixed interrput numbers */
 #define MX1_INT_SOFTINT		0
diff --git a/arch/arm/plat-mxc/include/mach/mx21.h b/arch/arm/plat-mxc/include/mach/mx21.h
index 8bc5972..aed0277 100644
--- a/arch/arm/plat-mxc/include/mach/mx21.h
+++ b/arch/arm/plat-mxc/include/mach/mx21.h
@@ -92,10 +92,11 @@
 
 #define MX21_IRAM_BASE_ADDR		0xffffe800	/* internal ram */
 
-#define MX21_IO_ADDRESS(x) (						\
-	IMX_IO_ADDRESS(x, MX21_AIPI) ?:					\
-	IMX_IO_ADDRESS(x, MX21_SAHB1) ?:				\
-	IMX_IO_ADDRESS(x, MX21_X_MEMC))
+#define MX21_IO_P2V(x)	(						\
+	IMX_IO_P2V_MODULE(x, MX21_AIPI) ?:				\
+	IMX_IO_P2V_MODULE(x, MX21_SAHB1) ?:				\
+	IMX_IO_P2V_MODULE(x, MX21_X_MEMC))
+#define MX21_IO_ADDRESS(x)		IOMEM(MX21_IO_P2V(x))
 
 /* fixed interrupt numbers */
 #define MX21_INT_CSPI3		6
diff --git a/arch/arm/plat-mxc/include/mach/mx25.h b/arch/arm/plat-mxc/include/mach/mx25.h
index cf46a45..6f9e1d4 100644
--- a/arch/arm/plat-mxc/include/mach/mx25.h
+++ b/arch/arm/plat-mxc/include/mach/mx25.h
@@ -28,10 +28,11 @@
 #define MX25_GPIO3_BASE_ADDR_VIRT	(MX25_AIPS2_BASE_ADDR_VIRT + 0xa4000)
 #define MX25_GPIO4_BASE_ADDR_VIRT	(MX25_AIPS2_BASE_ADDR_VIRT + 0x9c000)
 
-#define MX25_IO_ADDRESS(x) (					\
-	IMX_IO_ADDRESS(x, MX25_AIPS1) ?:			\
-	IMX_IO_ADDRESS(x, MX25_AIPS2) ?:			\
-	IMX_IO_ADDRESS(x, MX25_AVIC))
+#define MX25_IO_P2V(x)	(					\
+	IMX_IO_P2V_MODULE(x, MX25_AIPS1) ?:			\
+	IMX_IO_P2V_MODULE(x, MX25_AIPS2) ?:			\
+	IMX_IO_P2V_MODULE(x, MX25_AVIC))
+#define MX25_IO_ADDRESS(x)		IOMEM(MX25_IO_P2V(x))
 
 #define MX25_AIPS1_IO_ADDRESS(x) \
 	(((x) - MX25_AIPS1_BASE_ADDR) + MX25_AIPS1_BASE_ADDR_VIRT)
diff --git a/arch/arm/plat-mxc/include/mach/mx27.h b/arch/arm/plat-mxc/include/mach/mx27.h
index 2237ba2..c769cc8 100644
--- a/arch/arm/plat-mxc/include/mach/mx27.h
+++ b/arch/arm/plat-mxc/include/mach/mx27.h
@@ -123,10 +123,11 @@
 /* IRAM */
 #define MX27_IRAM_BASE_ADDR		0xffff4c00	/* internal ram */
 
-#define MX27_IO_ADDRESS(x) (						\
-	IMX_IO_ADDRESS(x, MX27_AIPI) ?:					\
-	IMX_IO_ADDRESS(x, MX27_SAHB1) ?:				\
-	IMX_IO_ADDRESS(x, MX27_X_MEMC))
+#define MX27_IO_P2V(x)	(						\
+	IMX_IO_P2V_MODULE(x, MX27_AIPI) ?:				\
+	IMX_IO_P2V_MODULE(x, MX27_SAHB1) ?:				\
+	IMX_IO_P2V_MODULE(x, MX27_X_MEMC))
+#define MX27_IO_ADDRESS(x)		IOMEM(MX27_IO_P2V(x))
 
 #ifndef __ASSEMBLER__
 static inline void mx27_setup_weimcs(size_t cs,
diff --git a/arch/arm/plat-mxc/include/mach/mx31.h b/arch/arm/plat-mxc/include/mach/mx31.h
index 61cfe82..eb4a28d 100644
--- a/arch/arm/plat-mxc/include/mach/mx31.h
+++ b/arch/arm/plat-mxc/include/mach/mx31.h
@@ -121,12 +121,13 @@
 
 #define MX31_PCMCIA_MEM_BASE_ADDR	0xbc000000
 
-#define MX31_IO_ADDRESS(x) (						\
-	IMX_IO_ADDRESS(x, MX31_AIPS1) ?:				\
-	IMX_IO_ADDRESS(x, MX31_AIPS2) ?:				\
-	IMX_IO_ADDRESS(x, MX31_AVIC) ?:					\
-	IMX_IO_ADDRESS(x, MX31_X_MEMC) ?:				\
-	IMX_IO_ADDRESS(x, MX31_SPBA0))
+#define MX31_IO_P2V(x)	(						\
+	IMX_IO_P2V_MODULE(x, MX31_AIPS1) ?:				\
+	IMX_IO_P2V_MODULE(x, MX31_AIPS2) ?:				\
+	IMX_IO_P2V_MODULE(x, MX31_AVIC) ?:				\
+	IMX_IO_P2V_MODULE(x, MX31_X_MEMC) ?:				\
+	IMX_IO_P2V_MODULE(x, MX31_SPBA0))
+#define MX31_IO_ADDRESS(x)		IOMEM(MX31_IO_P2V(x))
 
 #ifndef __ASSEMBLER__
 static inline void mx31_setup_weimcs(size_t cs,
diff --git a/arch/arm/plat-mxc/include/mach/mx35.h b/arch/arm/plat-mxc/include/mach/mx35.h
index 6267cff..ce1a24b 100644
--- a/arch/arm/plat-mxc/include/mach/mx35.h
+++ b/arch/arm/plat-mxc/include/mach/mx35.h
@@ -114,12 +114,13 @@
 #define MX35_NFC_BASE_ADDR		0xbb000000
 #define MX35_PCMCIA_MEM_BASE_ADDR	0xbc000000
 
-#define MX35_IO_ADDRESS(x) (						\
-	IMX_IO_ADDRESS(x, MX35_AIPS1) ?:				\
-	IMX_IO_ADDRESS(x, MX35_AIPS2) ?:				\
-	IMX_IO_ADDRESS(x, MX35_AVIC) ?:					\
-	IMX_IO_ADDRESS(x, MX35_X_MEMC) ?:				\
-	IMX_IO_ADDRESS(x, MX35_SPBA0))
+#define MX35_IO_P2V(x)	(						\
+	IMX_IO_P2V_MODULE(x, MX35_AIPS1) ?:				\
+	IMX_IO_P2V_MODULE(x, MX35_AIPS2) ?:				\
+	IMX_IO_P2V_MODULE(x, MX35_AVIC) ?:				\
+	IMX_IO_P2V_MODULE(x, MX35_X_MEMC) ?:				\
+	IMX_IO_P2V_MODULE(x, MX35_SPBA0))
+#define MX35_IO_ADDRESS(x)		IOMEM(MX35_IO_P2V(x))
 
 /*
  * Interrupt numbers
diff --git a/arch/arm/plat-mxc/include/mach/mx51.h b/arch/arm/plat-mxc/include/mach/mx51.h
index 2af7a10..e93cf5b 100644
--- a/arch/arm/plat-mxc/include/mach/mx51.h
+++ b/arch/arm/plat-mxc/include/mach/mx51.h
@@ -163,12 +163,13 @@
 #define MX51_GPU2D_BASE_ADDR		0xd0000000
 #define MX51_TZIC_BASE_ADDR		0xe0000000
 
-#define MX51_IO_ADDRESS(x) (						\
-	IMX_IO_ADDRESS(x, MX51_IRAM) ?:					\
-	IMX_IO_ADDRESS(x, MX51_DEBUG) ?:				\
-	IMX_IO_ADDRESS(x, MX51_SPBA0) ?:				\
-	IMX_IO_ADDRESS(x, MX51_AIPS1) ?:				\
-	IMX_IO_ADDRESS(x, MX51_AIPS2))
+#define MX51_IO_P2V(x)	(						\
+	IMX_IO_P2V_MODULE(x, MX51_IRAM) ?:				\
+	IMX_IO_P2V_MODULE(x, MX51_DEBUG) ?:				\
+	IMX_IO_P2V_MODULE(x, MX51_SPBA0) ?:				\
+	IMX_IO_P2V_MODULE(x, MX51_AIPS1) ?:				\
+	IMX_IO_P2V_MODULE(x, MX51_AIPS2))
+#define MX51_IO_ADDRESS(x)		IOMEM(MX51_IO_P2V(x))
 
 /* This is currently used in <mach/debug-macro.S>, but should go away */
 #define MX51_AIPS1_IO_ADDRESS(x)  \
diff --git a/arch/arm/plat-mxc/include/mach/mxc91231.h b/arch/arm/plat-mxc/include/mach/mxc91231.h
index 0ca3101..49e5e25 100644
--- a/arch/arm/plat-mxc/include/mach/mxc91231.h
+++ b/arch/arm/plat-mxc/include/mach/mxc91231.h
@@ -187,15 +187,16 @@
  * it returns 0.
  */
 
-#define MXC91231_IO_ADDRESS(x) (					\
-	IMX_IO_ADDRESS(x, MXC91231_L2CC) ?:				\
-	IMX_IO_ADDRESS(x, MXC91231_X_MEMC) ?:				\
-	IMX_IO_ADDRESS(x, MXC91231_ROMP) ?:				\
-	IMX_IO_ADDRESS(x, MXC91231_AVIC) ?:				\
-	IMX_IO_ADDRESS(x, MXC91231_AIPS1) ?:				\
-	IMX_IO_ADDRESS(x, MXC91231_SPBA0) ?:				\
-	IMX_IO_ADDRESS(x, MXC91231_SPBA1) ?:				\
-	IMX_IO_ADDRESS(x, MXC91231_AIPS2))
+#define MXC91231_IO_P2V(x)	(					\
+	IMX_IO_P2V_MODULE(x, MXC91231_L2CC) ?:				\
+	IMX_IO_P2V_MODULE(x, MXC91231_X_MEMC) ?:			\
+	IMX_IO_P2V_MODULE(x, MXC91231_ROMP) ?:				\
+	IMX_IO_P2V_MODULE(x, MXC91231_AVIC) ?:				\
+	IMX_IO_P2V_MODULE(x, MXC91231_AIPS1) ?:				\
+	IMX_IO_P2V_MODULE(x, MXC91231_SPBA0) ?:				\
+	IMX_IO_P2V_MODULE(x, MXC91231_SPBA1) ?:				\
+	IMX_IO_P2V_MODULE(x, MXC91231_AIPS2))
+#define MXC91231_IO_ADDRESS(x)		IOMEM(MXC91231_IO_P2V(x))
 
 /*
  * Interrupt numbers
-- 
1.7.2.3

[PATCH 3/7] imx: use MXxy_IO_P2V macros to setup static mappings

[Uwe Kleine-König]

This makes less code rely on the virtual constants.

To further simplify code and reduce the needed boilerplate when
defining the static mappings a new helper macro is defined in
mach/hardware.h.

Signed-off-by: Uwe Kleine-K?nig <u.kleine-koenig@pengutronix.de>
---
 arch/arm/mach-imx/mm-imx1.c               |    7 +---
 arch/arm/mach-imx/mm-imx21.c              |   21 ++----------
 arch/arm/mach-imx/mm-imx27.c              |   21 ++----------
 arch/arm/mach-mx25/mm.c                   |   25 +++----------
 arch/arm/mach-mx3/mm.c                    |   53 ++++++++++------------------
 arch/arm/mach-mx5/mm.c                    |   35 ++++---------------
 arch/arm/mach-mxc91231/mm.c               |   53 +++++-----------------------
 arch/arm/plat-mxc/include/mach/hardware.h |    7 ++++
 8 files changed, 56 insertions(+), 166 deletions(-)

diff --git a/arch/arm/mach-imx/mm-imx1.c b/arch/arm/mach-imx/mm-imx1.c
index 9be92b9..729ae09 100644
--- a/arch/arm/mach-imx/mm-imx1.c
+++ b/arch/arm/mach-imx/mm-imx1.c
@@ -25,12 +25,7 @@
 #include <mach/hardware.h>
 
 static struct map_desc imx_io_desc[] __initdata = {
-	{
-		.virtual = MX1_IO_BASE_ADDR_VIRT,
-		.pfn = __phys_to_pfn(MX1_IO_BASE_ADDR),
-		.length = MX1_IO_SIZE,
-		.type = MT_DEVICE
-	}
+	imx_map_entry(MX1, IO, MT_DEVICE),
 };
 
 void __init mx1_map_io(void)
diff --git a/arch/arm/mach-imx/mm-imx21.c b/arch/arm/mach-imx/mm-imx21.c
index 12faeeaa..e728af8 100644
--- a/arch/arm/mach-imx/mm-imx21.c
+++ b/arch/arm/mach-imx/mm-imx21.c
@@ -35,33 +35,18 @@ static struct map_desc imx21_io_desc[] __initdata = {
 	 * - ROM Patch
 	 * - and some reserved space
 	 */
-	{
-		.virtual = MX21_AIPI_BASE_ADDR_VIRT,
-		.pfn = __phys_to_pfn(MX21_AIPI_BASE_ADDR),
-		.length = MX21_AIPI_SIZE,
-		.type = MT_DEVICE
-	},
+	imx_map_entry(MX21, AIPI, MT_DEVICE),
 	/*
 	 * this fixed mapping covers:
 	 * - CSI
 	 * - ATA
 	 */
-	{
-		.virtual = MX21_SAHB1_BASE_ADDR_VIRT,
-		.pfn = __phys_to_pfn(MX21_SAHB1_BASE_ADDR),
-		.length = MX21_SAHB1_SIZE,
-		.type = MT_DEVICE
-	},
+	imx_map_entry(MX21, SAHB1, MT_DEVICE),
 	/*
 	 * this fixed mapping covers:
 	 * - EMI
 	 */
-	{
-		.virtual = MX21_X_MEMC_BASE_ADDR_VIRT,
-		.pfn = __phys_to_pfn(MX21_X_MEMC_BASE_ADDR),
-		.length = MX21_X_MEMC_SIZE,
-		.type = MT_DEVICE
-	},
+	imx_map_entry(MX21, X_MEMC, MT_DEVICE),
 };
 
 /*
diff --git a/arch/arm/mach-imx/mm-imx27.c b/arch/arm/mach-imx/mm-imx27.c
index a246229..374e48b 100644
--- a/arch/arm/mach-imx/mm-imx27.c
+++ b/arch/arm/mach-imx/mm-imx27.c
@@ -35,33 +35,18 @@ static struct map_desc imx27_io_desc[] __initdata = {
 	 * - ROM Patch
 	 * - and some reserved space
 	 */
-	{
-		.virtual = MX27_AIPI_BASE_ADDR_VIRT,
-		.pfn = __phys_to_pfn(MX27_AIPI_BASE_ADDR),
-		.length = MX27_AIPI_SIZE,
-		.type = MT_DEVICE
-	},
+	imx_map_entry(MX27, AIPI, MT_DEVICE),
 	/*
 	 * this fixed mapping covers:
 	 * - CSI
 	 * - ATA
 	 */
-	{
-		.virtual = MX27_SAHB1_BASE_ADDR_VIRT,
-		.pfn = __phys_to_pfn(MX27_SAHB1_BASE_ADDR),
-		.length = MX27_SAHB1_SIZE,
-		.type = MT_DEVICE
-	},
+	imx_map_entry(MX27, SAHB1, MT_DEVICE),
 	/*
 	 * this fixed mapping covers:
 	 * - EMI
 	 */
-	{
-		.virtual = MX27_X_MEMC_BASE_ADDR_VIRT,
-		.pfn = __phys_to_pfn(MX27_X_MEMC_BASE_ADDR),
-		.length = MX27_X_MEMC_SIZE,
-		.type = MT_DEVICE
-	},
+	imx_map_entry(MX27, X_MEMC, MT_DEVICE),
 };
 
 /*
diff --git a/arch/arm/mach-mx25/mm.c b/arch/arm/mach-mx25/mm.c
index bb67711..11cd335 100644
--- a/arch/arm/mach-mx25/mm.c
+++ b/arch/arm/mach-mx25/mm.c
@@ -30,25 +30,12 @@
 
 /*
  * This table defines static virtual address mappings for I/O regions.
- * These are the mappings common across all MX3 boards.
+ * These are the mappings common across all MX25 boards.
  */
-static struct map_desc mxc_io_desc[] __initdata = {
-	{
-		.virtual	= MX25_AVIC_BASE_ADDR_VIRT,
-		.pfn		= __phys_to_pfn(MX25_AVIC_BASE_ADDR),
-		.length		= MX25_AVIC_SIZE,
-		.type		= MT_DEVICE_NONSHARED
-	}, {
-		.virtual	= MX25_AIPS1_BASE_ADDR_VIRT,
-		.pfn		= __phys_to_pfn(MX25_AIPS1_BASE_ADDR),
-		.length		= MX25_AIPS1_SIZE,
-		.type		= MT_DEVICE_NONSHARED
-	}, {
-		.virtual	= MX25_AIPS2_BASE_ADDR_VIRT,
-		.pfn		= __phys_to_pfn(MX25_AIPS2_BASE_ADDR),
-		.length		= MX25_AIPS2_SIZE,
-		.type		= MT_DEVICE_NONSHARED
-	},
+static struct map_desc mx25_io_desc[] __initdata = {
+	imx_map_entry(MX25, AVIC, MT_DEVICE_NONSHARED),
+	imx_map_entry(MX25, AIPS1, MT_DEVICE_NONSHARED),
+	imx_map_entry(MX25, AIPS2, MT_DEVICE_NONSHARED),
 };
 
 /*
@@ -62,7 +49,7 @@ void __init mx25_map_io(void)
 	mxc_iomux_v3_init(MX25_IO_ADDRESS(MX25_IOMUXC_BASE_ADDR));
 	mxc_arch_reset_init(MX25_IO_ADDRESS(MX25_WDOG_BASE_ADDR));
 
-	iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc));
+	iotable_init(mx25_io_desc, ARRAY_SIZE(mx25_io_desc));
 }
 
 int imx25_register_gpios(void);
diff --git a/arch/arm/mach-mx3/mm.c b/arch/arm/mach-mx3/mm.c
index 809ee40..193c18c 100644
--- a/arch/arm/mach-mx3/mm.c
+++ b/arch/arm/mach-mx3/mm.c
@@ -36,40 +36,16 @@
  * @ingroup Memory
  */
 
-/*!
- * This table defines static virtual address mappings for I/O regions.
- * These are the mappings common across all MX3 boards.
- */
-static struct map_desc mxc_io_desc[] __initdata = {
-	{
-		.virtual = MX3x_X_MEMC_BASE_ADDR_VIRT,
-		.pfn = __phys_to_pfn(MX3x_X_MEMC_BASE_ADDR),
-		.length = MX3x_X_MEMC_SIZE,
-		.type = MT_DEVICE
-	}, {
-		.virtual = MX3x_AVIC_BASE_ADDR_VIRT,
-		.pfn = __phys_to_pfn(MX3x_AVIC_BASE_ADDR),
-		.length = MX3x_AVIC_SIZE,
-		.type = MT_DEVICE_NONSHARED
-	}, {
-		.virtual = MX3x_AIPS1_BASE_ADDR_VIRT,
-		.pfn = __phys_to_pfn(MX3x_AIPS1_BASE_ADDR),
-		.length = MX3x_AIPS1_SIZE,
-		.type = MT_DEVICE_NONSHARED
-	}, {
-		.virtual = MX3x_AIPS2_BASE_ADDR_VIRT,
-		.pfn = __phys_to_pfn(MX3x_AIPS2_BASE_ADDR),
-		.length = MX3x_AIPS2_SIZE,
-		.type = MT_DEVICE_NONSHARED
-	}, {
-		.virtual = MX3x_SPBA0_BASE_ADDR_VIRT,
-		.pfn = __phys_to_pfn(MX3x_SPBA0_BASE_ADDR),
-		.length = MX3x_SPBA0_SIZE,
-		.type = MT_DEVICE_NONSHARED
-	},
+#ifdef CONFIG_ARCH_MX31
+static struct map_desc mx31_io_desc[] __initdata = {
+	imx_map_entry(MX31, X_MEMC, MT_DEVICE),
+	imx_map_entry(MX31, AVIC, MT_DEVICE_NONSHARED),
+	imx_map_entry(MX31, AIPS1, MT_DEVICE_NONSHARED),
+	imx_map_entry(MX31, AIPS2, MT_DEVICE_NONSHARED),
+	imx_map_entry(MX31, SPBA0, MT_DEVICE_NONSHARED),
 };
 
-/*!
+/*
  * This function initializes the memory map. It is called during the
  * system startup to create static physical to virtual memory mappings
  * for the IO modules.
@@ -79,17 +55,26 @@ void __init mx31_map_io(void)
 	mxc_set_cpu_type(MXC_CPU_MX31);
 	mxc_arch_reset_init(MX31_IO_ADDRESS(MX31_WDOG_BASE_ADDR));
 
-	iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc));
+	iotable_init(mx31_io_desc, ARRAY_SIZE(mx31_io_desc));
 }
+#endif
 
 #ifdef CONFIG_ARCH_MX35
+static struct map_desc mx35_io_desc[] __initdata = {
+	imx_map_entry(MX35, X_MEMC, MT_DEVICE),
+	imx_map_entry(MX35, AVIC, MT_DEVICE_NONSHARED),
+	imx_map_entry(MX35, AIPS1, MT_DEVICE_NONSHARED),
+	imx_map_entry(MX35, AIPS2, MT_DEVICE_NONSHARED),
+	imx_map_entry(MX35, SPBA0, MT_DEVICE_NONSHARED),
+};
+
 void __init mx35_map_io(void)
 {
 	mxc_set_cpu_type(MXC_CPU_MX35);
 	mxc_iomux_v3_init(MX35_IO_ADDRESS(MX35_IOMUXC_BASE_ADDR));
 	mxc_arch_reset_init(MX35_IO_ADDRESS(MX3x_WDOG_BASE_ADDR));
 
-	iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc));
+	iotable_init(mx35_io_desc, ARRAY_SIZE(mx35_io_desc));
 }
 #endif
 
diff --git a/arch/arm/mach-mx5/mm.c b/arch/arm/mach-mx5/mm.c
index bc3f30d..01dff26 100644
--- a/arch/arm/mach-mx5/mm.c
+++ b/arch/arm/mach-mx5/mm.c
@@ -23,33 +23,12 @@
 /*
  * Define the MX51 memory map.
  */
-static struct map_desc mxc_io_desc[] __initdata = {
-	{
-		.virtual = MX51_IRAM_BASE_ADDR_VIRT,
-		.pfn = __phys_to_pfn(MX51_IRAM_BASE_ADDR),
-		.length = MX51_IRAM_SIZE,
-		.type = MT_DEVICE
-	}, {
-		.virtual = MX51_DEBUG_BASE_ADDR_VIRT,
-		.pfn = __phys_to_pfn(MX51_DEBUG_BASE_ADDR),
-		.length = MX51_DEBUG_SIZE,
-		.type = MT_DEVICE
-	}, {
-		.virtual = MX51_AIPS1_BASE_ADDR_VIRT,
-		.pfn = __phys_to_pfn(MX51_AIPS1_BASE_ADDR),
-		.length = MX51_AIPS1_SIZE,
-		.type = MT_DEVICE
-	}, {
-		.virtual = MX51_SPBA0_BASE_ADDR_VIRT,
-		.pfn = __phys_to_pfn(MX51_SPBA0_BASE_ADDR),
-		.length = MX51_SPBA0_SIZE,
-		.type = MT_DEVICE
-	}, {
-		.virtual = MX51_AIPS2_BASE_ADDR_VIRT,
-		.pfn = __phys_to_pfn(MX51_AIPS2_BASE_ADDR),
-		.length = MX51_AIPS2_SIZE,
-		.type = MT_DEVICE
-	},
+static struct map_desc mx51_io_desc[] __initdata = {
+	imx_map_entry(MX51, IRAM, MT_DEVICE),
+	imx_map_entry(MX51, DEBUG, MT_DEVICE),
+	imx_map_entry(MX51, AIPS1, MT_DEVICE),
+	imx_map_entry(MX51, SPBA0, MT_DEVICE),
+	imx_map_entry(MX51, AIPS2, MT_DEVICE),
 };
 
 /*
@@ -62,7 +41,7 @@ void __init mx51_map_io(void)
 	mxc_set_cpu_type(MXC_CPU_MX51);
 	mxc_iomux_v3_init(MX51_IO_ADDRESS(MX51_IOMUXC_BASE_ADDR));
 	mxc_arch_reset_init(MX51_IO_ADDRESS(MX51_WDOG_BASE_ADDR));
-	iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc));
+	iotable_init(mx51_io_desc, ARRAY_SIZE(mx51_io_desc));
 }
 
 int imx51_register_gpios(void);
diff --git a/arch/arm/mach-mxc91231/mm.c b/arch/arm/mach-mxc91231/mm.c
index aeccfd7..7652c30 100644
--- a/arch/arm/mach-mxc91231/mm.c
+++ b/arch/arm/mach-mxc91231/mm.c
@@ -27,48 +27,15 @@
 /*
  * This structure defines the MXC memory map.
  */
-static struct map_desc mxc_io_desc[] __initdata = {
-	{
-		.virtual	= MXC91231_L2CC_BASE_ADDR_VIRT,
-		.pfn		= __phys_to_pfn(MXC91231_L2CC_BASE_ADDR),
-		.length		= MXC91231_L2CC_SIZE,
-		.type		= MT_DEVICE,
-	}, {
-		.virtual	= MXC91231_X_MEMC_BASE_ADDR_VIRT,
-		.pfn		= __phys_to_pfn(MXC91231_X_MEMC_BASE_ADDR),
-		.length		= MXC91231_X_MEMC_SIZE,
-		.type		= MT_DEVICE,
-	}, {
-		.virtual	= MXC91231_ROMP_BASE_ADDR_VIRT,
-		.pfn		= __phys_to_pfn(MXC91231_ROMP_BASE_ADDR),
-		.length		= MXC91231_ROMP_SIZE,
-		.type		= MT_DEVICE,
-	}, {
-		.virtual	= MXC91231_AVIC_BASE_ADDR_VIRT,
-		.pfn		= __phys_to_pfn(MXC91231_AVIC_BASE_ADDR),
-		.length		= MXC91231_AVIC_SIZE,
-		.type		= MT_DEVICE,
-	}, {
-		.virtual	= MXC91231_AIPS1_BASE_ADDR_VIRT,
-		.pfn		= __phys_to_pfn(MXC91231_AIPS1_BASE_ADDR),
-		.length		= MXC91231_AIPS1_SIZE,
-		.type		= MT_DEVICE,
-	}, {
-		.virtual	= MXC91231_SPBA0_BASE_ADDR_VIRT,
-		.pfn		= __phys_to_pfn(MXC91231_SPBA0_BASE_ADDR),
-		.length		= MXC91231_SPBA0_SIZE,
-		.type		= MT_DEVICE,
-	}, {
-		.virtual	= MXC91231_SPBA1_BASE_ADDR_VIRT,
-		.pfn		= __phys_to_pfn(MXC91231_SPBA1_BASE_ADDR),
-		.length		= MXC91231_SPBA1_SIZE,
-		.type		= MT_DEVICE,
-	}, {
-		.virtual	= MXC91231_AIPS2_BASE_ADDR_VIRT,
-		.pfn		= __phys_to_pfn(MXC91231_AIPS2_BASE_ADDR),
-		.length		= MXC91231_AIPS2_SIZE,
-		.type		= MT_DEVICE,
-	},
+static struct map_desc mxc91231_io_desc[] __initdata = {
+	imx_map_entry(MXC91231, L2CC, MT_DEVICE),
+	imx_map_entry(MXC91231, X_MEMC, MT_DEVICE),
+	imx_map_entry(MXC91231, ROMP, MT_DEVICE),
+	imx_map_entry(MXC91231, AVIC, MT_DEVICE),
+	imx_map_entry(MXC91231, AIPS1, MT_DEVICE),
+	imx_map_entry(MXC91231, SPBA0, MT_DEVICE),
+	imx_map_entry(MXC91231, SPBA1, MT_DEVICE),
+	imx_map_entry(MXC91231, AIPS2, MT_DEVICE),
 };
 
 /*
@@ -80,7 +47,7 @@ void __init mxc91231_map_io(void)
 {
 	mxc_set_cpu_type(MXC_CPU_MXC91231);
 
-	iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc));
+	iotable_init(mxc91231_io_desc, ARRAY_SIZE(mxc91231_io_desc));
 }
 
 int mxc91231_register_gpios(void);
diff --git a/arch/arm/plat-mxc/include/mach/hardware.h b/arch/arm/plat-mxc/include/mach/hardware.h
index 4bbe506..409cec6 100644
--- a/arch/arm/plat-mxc/include/mach/hardware.h
+++ b/arch/arm/plat-mxc/include/mach/hardware.h
@@ -66,4 +66,11 @@
 
 #include <mach/mxc.h>
 
+#define imx_map_entry(soc, name, _type)	{				\
+	.virtual = soc ## _IO_P2V(soc ## _ ## name ## _BASE_ADDR),	\
+	.pfn = __phys_to_pfn(soc ## _ ## name ## _BASE_ADDR),		\
+	.length = soc ## _ ## name ## _SIZE,				\
+	.type = _type,							\
+}
+
 #endif /* __ASM_ARCH_MXC_HARDWARE_H__ */
-- 
1.7.2.3

[PATCH 3/7] imx: use MXxy_IO_P2V macros to setup static mappings

[Nguyen Dinh-R00091]

Hi Uwe,

>-----Original Message-----
From: linux-arm-kernel-bounces@lists.infradead.org [mailto:linux-arm-kernel-
>bounces at lists.infradead.org] On Behalf Of Uwe Kleine-K?nig
>Sent: Tuesday, October 26, 2010 3:50 AM
>To: linux-arm-kernel at lists.infradead.org
>Cc: kernel at pengutronix.de
>Subject: [PATCH 3/7] imx: use MXxy_IO_P2V macros to setup static mappings
>
>This makes less code rely on the virtual constants.
>
>To further simplify code and reduce the needed boilerplate when
>defining the static mappings a new helper macro is defined in
>mach/hardware.h.
>
>Signed-off-by: Uwe Kleine-K?nig <u.kleine-koenig@pengutronix.de>
>---
> arch/arm/mach-imx/mm-imx1.c               |    7 +---
> arch/arm/mach-imx/mm-imx21.c              |   21 ++----------
> arch/arm/mach-imx/mm-imx27.c              |   21 ++----------
> arch/arm/mach-mx25/mm.c                   |   25 +++----------
> arch/arm/mach-mx3/mm.c                    |   53 ++++++++++------------------
> arch/arm/mach-mx5/mm.c                    |   35 ++++---------------
> arch/arm/mach-mxc91231/mm.c               |   53 +++++-----------------------
> arch/arm/plat-mxc/include/mach/hardware.h |    7 ++++
> 8 files changed, 56 insertions(+), 166 deletions(-)
>
>diff --git a/arch/arm/mach-imx/mm-imx1.c b/arch/arm/mach-imx/mm-imx1.c
>index 9be92b9..729ae09 100644
>--- a/arch/arm/mach-imx/mm-imx1.c
>+++ b/arch/arm/mach-imx/mm-imx1.c
>@@ -25,12 +25,7 @@
> #include <mach/hardware.h>
>
> static struct map_desc imx_io_desc[] __initdata = {
>-	{
>-		.virtual = MX1_IO_BASE_ADDR_VIRT,
>-		.pfn = __phys_to_pfn(MX1_IO_BASE_ADDR),
>-		.length = MX1_IO_SIZE,
>-		.type = MT_DEVICE
>-	}
>+	imx_map_entry(MX1, IO, MT_DEVICE),
> };
>
> void __init mx1_map_io(void)
>diff --git a/arch/arm/mach-imx/mm-imx21.c b/arch/arm/mach-imx/mm-imx21.c
>index 12faeeaa..e728af8 100644
>--- a/arch/arm/mach-imx/mm-imx21.c
>+++ b/arch/arm/mach-imx/mm-imx21.c
>@@ -35,33 +35,18 @@ static struct map_desc imx21_io_desc[] __initdata = {
> 	 * - ROM Patch
> 	 * - and some reserved space
> 	 */
>-	{
>-		.virtual = MX21_AIPI_BASE_ADDR_VIRT,
>-		.pfn = __phys_to_pfn(MX21_AIPI_BASE_ADDR),
>-		.length = MX21_AIPI_SIZE,
>-		.type = MT_DEVICE
>-	},
>+	imx_map_entry(MX21, AIPI, MT_DEVICE),
> 	/*
> 	 * this fixed mapping covers:
> 	 * - CSI
> 	 * - ATA
> 	 */
>-	{
>-		.virtual = MX21_SAHB1_BASE_ADDR_VIRT,
>-		.pfn = __phys_to_pfn(MX21_SAHB1_BASE_ADDR),
>-		.length = MX21_SAHB1_SIZE,
>-		.type = MT_DEVICE
>-	},
>+	imx_map_entry(MX21, SAHB1, MT_DEVICE),
> 	/*
> 	 * this fixed mapping covers:
> 	 * - EMI
> 	 */
>-	{
>-		.virtual = MX21_X_MEMC_BASE_ADDR_VIRT,
>-		.pfn = __phys_to_pfn(MX21_X_MEMC_BASE_ADDR),
>-		.length = MX21_X_MEMC_SIZE,
>-		.type = MT_DEVICE
>-	},
>+	imx_map_entry(MX21, X_MEMC, MT_DEVICE),
> };
>
> /*
>diff --git a/arch/arm/mach-imx/mm-imx27.c b/arch/arm/mach-imx/mm-imx27.c
>index a246229..374e48b 100644
>--- a/arch/arm/mach-imx/mm-imx27.c
>+++ b/arch/arm/mach-imx/mm-imx27.c
>@@ -35,33 +35,18 @@ static struct map_desc imx27_io_desc[] __initdata = {
> 	 * - ROM Patch
> 	 * - and some reserved space
> 	 */
>-	{
>-		.virtual = MX27_AIPI_BASE_ADDR_VIRT,
>-		.pfn = __phys_to_pfn(MX27_AIPI_BASE_ADDR),
>-		.length = MX27_AIPI_SIZE,
>-		.type = MT_DEVICE
>-	},
>+	imx_map_entry(MX27, AIPI, MT_DEVICE),
> 	/*
> 	 * this fixed mapping covers:
> 	 * - CSI
> 	 * - ATA
> 	 */
>-	{
>-		.virtual = MX27_SAHB1_BASE_ADDR_VIRT,
>-		.pfn = __phys_to_pfn(MX27_SAHB1_BASE_ADDR),
>-		.length = MX27_SAHB1_SIZE,
>-		.type = MT_DEVICE
>-	},
>+	imx_map_entry(MX27, SAHB1, MT_DEVICE),
> 	/*
> 	 * this fixed mapping covers:
> 	 * - EMI
> 	 */
>-	{
>-		.virtual = MX27_X_MEMC_BASE_ADDR_VIRT,
>-		.pfn = __phys_to_pfn(MX27_X_MEMC_BASE_ADDR),
>-		.length = MX27_X_MEMC_SIZE,
>-		.type = MT_DEVICE
>-	},
>+	imx_map_entry(MX27, X_MEMC, MT_DEVICE),
> };
>
> /*
>diff --git a/arch/arm/mach-mx25/mm.c b/arch/arm/mach-mx25/mm.c
>index bb67711..11cd335 100644
>--- a/arch/arm/mach-mx25/mm.c
>+++ b/arch/arm/mach-mx25/mm.c
>@@ -30,25 +30,12 @@
>
> /*
>  * This table defines static virtual address mappings for I/O regions.
>- * These are the mappings common across all MX3 boards.
>+ * These are the mappings common across all MX25 boards.
>  */
>-static struct map_desc mxc_io_desc[] __initdata = {
>-	{
>-		.virtual	= MX25_AVIC_BASE_ADDR_VIRT,
>-		.pfn		= __phys_to_pfn(MX25_AVIC_BASE_ADDR),
>-		.length		= MX25_AVIC_SIZE,
>-		.type		= MT_DEVICE_NONSHARED
>-	}, {
>-		.virtual	= MX25_AIPS1_BASE_ADDR_VIRT,
>-		.pfn		= __phys_to_pfn(MX25_AIPS1_BASE_ADDR),
>-		.length		= MX25_AIPS1_SIZE,
>-		.type		= MT_DEVICE_NONSHARED
>-	}, {
>-		.virtual	= MX25_AIPS2_BASE_ADDR_VIRT,
>-		.pfn		= __phys_to_pfn(MX25_AIPS2_BASE_ADDR),
>-		.length		= MX25_AIPS2_SIZE,
>-		.type		= MT_DEVICE_NONSHARED
>-	},
>+static struct map_desc mx25_io_desc[] __initdata = {
>+	imx_map_entry(MX25, AVIC, MT_DEVICE_NONSHARED),
>+	imx_map_entry(MX25, AIPS1, MT_DEVICE_NONSHARED),
>+	imx_map_entry(MX25, AIPS2, MT_DEVICE_NONSHARED),
> };
>
> /*
>@@ -62,7 +49,7 @@ void __init mx25_map_io(void)
> 	mxc_iomux_v3_init(MX25_IO_ADDRESS(MX25_IOMUXC_BASE_ADDR));
> 	mxc_arch_reset_init(MX25_IO_ADDRESS(MX25_WDOG_BASE_ADDR));
>
>-	iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc));
>+	iotable_init(mx25_io_desc, ARRAY_SIZE(mx25_io_desc));
> }
>
> int imx25_register_gpios(void);
>diff --git a/arch/arm/mach-mx3/mm.c b/arch/arm/mach-mx3/mm.c
>index 809ee40..193c18c 100644
>--- a/arch/arm/mach-mx3/mm.c
>+++ b/arch/arm/mach-mx3/mm.c
>@@ -36,40 +36,16 @@
>  * @ingroup Memory
>  */
>
>-/*!
>- * This table defines static virtual address mappings for I/O regions.
>- * These are the mappings common across all MX3 boards.
>- */
>-static struct map_desc mxc_io_desc[] __initdata = {
>-	{
>-		.virtual = MX3x_X_MEMC_BASE_ADDR_VIRT,
>-		.pfn = __phys_to_pfn(MX3x_X_MEMC_BASE_ADDR),
>-		.length = MX3x_X_MEMC_SIZE,
>-		.type = MT_DEVICE
>-	}, {
>-		.virtual = MX3x_AVIC_BASE_ADDR_VIRT,
>-		.pfn = __phys_to_pfn(MX3x_AVIC_BASE_ADDR),
>-		.length = MX3x_AVIC_SIZE,
>-		.type = MT_DEVICE_NONSHARED
>-	}, {
>-		.virtual = MX3x_AIPS1_BASE_ADDR_VIRT,
>-		.pfn = __phys_to_pfn(MX3x_AIPS1_BASE_ADDR),
>-		.length = MX3x_AIPS1_SIZE,
>-		.type = MT_DEVICE_NONSHARED
>-	}, {
>-		.virtual = MX3x_AIPS2_BASE_ADDR_VIRT,
>-		.pfn = __phys_to_pfn(MX3x_AIPS2_BASE_ADDR),
>-		.length = MX3x_AIPS2_SIZE,
>-		.type = MT_DEVICE_NONSHARED
>-	}, {
>-		.virtual = MX3x_SPBA0_BASE_ADDR_VIRT,
>-		.pfn = __phys_to_pfn(MX3x_SPBA0_BASE_ADDR),
>-		.length = MX3x_SPBA0_SIZE,
>-		.type = MT_DEVICE_NONSHARED
>-	},
>+#ifdef CONFIG_ARCH_MX31
>+static struct map_desc mx31_io_desc[] __initdata = {
>+	imx_map_entry(MX31, X_MEMC, MT_DEVICE),
>+	imx_map_entry(MX31, AVIC, MT_DEVICE_NONSHARED),
>+	imx_map_entry(MX31, AIPS1, MT_DEVICE_NONSHARED),
>+	imx_map_entry(MX31, AIPS2, MT_DEVICE_NONSHARED),
>+	imx_map_entry(MX31, SPBA0, MT_DEVICE_NONSHARED),
> };
>
>-/*!
>+/*
>  * This function initializes the memory map. It is called during the
>  * system startup to create static physical to virtual memory mappings
>  * for the IO modules.
>@@ -79,17 +55,26 @@ void __init mx31_map_io(void)
> 	mxc_set_cpu_type(MXC_CPU_MX31);
> 	mxc_arch_reset_init(MX31_IO_ADDRESS(MX31_WDOG_BASE_ADDR));
>
>-	iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc));
>+	iotable_init(mx31_io_desc, ARRAY_SIZE(mx31_io_desc));
> }
>+#endif
>
> #ifdef CONFIG_ARCH_MX35
>+static struct map_desc mx35_io_desc[] __initdata = {
>+	imx_map_entry(MX35, X_MEMC, MT_DEVICE),
>+	imx_map_entry(MX35, AVIC, MT_DEVICE_NONSHARED),
>+	imx_map_entry(MX35, AIPS1, MT_DEVICE_NONSHARED),
>+	imx_map_entry(MX35, AIPS2, MT_DEVICE_NONSHARED),
>+	imx_map_entry(MX35, SPBA0, MT_DEVICE_NONSHARED),
>+};
>+
> void __init mx35_map_io(void)
> {
> 	mxc_set_cpu_type(MXC_CPU_MX35);
> 	mxc_iomux_v3_init(MX35_IO_ADDRESS(MX35_IOMUXC_BASE_ADDR));
> 	mxc_arch_reset_init(MX35_IO_ADDRESS(MX3x_WDOG_BASE_ADDR));
>
>-	iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc));
>+	iotable_init(mx35_io_desc, ARRAY_SIZE(mx35_io_desc));
> }
> #endif
>
>diff --git a/arch/arm/mach-mx5/mm.c b/arch/arm/mach-mx5/mm.c
>index bc3f30d..01dff26 100644
>--- a/arch/arm/mach-mx5/mm.c
>+++ b/arch/arm/mach-mx5/mm.c
>@@ -23,33 +23,12 @@
> /*
>  * Define the MX51 memory map.
>  */
>-static struct map_desc mxc_io_desc[] __initdata = {
>-	{
>-		.virtual = MX51_IRAM_BASE_ADDR_VIRT,
>-		.pfn = __phys_to_pfn(MX51_IRAM_BASE_ADDR),
>-		.length = MX51_IRAM_SIZE,
>-		.type = MT_DEVICE
>-	}, {
>-		.virtual = MX51_DEBUG_BASE_ADDR_VIRT,
>-		.pfn = __phys_to_pfn(MX51_DEBUG_BASE_ADDR),
>-		.length = MX51_DEBUG_SIZE,
>-		.type = MT_DEVICE
>-	}, {
>-		.virtual = MX51_AIPS1_BASE_ADDR_VIRT,
>-		.pfn = __phys_to_pfn(MX51_AIPS1_BASE_ADDR),
>-		.length = MX51_AIPS1_SIZE,
>-		.type = MT_DEVICE
>-	}, {
>-		.virtual = MX51_SPBA0_BASE_ADDR_VIRT,
>-		.pfn = __phys_to_pfn(MX51_SPBA0_BASE_ADDR),
>-		.length = MX51_SPBA0_SIZE,
>-		.type = MT_DEVICE
>-	}, {
>-		.virtual = MX51_AIPS2_BASE_ADDR_VIRT,
>-		.pfn = __phys_to_pfn(MX51_AIPS2_BASE_ADDR),
>-		.length = MX51_AIPS2_SIZE,
>-		.type = MT_DEVICE
>-	},
>+static struct map_desc mx51_io_desc[] __initdata = {
>+	imx_map_entry(MX51, IRAM, MT_DEVICE),

Do you still see a need a statically map IRAM? I added the iram allocator functions so that users of IRAM can dynamically allocate it.

>+	imx_map_entry(MX51, DEBUG, MT_DEVICE),
>+	imx_map_entry(MX51, AIPS1, MT_DEVICE),
>+	imx_map_entry(MX51, SPBA0, MT_DEVICE),
>+	imx_map_entry(MX51, AIPS2, MT_DEVICE),
> };
>
> /*
>@@ -62,7 +41,7 @@ void __init mx51_map_io(void)
> 	mxc_set_cpu_type(MXC_CPU_MX51);
> 	mxc_iomux_v3_init(MX51_IO_ADDRESS(MX51_IOMUXC_BASE_ADDR));
> 	mxc_arch_reset_init(MX51_IO_ADDRESS(MX51_WDOG_BASE_ADDR));
>-	iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc));
>+	iotable_init(mx51_io_desc, ARRAY_SIZE(mx51_io_desc));
> }
>
> int imx51_register_gpios(void);
>diff --git a/arch/arm/mach-mxc91231/mm.c b/arch/arm/mach-mxc91231/mm.c
>index aeccfd7..7652c30 100644
>--- a/arch/arm/mach-mxc91231/mm.c
>+++ b/arch/arm/mach-mxc91231/mm.c
>@@ -27,48 +27,15 @@
> /*
>  * This structure defines the MXC memory map.
>  */
>-static struct map_desc mxc_io_desc[] __initdata = {
>-	{
>-		.virtual	= MXC91231_L2CC_BASE_ADDR_VIRT,
>-		.pfn		= __phys_to_pfn(MXC91231_L2CC_BASE_ADDR),
>-		.length		= MXC91231_L2CC_SIZE,
>-		.type		= MT_DEVICE,
>-	}, {
>-		.virtual	= MXC91231_X_MEMC_BASE_ADDR_VIRT,
>-		.pfn		= __phys_to_pfn(MXC91231_X_MEMC_BASE_ADDR),
>-		.length		= MXC91231_X_MEMC_SIZE,
>-		.type		= MT_DEVICE,
>-	}, {
>-		.virtual	= MXC91231_ROMP_BASE_ADDR_VIRT,
>-		.pfn		= __phys_to_pfn(MXC91231_ROMP_BASE_ADDR),
>-		.length		= MXC91231_ROMP_SIZE,
>-		.type		= MT_DEVICE,
>-	}, {
>-		.virtual	= MXC91231_AVIC_BASE_ADDR_VIRT,
>-		.pfn		= __phys_to_pfn(MXC91231_AVIC_BASE_ADDR),
>-		.length		= MXC91231_AVIC_SIZE,
>-		.type		= MT_DEVICE,
>-	}, {
>-		.virtual	= MXC91231_AIPS1_BASE_ADDR_VIRT,
>-		.pfn		= __phys_to_pfn(MXC91231_AIPS1_BASE_ADDR),
>-		.length		= MXC91231_AIPS1_SIZE,
>-		.type		= MT_DEVICE,
>-	}, {
>-		.virtual	= MXC91231_SPBA0_BASE_ADDR_VIRT,
>-		.pfn		= __phys_to_pfn(MXC91231_SPBA0_BASE_ADDR),
>-		.length		= MXC91231_SPBA0_SIZE,
>-		.type		= MT_DEVICE,
>-	}, {
>-		.virtual	= MXC91231_SPBA1_BASE_ADDR_VIRT,
>-		.pfn		= __phys_to_pfn(MXC91231_SPBA1_BASE_ADDR),
>-		.length		= MXC91231_SPBA1_SIZE,
>-		.type		= MT_DEVICE,
>-	}, {
>-		.virtual	= MXC91231_AIPS2_BASE_ADDR_VIRT,
>-		.pfn		= __phys_to_pfn(MXC91231_AIPS2_BASE_ADDR),
>-		.length		= MXC91231_AIPS2_SIZE,
>-		.type		= MT_DEVICE,
>-	},
>+static struct map_desc mxc91231_io_desc[] __initdata = {
>+	imx_map_entry(MXC91231, L2CC, MT_DEVICE),
>+	imx_map_entry(MXC91231, X_MEMC, MT_DEVICE),
>+	imx_map_entry(MXC91231, ROMP, MT_DEVICE),
>+	imx_map_entry(MXC91231, AVIC, MT_DEVICE),
>+	imx_map_entry(MXC91231, AIPS1, MT_DEVICE),
>+	imx_map_entry(MXC91231, SPBA0, MT_DEVICE),
>+	imx_map_entry(MXC91231, SPBA1, MT_DEVICE),
>+	imx_map_entry(MXC91231, AIPS2, MT_DEVICE),
> };
>
> /*
>@@ -80,7 +47,7 @@ void __init mxc91231_map_io(void)
> {
> 	mxc_set_cpu_type(MXC_CPU_MXC91231);
>
>-	iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc));
>+	iotable_init(mxc91231_io_desc, ARRAY_SIZE(mxc91231_io_desc));
> }
>
> int mxc91231_register_gpios(void);
>diff --git a/arch/arm/plat-mxc/include/mach/hardware.h b/arch/arm/plat-mxc/include/mach/hardware.h
>index 4bbe506..409cec6 100644
>--- a/arch/arm/plat-mxc/include/mach/hardware.h
>+++ b/arch/arm/plat-mxc/include/mach/hardware.h
>@@ -66,4 +66,11 @@
>
> #include <mach/mxc.h>
>
>+#define imx_map_entry(soc, name, _type)	{				\
>+	.virtual = soc ## _IO_P2V(soc ## _ ## name ## _BASE_ADDR),	\
>+	.pfn = __phys_to_pfn(soc ## _ ## name ## _BASE_ADDR),		\
>+	.length = soc ## _ ## name ## _SIZE,				\
>+	.type = _type,							\
>+}
>+
> #endif /* __ASM_ARCH_MXC_HARDWARE_H__ */
>--
>1.7.2.3
>
>
>_______________________________________________
>linux-arm-kernel mailing list
>linux-arm-kernel at lists.infradead.org
>http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

Thanks,
Dinh

[PATCH 3/7] imx: use MXxy_IO_P2V macros to setup static mappings

[Uwe Kleine-König]

Hello Dinh,

> >diff --git a/arch/arm/mach-mx5/mm.c b/arch/arm/mach-mx5/mm.c
> >index bc3f30d..01dff26 100644
> >--- a/arch/arm/mach-mx5/mm.c
> >+++ b/arch/arm/mach-mx5/mm.c
> >@@ -23,33 +23,12 @@
> > /*
> >  * Define the MX51 memory map.
> >  */
> >-static struct map_desc mxc_io_desc[] __initdata = {
> >-	{
> >-		.virtual = MX51_IRAM_BASE_ADDR_VIRT,
> >-		.pfn = __phys_to_pfn(MX51_IRAM_BASE_ADDR),
> >-		.length = MX51_IRAM_SIZE,
> >-		.type = MT_DEVICE
> >-	}, {
> >-		.virtual = MX51_DEBUG_BASE_ADDR_VIRT,
> >-		.pfn = __phys_to_pfn(MX51_DEBUG_BASE_ADDR),
> >-		.length = MX51_DEBUG_SIZE,
> >-		.type = MT_DEVICE
> >-	}, {
> >-		.virtual = MX51_AIPS1_BASE_ADDR_VIRT,
> >-		.pfn = __phys_to_pfn(MX51_AIPS1_BASE_ADDR),
> >-		.length = MX51_AIPS1_SIZE,
> >-		.type = MT_DEVICE
> >-	}, {
> >-		.virtual = MX51_SPBA0_BASE_ADDR_VIRT,
> >-		.pfn = __phys_to_pfn(MX51_SPBA0_BASE_ADDR),
> >-		.length = MX51_SPBA0_SIZE,
> >-		.type = MT_DEVICE
> >-	}, {
> >-		.virtual = MX51_AIPS2_BASE_ADDR_VIRT,
> >-		.pfn = __phys_to_pfn(MX51_AIPS2_BASE_ADDR),
> >-		.length = MX51_AIPS2_SIZE,
> >-		.type = MT_DEVICE
> >-	},
> >+static struct map_desc mx51_io_desc[] __initdata = {
> >+	imx_map_entry(MX51, IRAM, MT_DEVICE),
> 
> Do you still see a need a statically map IRAM? I added the iram
> allocator functions so that users of IRAM can dynamically allocate it.
No I don't, IMHO it shouldn't have been there in the first place.  Maybe
it even *must* go away to become reliable, don't know for sure though.
But this patch is not the right one to fix it.  So if you want to send a
patch that removes unneeded mappings that's fine.  (Preferably on
mxc91231 that has more mappings than all the other SoCs.)

Best regards
Uwe

-- 
Pengutronix e.K.                           | Uwe Kleine-K?nig            |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |

[PATCH 4/7] imx: remove last explicit users of virtual base address defines

[Uwe Kleine-König]

This allows changing the mapping without the need to adapt all users.

While at it remove some unneeded casts to void __iomem *, this is already
taken care for in the IO_ADDRESS macros

Signed-off-by: Uwe Kleine-K?nig <u.kleine-koenig@pengutronix.de>
---
 arch/arm/mach-imx/devices.c           |    8 ++++----
 arch/arm/mach-mx25/devices.c          |    8 ++++----
 arch/arm/mach-mx25/mm.c               |    2 +-
 arch/arm/plat-mxc/include/mach/mx25.h |    9 ++++-----
 4 files changed, 13 insertions(+), 14 deletions(-)

diff --git a/arch/arm/mach-imx/devices.c b/arch/arm/mach-imx/devices.c
index fba5047..e69e46e 100644
--- a/arch/arm/mach-imx/devices.c
+++ b/arch/arm/mach-imx/devices.c
@@ -159,22 +159,22 @@ struct platform_device imx_usb_device = {
 static struct mxc_gpio_port imx_gpio_ports[] = {
 	{
 		.chip.label = "gpio-0",
-		.base = (void __iomem *)MX1_IO_ADDRESS(MX1_GPIO_BASE_ADDR),
+		.base = MX1_IO_ADDRESS(MX1_GPIO_BASE_ADDR),
 		.irq = MX1_GPIO_INT_PORTA,
 		.virtual_irq_start = MXC_GPIO_IRQ_START,
 	}, {
 		.chip.label = "gpio-1",
-		.base = (void __iomem *)MX1_IO_ADDRESS(MX1_GPIO_BASE_ADDR + 0x100),
+		.base = MX1_IO_ADDRESS(MX1_GPIO_BASE_ADDR + 0x100),
 		.irq = MX1_GPIO_INT_PORTB,
 		.virtual_irq_start = MXC_GPIO_IRQ_START + 32,
 	}, {
 		.chip.label = "gpio-2",
-		.base = (void __iomem *)MX1_IO_ADDRESS(MX1_GPIO_BASE_ADDR + 0x200),
+		.base = MX1_IO_ADDRESS(MX1_GPIO_BASE_ADDR + 0x200),
 		.irq = MX1_GPIO_INT_PORTC,
 		.virtual_irq_start = MXC_GPIO_IRQ_START + 64,
 	}, {
 		.chip.label = "gpio-3",
-		.base = (void __iomem *)MX1_IO_ADDRESS(MX1_GPIO_BASE_ADDR + 0x300),
+		.base = MX1_IO_ADDRESS(MX1_GPIO_BASE_ADDR + 0x300),
 		.irq = MX1_GPIO_INT_PORTD,
 		.virtual_irq_start = MXC_GPIO_IRQ_START + 96,
 	}
diff --git a/arch/arm/mach-mx25/devices.c b/arch/arm/mach-mx25/devices.c
index 1d0eb3e..92eb1a9 100644
--- a/arch/arm/mach-mx25/devices.c
+++ b/arch/arm/mach-mx25/devices.c
@@ -182,22 +182,22 @@ struct platform_device mxc_pwm_device3 = {
 static struct mxc_gpio_port imx_gpio_ports[] = {
 	{
 		.chip.label = "gpio-0",
-		.base = (void __iomem *)MX25_GPIO1_BASE_ADDR_VIRT,
+		.base = MX25_IO_ADDRESS(MX25_GPIO1_BASE_ADDR),
 		.irq = 52,
 		.virtual_irq_start = MXC_GPIO_IRQ_START,
 	}, {
 		.chip.label = "gpio-1",
-		.base = (void __iomem *)MX25_GPIO2_BASE_ADDR_VIRT,
+		.base = MX25_IO_ADDRESS(MX25_GPIO2_BASE_ADDR),
 		.irq = 51,
 		.virtual_irq_start = MXC_GPIO_IRQ_START + 32,
 	}, {
 		.chip.label = "gpio-2",
-		.base = (void __iomem *)MX25_GPIO3_BASE_ADDR_VIRT,
+		.base = MX25_IO_ADDRESS(MX25_GPIO3_BASE_ADDR),
 		.irq = 16,
 		.virtual_irq_start = MXC_GPIO_IRQ_START + 64,
 	}, {
 		.chip.label = "gpio-3",
-		.base = (void __iomem *)MX25_GPIO4_BASE_ADDR_VIRT,
+		.base = MX25_IO_ADDRESS(MX25_GPIO4_BASE_ADDR),
 		.irq = 23,
 		.virtual_irq_start = MXC_GPIO_IRQ_START + 96,
 	}
diff --git a/arch/arm/mach-mx25/mm.c b/arch/arm/mach-mx25/mm.c
index 11cd335..2edec6c 100644
--- a/arch/arm/mach-mx25/mm.c
+++ b/arch/arm/mach-mx25/mm.c
@@ -56,7 +56,7 @@ int imx25_register_gpios(void);
 
 void __init mx25_init_irq(void)
 {
-	mxc_init_irq((void __iomem *)MX25_AVIC_BASE_ADDR_VIRT);
+	mxc_init_irq(MX25_IO_ADDRESS(MX25_AVIC_BASE_ADDR));
 	imx25_register_gpios();
 }
 
diff --git a/arch/arm/plat-mxc/include/mach/mx25.h b/arch/arm/plat-mxc/include/mach/mx25.h
index 6f9e1d4..08b5a3a 100644
--- a/arch/arm/plat-mxc/include/mach/mx25.h
+++ b/arch/arm/plat-mxc/include/mach/mx25.h
@@ -21,13 +21,12 @@
 
 #define MX25_CRM_BASE_ADDR		(MX25_AIPS2_BASE_ADDR + 0x80000)
 #define MX25_GPT1_BASE_ADDR		(MX25_AIPS2_BASE_ADDR + 0x90000)
+#define MX25_GPIO4_BASE_ADDR		(MX25_AIPS2_BASE_ADDR + 0x9c000)
+#define MX25_GPIO3_BASE_ADDR		(MX25_AIPS2_BASE_ADDR + 0xa4000)
+#define MX25_GPIO1_BASE_ADDR		(MX25_AIPS2_BASE_ADDR + 0xcc000)
+#define MX25_GPIO2_BASE_ADDR		(MX25_AIPS2_BASE_ADDR + 0xd0000)
 #define MX25_WDOG_BASE_ADDR		(MX25_AIPS2_BASE_ADDR + 0xdc000)
 
-#define MX25_GPIO1_BASE_ADDR_VIRT	(MX25_AIPS2_BASE_ADDR_VIRT + 0xcc000)
-#define MX25_GPIO2_BASE_ADDR_VIRT	(MX25_AIPS2_BASE_ADDR_VIRT + 0xd0000)
-#define MX25_GPIO3_BASE_ADDR_VIRT	(MX25_AIPS2_BASE_ADDR_VIRT + 0xa4000)
-#define MX25_GPIO4_BASE_ADDR_VIRT	(MX25_AIPS2_BASE_ADDR_VIRT + 0x9c000)
-
 #define MX25_IO_P2V(x)	(					\
 	IMX_IO_P2V_MODULE(x, MX25_AIPS1) ?:			\
 	IMX_IO_P2V_MODULE(x, MX25_AIPS2) ?:			\
-- 
1.7.2.3

[PATCH 5/7] RFC/RFT: imx: change static io mapping to use a function

[Uwe Kleine-König]

Now only the virtual addresses [0xf4000000, 0xf5ffffff] are used for
static per-SoC mappings.  The few mappings of whole chip selects are
moved accordingly.

The now wrong defines for virtual base addresses are removed.

Signed-off-by: Uwe Kleine-K?nig <u.kleine-koenig@pengutronix.de>
---
 arch/arm/plat-mxc/include/mach/hardware.h |   67 +++++++++++++++++++++++++++++
 arch/arm/plat-mxc/include/mach/mx1.h      |    5 +--
 arch/arm/plat-mxc/include/mach/mx21.h     |    9 +---
 arch/arm/plat-mxc/include/mach/mx25.h     |   13 ++----
 arch/arm/plat-mxc/include/mach/mx27.h     |    9 +---
 arch/arm/plat-mxc/include/mach/mx2x.h     |   36 +---------------
 arch/arm/plat-mxc/include/mach/mx31.h     |   16 +------
 arch/arm/plat-mxc/include/mach/mx35.h     |   17 +------
 arch/arm/plat-mxc/include/mach/mx3x.h     |   65 +--------------------------
 arch/arm/plat-mxc/include/mach/mx51.h     |   38 +---------------
 arch/arm/plat-mxc/include/mach/mxc91231.h |   22 +---------
 11 files changed, 89 insertions(+), 208 deletions(-)

diff --git a/arch/arm/plat-mxc/include/mach/hardware.h b/arch/arm/plat-mxc/include/mach/hardware.h
index 409cec6..2f59b63 100644
--- a/arch/arm/plat-mxc/include/mach/hardware.h
+++ b/arch/arm/plat-mxc/include/mach/hardware.h
@@ -32,6 +32,73 @@
 	(((addr) - module ## _BASE_ADDR) < module ## _SIZE ?		\
 	 (addr) - (module ## _BASE_ADDR) + (module ## _BASE_ADDR_VIRT) : 0)
 
+/*
+ * This is rather complicated for humans and ugly to verify, but for a machine
+ * it's OK.  Still more as it is usually only applied to constants.  The upsides
+ * on using this approach are:
+ *
+ *  - same mapping on all i.MX machines
+ *  - works for assembler, too
+ *  - no need to nurture #defines for virtual addresses
+ *
+ * The downside it, it's hard to verify (but I have a script for that).
+ *
+ * Obviously this needs to be injective for each SoC.  In general it maps the
+ * whole address space to [0xf4000000, 0xf5ffffff].  So [0xf6000000,0xfeffffff]
+ * is free for per-machine use (e.g. KZM_ARM11_01 uses 64MiB there).
+ *
+ * It applies the following mappings for the different SoCs:
+ *
+ * mx1:
+ *	IO	0x00200000+0x100000	->	0xf4000000+0x100000
+ * mx21:
+ *	AIPI	0x10000000+0x100000	->	0xf4400000+0x100000
+ *	SAHB1	0x80000000+0x100000	->	0xf4000000+0x100000
+ *	X_MEMC	0xdf000000+0x004000	->	0xf5f00000+0x004000
+ * mx25:
+ *	AIPS1	0x43f00000+0x100000	->	0xf5300000+0x100000
+ *	AIPS2	0x53f00000+0x100000	->	0xf5700000+0x100000
+ *	AVIC	0x68000000+0x100000	->	0xf5800000+0x100000
+ * mx27:
+ *	AIPI	0x10000000+0x100000	->	0xf4400000+0x100000
+ *	SAHB1	0x80000000+0x100000	->	0xf4000000+0x100000
+ *	X_MEMC	0xd8000000+0x100000	->	0xf5c00000+0x100000
+ * mx31:
+ *	AIPS1	0x43f00000+0x100000	->	0xf5300000+0x100000
+ *	AIPS2	0x53f00000+0x100000	->	0xf5700000+0x100000
+ *	AVIC	0x68000000+0x100000	->	0xf5800000+0x100000
+ *	X_MEMC	0xb8000000+0x010000	->	0xf4c00000+0x010000
+ *	SPBA0	0x50000000+0x100000	->	0xf5400000+0x100000
+ * mx35:
+ *	AIPS1	0x43f00000+0x100000	->	0xf5300000+0x100000
+ *	AIPS2	0x53f00000+0x100000	->	0xf5700000+0x100000
+ *	AVIC	0x68000000+0x100000	->	0xf5800000+0x100000
+ *	X_MEMC	0xb8000000+0x010000	->	0xf4c00000+0x010000
+ *	SPBA0	0x50000000+0x100000	->	0xf5400000+0x100000
+ * mx51:
+ *	IRAM	0x1ffe0000+0x020000	->	0xf4fe0000+0x020000
+ *	DEBUG	0x60000000+0x100000	->	0xf5000000+0x100000
+ *	SPBA0	0x70000000+0x100000	->	0xf5400000+0x100000
+ *	AIPS1	0x73f00000+0x100000	->	0xf5700000+0x100000
+ *	AIPS2	0x83f00000+0x100000	->	0xf4300000+0x100000
+ * mxc91231:
+ *	L2CC	0x30000000+0x010000	->	0xf4400000+0x010000
+ *	X_MEMC	0xb8000000+0x010000	->	0xf4c00000+0x010000
+ *	ROMP	0x60000000+0x010000	->	0xf5000000+0x010000
+ *	AVIC	0x68000000+0x010000	->	0xf5800000+0x010000
+ *	AIPS1	0x43f00000+0x100000	->	0xf5300000+0x100000
+ *	SPBA0	0x50000000+0x100000	->	0xf5400000+0x100000
+ *	SPBA1	0x52000000+0x100000	->	0xf5600000+0x100000
+ *	AIPS2	0x53f00000+0x100000	->	0xf5700000+0x100000
+ */
+#define IMX_IO_P2V(x)	(						\
+			0xf4000000 + 					\
+			(((x) & 0x50000000) >> 6) +			\
+			(((x) & 0x0b000000) >> 4) +			\
+			(((x) & 0x000fffff)))
+
+#define IMX_IO_ADDRESS(x)	IOMEM(IMX_IO_P2V(x))
+
 #ifdef CONFIG_ARCH_MX5
 #include <mach/mx51.h>
 #endif
diff --git a/arch/arm/plat-mxc/include/mach/mx1.h b/arch/arm/plat-mxc/include/mach/mx1.h
index 6faa7d2..6541798 100644
--- a/arch/arm/plat-mxc/include/mach/mx1.h
+++ b/arch/arm/plat-mxc/include/mach/mx1.h
@@ -19,7 +19,6 @@
  */
 #define MX1_IO_BASE_ADDR	0x00200000
 #define MX1_IO_SIZE		SZ_1M
-#define MX1_IO_BASE_ADDR_VIRT	VMALLOC_END
 
 #define MX1_CS0_PHYS		0x10000000
 #define MX1_CS0_SIZE		0x02000000
@@ -73,8 +72,7 @@
 #define MX1_CSI_BASE_ADDR		(0x24000 + MX1_IO_BASE_ADDR)
 
 /* macro to get at IO space when running virtually */
-#define MX1_IO_P2V(x)	(						\
-	IMX_IO_P2V_MODULE(x, MX1_IO))
+#define MX1_IO_P2V(x)			IMX_IO_P2V(x)
 #define MX1_IO_ADDRESS(x) 		IOMEM(MX1_IO_P2V(x))
 
 /* fixed interrput numbers */
@@ -171,7 +169,6 @@
 /* these should go away */
 #define IMX_IO_PHYS MX1_IO_BASE_ADDR
 #define IMX_IO_SIZE MX1_IO_SIZE
-#define IMX_IO_BASE MX1_IO_BASE_ADDR_VIRT
 #define IMX_CS0_PHYS MX1_CS0_PHYS
 #define IMX_CS0_SIZE MX1_CS0_SIZE
 #define IMX_CS1_PHYS MX1_CS1_PHYS
diff --git a/arch/arm/plat-mxc/include/mach/mx21.h b/arch/arm/plat-mxc/include/mach/mx21.h
index aed0277..b417e32 100644
--- a/arch/arm/plat-mxc/include/mach/mx21.h
+++ b/arch/arm/plat-mxc/include/mach/mx21.h
@@ -26,7 +26,6 @@
 #define __MACH_MX21_H__
 
 #define MX21_AIPI_BASE_ADDR		0x10000000
-#define MX21_AIPI_BASE_ADDR_VIRT	0xf4000000
 #define MX21_AIPI_SIZE			SZ_1M
 #define MX21_DMA_BASE_ADDR			(MX21_AIPI_BASE_ADDR + 0x01000)
 #define MX21_WDOG_BASE_ADDR			(MX21_AIPI_BASE_ADDR + 0x02000)
@@ -64,7 +63,6 @@
 #define MX21_AVIC_BASE_ADDR		0x10040000
 
 #define MX21_SAHB1_BASE_ADDR		0x80000000
-#define MX21_SAHB1_BASE_ADDR_VIRT	0xf4100000
 #define MX21_SAHB1_SIZE			SZ_1M
 #define MX21_CSI_BASE_ADDR			(MX2x_SAHB1_BASE_ADDR + 0x0000)
 
@@ -82,7 +80,6 @@
 
 /* NAND, SDRAM, WEIM etc controllers */
 #define MX21_X_MEMC_BASE_ADDR		0xdf000000
-#define MX21_X_MEMC_BASE_ADDR_VIRT	0xf4200000
 #define MX21_X_MEMC_SIZE		SZ_256K
 
 #define MX21_SDRAMC_BASE_ADDR		(MX21_X_MEMC_BASE_ADDR + 0x0000)
@@ -92,10 +89,7 @@
 
 #define MX21_IRAM_BASE_ADDR		0xffffe800	/* internal ram */
 
-#define MX21_IO_P2V(x)	(						\
-	IMX_IO_P2V_MODULE(x, MX21_AIPI) ?:				\
-	IMX_IO_P2V_MODULE(x, MX21_SAHB1) ?:				\
-	IMX_IO_P2V_MODULE(x, MX21_X_MEMC))
+#define MX21_IO_P2V(x)			IMX_IO_P2V(x)
 #define MX21_IO_ADDRESS(x)		IOMEM(MX21_IO_P2V(x))
 
 /* fixed interrupt numbers */
@@ -197,7 +191,6 @@
 #define PCMCIA_MEM_BASE_ADDR MX21_PCMCIA_MEM_BASE_ADDR
 #define CS5_BASE_ADDR MX21_CS5_BASE_ADDR
 #define X_MEMC_BASE_ADDR MX21_X_MEMC_BASE_ADDR
-#define X_MEMC_BASE_ADDR_VIRT MX21_X_MEMC_BASE_ADDR_VIRT
 #define X_MEMC_SIZE MX21_X_MEMC_SIZE
 #define SDRAMC_BASE_ADDR MX21_SDRAMC_BASE_ADDR
 #define EIM_BASE_ADDR MX21_EIM_BASE_ADDR
diff --git a/arch/arm/plat-mxc/include/mach/mx25.h b/arch/arm/plat-mxc/include/mach/mx25.h
index 08b5a3a..aac6a9c 100644
--- a/arch/arm/plat-mxc/include/mach/mx25.h
+++ b/arch/arm/plat-mxc/include/mach/mx25.h
@@ -2,13 +2,11 @@
 #define __MACH_MX25_H__
 
 #define MX25_AIPS1_BASE_ADDR		0x43f00000
-#define MX25_AIPS1_BASE_ADDR_VIRT	0xfc000000
+#define MX25_AIPS1_BASE_ADDR_VIRT	0xf5300000
 #define MX25_AIPS1_SIZE			SZ_1M
 #define MX25_AIPS2_BASE_ADDR		0x53f00000
-#define MX25_AIPS2_BASE_ADDR_VIRT	0xfc200000
 #define MX25_AIPS2_SIZE			SZ_1M
 #define MX25_AVIC_BASE_ADDR		0x68000000
-#define MX25_AVIC_BASE_ADDR_VIRT	0xfc400000
 #define MX25_AVIC_SIZE			SZ_1M
 
 #define MX25_I2C1_BASE_ADDR		(MX25_AIPS1_BASE_ADDR + 0x80000)
@@ -27,12 +25,6 @@
 #define MX25_GPIO2_BASE_ADDR		(MX25_AIPS2_BASE_ADDR + 0xd0000)
 #define MX25_WDOG_BASE_ADDR		(MX25_AIPS2_BASE_ADDR + 0xdc000)
 
-#define MX25_IO_P2V(x)	(					\
-	IMX_IO_P2V_MODULE(x, MX25_AIPS1) ?:			\
-	IMX_IO_P2V_MODULE(x, MX25_AIPS2) ?:			\
-	IMX_IO_P2V_MODULE(x, MX25_AVIC))
-#define MX25_IO_ADDRESS(x)		IOMEM(MX25_IO_P2V(x))
-
 #define MX25_AIPS1_IO_ADDRESS(x) \
 	(((x) - MX25_AIPS1_BASE_ADDR) + MX25_AIPS1_BASE_ADDR_VIRT)
 
@@ -58,6 +50,9 @@
 #define MX25_OTG_BASE_ADDR		0x53ff4000
 #define MX25_CSI_BASE_ADDR		0x53ff8000
 
+#define MX25_IO_P2V(x)			IMX_IO_P2V(x)
+#define MX25_IO_ADDRESS(x)		IOMEM(MX25_IO_P2V(x))
+
 #define MX25_INT_CSPI3		0
 #define MX25_INT_I2C1		3
 #define MX25_INT_I2C2		4
diff --git a/arch/arm/plat-mxc/include/mach/mx27.h b/arch/arm/plat-mxc/include/mach/mx27.h
index c769cc8..e817289 100644
--- a/arch/arm/plat-mxc/include/mach/mx27.h
+++ b/arch/arm/plat-mxc/include/mach/mx27.h
@@ -29,7 +29,6 @@
 #endif
 
 #define MX27_AIPI_BASE_ADDR		0x10000000
-#define MX27_AIPI_BASE_ADDR_VIRT	0xf4000000
 #define MX27_AIPI_SIZE			SZ_1M
 #define MX27_DMA_BASE_ADDR			(MX27_AIPI_BASE_ADDR + 0x01000)
 #define MX27_WDOG_BASE_ADDR			(MX27_AIPI_BASE_ADDR + 0x02000)
@@ -87,7 +86,6 @@
 #define MX27_ROMP_BASE_ADDR		0x10041000
 
 #define MX27_SAHB1_BASE_ADDR		0x80000000
-#define MX27_SAHB1_BASE_ADDR_VIRT	0xf4100000
 #define MX27_SAHB1_SIZE			SZ_1M
 #define MX27_CSI_BASE_ADDR			(MX27_SAHB1_BASE_ADDR + 0x0000)
 #define MX27_ATA_BASE_ADDR			(MX27_SAHB1_BASE_ADDR + 0x1000)
@@ -105,7 +103,6 @@
 
 /* NAND, SDRAM, WEIM, M3IF, EMI controllers */
 #define MX27_X_MEMC_BASE_ADDR		0xd8000000
-#define MX27_X_MEMC_BASE_ADDR_VIRT	0xf4200000
 #define MX27_X_MEMC_SIZE		SZ_1M
 #define MX27_NFC_BASE_ADDR			(MX27_X_MEMC_BASE_ADDR)
 #define MX27_SDRAMC_BASE_ADDR			(MX27_X_MEMC_BASE_ADDR + 0x1000)
@@ -123,10 +120,7 @@
 /* IRAM */
 #define MX27_IRAM_BASE_ADDR		0xffff4c00	/* internal ram */
 
-#define MX27_IO_P2V(x)	(						\
-	IMX_IO_P2V_MODULE(x, MX27_AIPI) ?:				\
-	IMX_IO_P2V_MODULE(x, MX27_SAHB1) ?:				\
-	IMX_IO_P2V_MODULE(x, MX27_X_MEMC))
+#define MX27_IO_P2V(x)			IMX_IO_P2V(x)
 #define MX27_IO_ADDRESS(x)		IOMEM(MX27_IO_P2V(x))
 
 #ifndef __ASSEMBLER__
@@ -280,7 +274,6 @@ extern int mx27_revision(void);
 #define CS4_BASE_ADDR MX27_CS4_BASE_ADDR
 #define CS5_BASE_ADDR MX27_CS5_BASE_ADDR
 #define X_MEMC_BASE_ADDR MX27_X_MEMC_BASE_ADDR
-#define X_MEMC_BASE_ADDR_VIRT MX27_X_MEMC_BASE_ADDR_VIRT
 #define X_MEMC_SIZE MX27_X_MEMC_SIZE
 #define NFC_BASE_ADDR MX27_NFC_BASE_ADDR
 #define SDRAMC_BASE_ADDR MX27_SDRAMC_BASE_ADDR
diff --git a/arch/arm/plat-mxc/include/mach/mx2x.h b/arch/arm/plat-mxc/include/mach/mx2x.h
index afb895a..46eeeb2 100644
--- a/arch/arm/plat-mxc/include/mach/mx2x.h
+++ b/arch/arm/plat-mxc/include/mach/mx2x.h
@@ -27,7 +27,7 @@
 
 /* Register offsets */
 #define MX2x_AIPI_BASE_ADDR		0x10000000
-#define MX2x_AIPI_BASE_ADDR_VIRT	0xf4000000
+#define MX2x_AIPI_BASE_ADDR_VIRT	0xf4400000
 #define MX2x_AIPI_SIZE			SZ_1M
 #define MX2x_DMA_BASE_ADDR			(MX2x_AIPI_BASE_ADDR + 0x01000)
 #define MX2x_WDOG_BASE_ADDR			(MX2x_AIPI_BASE_ADDR + 0x02000)
@@ -65,43 +65,12 @@
 #define MX2x_AVIC_BASE_ADDR		0x10040000
 
 #define MX2x_SAHB1_BASE_ADDR		0x80000000
-#define MX2x_SAHB1_BASE_ADDR_VIRT	0xf4100000
 #define MX2x_SAHB1_SIZE			SZ_1M
 #define MX2x_CSI_BASE_ADDR			(MX2x_SAHB1_BASE_ADDR + 0x0000)
 
-/*
- * This macro defines the physical to virtual address mapping for all the
- * peripheral modules. It is used by passing in the physical address as x
- * and returning the virtual address. If the physical address is not mapped,
- * it returns 0xDEADBEEF
- */
-#define IO_ADDRESS(x)   \
-	(void __force __iomem *) \
-	(((x >= AIPI_BASE_ADDR) && (x < (AIPI_BASE_ADDR + AIPI_SIZE))) ? \
-		AIPI_IO_ADDRESS(x) : \
-	((x >= SAHB1_BASE_ADDR) && (x < (SAHB1_BASE_ADDR + SAHB1_SIZE))) ? \
-		SAHB1_IO_ADDRESS(x) : \
-	((x >= X_MEMC_BASE_ADDR) && (x < (X_MEMC_BASE_ADDR + X_MEMC_SIZE))) ? \
-		X_MEMC_IO_ADDRESS(x) : 0xDEADBEEF)
-
-/* define the address mapping macros: in physical address order */
-#define AIPI_IO_ADDRESS(x)  \
+#define AIPI_IO_ADDRESS(x)	\
 	(((x) - AIPI_BASE_ADDR) + AIPI_BASE_ADDR_VIRT)
 
-#define AVIC_IO_ADDRESS(x)	AIPI_IO_ADDRESS(x)
-
-#define SAHB1_IO_ADDRESS(x)  \
-	(((x) - SAHB1_BASE_ADDR) + SAHB1_BASE_ADDR_VIRT)
-
-#define CS4_IO_ADDRESS(x)  \
-	(((x) - CS4_BASE_ADDR) + CS4_BASE_ADDR_VIRT)
-
-#define X_MEMC_IO_ADDRESS(x)  \
-	(((x) - X_MEMC_BASE_ADDR) + X_MEMC_BASE_ADDR_VIRT)
-
-#define PCMCIA_IO_ADDRESS(x) \
-	(((x) - X_MEMC_BASE_ADDR) + X_MEMC_BASE_ADDR_VIRT)
-
 /* fixed interrupt numbers */
 #define MX2x_INT_CSPI3		6
 #define MX2x_INT_GPIO		8
@@ -215,7 +184,6 @@
 #define MAX_BASE_ADDR MX2x_MAX_BASE_ADDR
 #define AVIC_BASE_ADDR MX2x_AVIC_BASE_ADDR
 #define SAHB1_BASE_ADDR MX2x_SAHB1_BASE_ADDR
-#define SAHB1_BASE_ADDR_VIRT MX2x_SAHB1_BASE_ADDR_VIRT
 #define SAHB1_SIZE MX2x_SAHB1_SIZE
 #define CSI_BASE_ADDR MX2x_CSI_BASE_ADDR
 #define MXC_INT_CSPI3 MX2x_INT_CSPI3
diff --git a/arch/arm/plat-mxc/include/mach/mx31.h b/arch/arm/plat-mxc/include/mach/mx31.h
index eb4a28d..9ed9975 100644
--- a/arch/arm/plat-mxc/include/mach/mx31.h
+++ b/arch/arm/plat-mxc/include/mach/mx31.h
@@ -15,7 +15,6 @@
 #define MX31_L2CC_SIZE			SZ_1M
 
 #define MX31_AIPS1_BASE_ADDR		0x43f00000
-#define MX31_AIPS1_BASE_ADDR_VIRT	0xfc000000
 #define MX31_AIPS1_SIZE			SZ_1M
 #define MX31_MAX_BASE_ADDR			(MX31_AIPS1_BASE_ADDR + 0x04000)
 #define MX31_EVTMON_BASE_ADDR			(MX31_AIPS1_BASE_ADDR + 0x08000)
@@ -41,7 +40,6 @@
 #define MX31_ECT_IP2_BASE_ADDR			(MX31_AIPS1_BASE_ADDR + 0xbc000)
 
 #define MX31_SPBA0_BASE_ADDR		0x50000000
-#define MX31_SPBA0_BASE_ADDR_VIRT	0xfc100000
 #define MX31_SPBA0_SIZE			SZ_1M
 #define MX31_MMC_SDHC1_BASE_ADDR		(MX31_SPBA0_BASE_ADDR + 0x04000)
 #define MX31_MMC_SDHC2_BASE_ADDR		(MX31_SPBA0_BASE_ADDR + 0x08000)
@@ -55,7 +53,6 @@
 #define MX31_SPBA_CTRL_BASE_ADDR		(MX31_SPBA0_BASE_ADDR + 0x3c000)
 
 #define MX31_AIPS2_BASE_ADDR		0x53f00000
-#define MX31_AIPS2_BASE_ADDR_VIRT	0xfc200000
 #define MX31_AIPS2_SIZE			SZ_1M
 #define MX31_CCM_BASE_ADDR			(MX31_AIPS2_BASE_ADDR + 0x80000)
 #define MX31_CSPI3_BASE_ADDR			(MX31_AIPS2_BASE_ADDR + 0x84000)
@@ -84,7 +81,6 @@
 #define MX31_ROMP_SIZE			SZ_1M
 
 #define MX31_AVIC_BASE_ADDR		0x68000000
-#define MX31_AVIC_BASE_ADDR_VIRT	0xfc400000
 #define MX31_AVIC_SIZE			SZ_1M
 
 #define MX31_IPU_MEM_BASE_ADDR		0x70000000
@@ -97,15 +93,14 @@
 #define MX31_CS3_BASE_ADDR		0xb2000000
 
 #define MX31_CS4_BASE_ADDR		0xb4000000
-#define MX31_CS4_BASE_ADDR_VIRT		0xf4000000
+#define MX31_CS4_BASE_ADDR_VIRT		0xf6000000
 #define MX31_CS4_SIZE			SZ_32M
 
 #define MX31_CS5_BASE_ADDR		0xb6000000
-#define MX31_CS5_BASE_ADDR_VIRT		0xf6000000
+#define MX31_CS5_BASE_ADDR_VIRT		0xf8000000
 #define MX31_CS5_SIZE			SZ_32M
 
 #define MX31_X_MEMC_BASE_ADDR		0xb8000000
-#define MX31_X_MEMC_BASE_ADDR_VIRT	0xfc320000
 #define MX31_X_MEMC_SIZE		SZ_64K
 #define MX31_NFC_BASE_ADDR			(MX31_X_MEMC_BASE_ADDR + 0x0000)
 #define MX31_ESDCTL_BASE_ADDR			(MX31_X_MEMC_BASE_ADDR + 0x1000)
@@ -121,12 +116,7 @@
 
 #define MX31_PCMCIA_MEM_BASE_ADDR	0xbc000000
 
-#define MX31_IO_P2V(x)	(						\
-	IMX_IO_P2V_MODULE(x, MX31_AIPS1) ?:				\
-	IMX_IO_P2V_MODULE(x, MX31_AIPS2) ?:				\
-	IMX_IO_P2V_MODULE(x, MX31_AVIC) ?:				\
-	IMX_IO_P2V_MODULE(x, MX31_X_MEMC) ?:				\
-	IMX_IO_P2V_MODULE(x, MX31_SPBA0))
+#define MX31_IO_P2V(x)			IMX_IO_P2V(x)
 #define MX31_IO_ADDRESS(x)		IOMEM(MX31_IO_P2V(x))
 
 #ifndef __ASSEMBLER__
diff --git a/arch/arm/plat-mxc/include/mach/mx35.h b/arch/arm/plat-mxc/include/mach/mx35.h
index ce1a24b..3678ca3 100644
--- a/arch/arm/plat-mxc/include/mach/mx35.h
+++ b/arch/arm/plat-mxc/include/mach/mx35.h
@@ -11,7 +11,6 @@
 #define MX35_L2CC_SIZE			SZ_1M
 
 #define MX35_AIPS1_BASE_ADDR		0x43f00000
-#define MX35_AIPS1_BASE_ADDR_VIRT	0xfc000000
 #define MX35_AIPS1_SIZE			SZ_1M
 #define MX35_MAX_BASE_ADDR			(MX35_AIPS1_BASE_ADDR + 0x04000)
 #define MX35_EVTMON_BASE_ADDR			(MX35_AIPS1_BASE_ADDR + 0x08000)
@@ -33,7 +32,6 @@
 #define MX35_ECT_IP2_BASE_ADDR			(MX35_AIPS1_BASE_ADDR + 0xbc000)
 
 #define MX35_SPBA0_BASE_ADDR		0x50000000
-#define MX35_SPBA0_BASE_ADDR_VIRT	0xfc100000
 #define MX35_SPBA0_SIZE			SZ_1M
 #define MX35_UART3_BASE_ADDR			(MX35_SPBA0_BASE_ADDR + 0x0c000)
 #define MX35_CSPI2_BASE_ADDR			(MX35_SPBA0_BASE_ADDR + 0x10000)
@@ -44,7 +42,6 @@
 #define MX35_SPBA_CTRL_BASE_ADDR		(MX35_SPBA0_BASE_ADDR + 0x3c000)
 
 #define MX35_AIPS2_BASE_ADDR		0x53f00000
-#define MX35_AIPS2_BASE_ADDR_VIRT	0xfc200000
 #define MX35_AIPS2_SIZE			SZ_1M
 #define MX35_CCM_BASE_ADDR			(MX35_AIPS2_BASE_ADDR + 0x80000)
 #define MX35_GPT1_BASE_ADDR			(MX35_AIPS2_BASE_ADDR + 0x90000)
@@ -72,11 +69,9 @@
 #define MX35_OTG_BASE_ADDR		0x53ff4000
 
 #define MX35_ROMP_BASE_ADDR		0x60000000
-#define MX35_ROMP_BASE_ADDR_VIRT	0xfc500000
 #define MX35_ROMP_SIZE			SZ_1M
 
 #define MX35_AVIC_BASE_ADDR		0x68000000
-#define MX35_AVIC_BASE_ADDR_VIRT	0xfc400000
 #define MX35_AVIC_SIZE			SZ_1M
 
 /*
@@ -92,18 +87,17 @@
 #define MX35_CS3_BASE_ADDR		0xb2000000
 
 #define MX35_CS4_BASE_ADDR		0xb4000000
-#define MX35_CS4_BASE_ADDR_VIRT		0xf4000000
+#define MX35_CS4_BASE_ADDR_VIRT		0xf6000000
 #define MX35_CS4_SIZE			SZ_32M
 
 #define MX35_CS5_BASE_ADDR		0xb6000000
-#define MX35_CS5_BASE_ADDR_VIRT		0xf6000000
+#define MX35_CS5_BASE_ADDR_VIRT		0xf8000000
 #define MX35_CS5_SIZE			SZ_32M
 
 /*
  * NAND, SDRAM, WEIM, M3IF, EMI controllers
  */
 #define MX35_X_MEMC_BASE_ADDR		0xb8000000
-#define MX35_X_MEMC_BASE_ADDR_VIRT	0xfc320000
 #define MX35_X_MEMC_SIZE		SZ_64K
 #define MX35_ESDCTL_BASE_ADDR			(MX35_X_MEMC_BASE_ADDR + 0x1000)
 #define MX35_WEIM_BASE_ADDR			(MX35_X_MEMC_BASE_ADDR + 0x2000)
@@ -114,12 +108,7 @@
 #define MX35_NFC_BASE_ADDR		0xbb000000
 #define MX35_PCMCIA_MEM_BASE_ADDR	0xbc000000
 
-#define MX35_IO_P2V(x)	(						\
-	IMX_IO_P2V_MODULE(x, MX35_AIPS1) ?:				\
-	IMX_IO_P2V_MODULE(x, MX35_AIPS2) ?:				\
-	IMX_IO_P2V_MODULE(x, MX35_AVIC) ?:				\
-	IMX_IO_P2V_MODULE(x, MX35_X_MEMC) ?:				\
-	IMX_IO_P2V_MODULE(x, MX35_SPBA0))
+#define MX35_IO_P2V(x)			IMX_IO_P2V(x)
 #define MX35_IO_ADDRESS(x)		IOMEM(MX35_IO_P2V(x))
 
 /*
diff --git a/arch/arm/plat-mxc/include/mach/mx3x.h b/arch/arm/plat-mxc/include/mach/mx3x.h
index d1bd26d..da22cd4 100644
--- a/arch/arm/plat-mxc/include/mach/mx3x.h
+++ b/arch/arm/plat-mxc/include/mach/mx3x.h
@@ -44,7 +44,7 @@
  * AIPS 1
  */
 #define MX3x_AIPS1_BASE_ADDR		0x43f00000
-#define MX3x_AIPS1_BASE_ADDR_VIRT	0xfc000000
+#define MX3x_AIPS1_BASE_ADDR_VIRT	0xf5300000
 #define MX3x_AIPS1_SIZE			SZ_1M
 #define MX3x_MAX_BASE_ADDR			(MX3x_AIPS1_BASE_ADDR + 0x04000)
 #define MX3x_EVTMON_BASE_ADDR			(MX3x_AIPS1_BASE_ADDR + 0x08000)
@@ -69,7 +69,6 @@
  * SPBA global module enabled #0
  */
 #define MX3x_SPBA0_BASE_ADDR		0x50000000
-#define MX3x_SPBA0_BASE_ADDR_VIRT	0xfc100000
 #define MX3x_SPBA0_SIZE			SZ_1M
 #define MX3x_UART3_BASE_ADDR			(MX3x_SPBA0_BASE_ADDR + 0x0c000)
 #define MX3x_CSPI2_BASE_ADDR			(MX3x_SPBA0_BASE_ADDR + 0x10000)
@@ -82,7 +81,6 @@
  * AIPS 2
  */
 #define MX3x_AIPS2_BASE_ADDR		0x53f00000
-#define MX3x_AIPS2_BASE_ADDR_VIRT	0xfc200000
 #define MX3x_AIPS2_SIZE			SZ_1M
 #define MX3x_CCM_BASE_ADDR			(MX3x_AIPS2_BASE_ADDR + 0x80000)
 #define MX3x_GPT1_BASE_ADDR			(MX3x_AIPS2_BASE_ADDR + 0x90000)
@@ -105,11 +103,9 @@
  * ROMP and AVIC
  */
 #define MX3x_ROMP_BASE_ADDR		0x60000000
-#define MX3x_ROMP_BASE_ADDR_VIRT	0xfc500000
 #define MX3x_ROMP_SIZE			SZ_1M
 
 #define MX3x_AVIC_BASE_ADDR		0x68000000
-#define MX3x_AVIC_BASE_ADDR_VIRT	0xfc400000
 #define MX3x_AVIC_SIZE			SZ_1M
 
 /*
@@ -125,18 +121,17 @@
 #define MX3x_CS3_BASE_ADDR		0xb2000000
 
 #define MX3x_CS4_BASE_ADDR		0xb4000000
-#define MX3x_CS4_BASE_ADDR_VIRT		0xf4000000
+#define MX3x_CS4_BASE_ADDR_VIRT		0xf6000000
 #define MX3x_CS4_SIZE			SZ_32M
 
 #define MX3x_CS5_BASE_ADDR		0xb6000000
-#define MX3x_CS5_BASE_ADDR_VIRT		0xf6000000
+#define MX3x_CS5_BASE_ADDR_VIRT		0xf8000000
 #define MX3x_CS5_SIZE			SZ_32M
 
 /*
  * NAND, SDRAM, WEIM, M3IF, EMI controllers
  */
 #define MX3x_X_MEMC_BASE_ADDR		0xb8000000
-#define MX3x_X_MEMC_BASE_ADDR_VIRT	0xfc320000
 #define MX3x_X_MEMC_SIZE		SZ_64K
 #define MX3x_ESDCTL_BASE_ADDR			(MX3x_X_MEMC_BASE_ADDR + 0x1000)
 #define MX3x_WEIM_BASE_ADDR			(MX3x_X_MEMC_BASE_ADDR + 0x2000)
@@ -146,56 +141,9 @@
 
 #define MX3x_PCMCIA_MEM_BASE_ADDR	0xbc000000
 
-/*!
- * This macro defines the physical to virtual address mapping for all the
- * peripheral modules. It is used by passing in the physical address as x
- * and returning the virtual address. If the physical address is not mapped,
- * it returns 0xDEADBEEF
- */
-#define IO_ADDRESS(x)   \
-	(void __force __iomem *) \
-	(((x >= AIPS1_BASE_ADDR) && (x < (AIPS1_BASE_ADDR + AIPS1_SIZE))) ? AIPS1_IO_ADDRESS(x):\
-	((x >= SPBA0_BASE_ADDR) && (x < (SPBA0_BASE_ADDR + SPBA0_SIZE))) ? SPBA0_IO_ADDRESS(x):\
-	((x >= AIPS2_BASE_ADDR) && (x < (AIPS2_BASE_ADDR + AIPS2_SIZE))) ? AIPS2_IO_ADDRESS(x):\
-	((x >= ROMP_BASE_ADDR) && (x < (ROMP_BASE_ADDR + ROMP_SIZE))) ? ROMP_IO_ADDRESS(x):\
-	((x >= AVIC_BASE_ADDR) && (x < (AVIC_BASE_ADDR + AVIC_SIZE))) ? AVIC_IO_ADDRESS(x):\
-	((x >= CS4_BASE_ADDR) && (x < (CS4_BASE_ADDR + CS4_SIZE))) ? CS4_IO_ADDRESS(x):\
-	((x >= X_MEMC_BASE_ADDR) && (x < (X_MEMC_BASE_ADDR + X_MEMC_SIZE))) ? X_MEMC_IO_ADDRESS(x):\
-	0xDEADBEEF)
-
-/*
- * define the address mapping macros: in physical address order
- */
-#define L2CC_IO_ADDRESS(x)  \
-	(((x) - L2CC_BASE_ADDR) + L2CC_BASE_ADDR_VIRT)
-
 #define AIPS1_IO_ADDRESS(x)  \
 	(((x) - AIPS1_BASE_ADDR) + AIPS1_BASE_ADDR_VIRT)
 
-#define SPBA0_IO_ADDRESS(x)  \
-	(((x) - SPBA0_BASE_ADDR) + SPBA0_BASE_ADDR_VIRT)
-
-#define AIPS2_IO_ADDRESS(x)  \
-	(((x) - AIPS2_BASE_ADDR) + AIPS2_BASE_ADDR_VIRT)
-
-#define ROMP_IO_ADDRESS(x)  \
-	(((x) - ROMP_BASE_ADDR) + ROMP_BASE_ADDR_VIRT)
-
-#define AVIC_IO_ADDRESS(x)  \
-	(((x) - AVIC_BASE_ADDR) + AVIC_BASE_ADDR_VIRT)
-
-#define CS4_IO_ADDRESS(x)  \
-	(((x) - CS4_BASE_ADDR) + CS4_BASE_ADDR_VIRT)
-
-#define CS5_IO_ADDRESS(x)  \
-	(((x) - CS5_BASE_ADDR) + CS5_BASE_ADDR_VIRT)
-
-#define X_MEMC_IO_ADDRESS(x)  \
-	(((x) - X_MEMC_BASE_ADDR) + X_MEMC_BASE_ADDR_VIRT)
-
-#define PCMCIA_IO_ADDRESS(x) \
-	(((x) - X_MEMC_BASE_ADDR) + X_MEMC_BASE_ADDR_VIRT)
-
 /*
  * Interrupt numbers
  */
@@ -303,7 +251,6 @@ static inline int mx35_revision(void)
 #define ECT_IP1_BASE_ADDR MX3x_ECT_IP1_BASE_ADDR
 #define ECT_IP2_BASE_ADDR MX3x_ECT_IP2_BASE_ADDR
 #define SPBA0_BASE_ADDR MX3x_SPBA0_BASE_ADDR
-#define SPBA0_BASE_ADDR_VIRT MX3x_SPBA0_BASE_ADDR_VIRT
 #define SPBA0_SIZE MX3x_SPBA0_SIZE
 #define UART3_BASE_ADDR MX3x_UART3_BASE_ADDR
 #define CSPI2_BASE_ADDR MX3x_CSPI2_BASE_ADDR
@@ -312,7 +259,6 @@ static inline int mx35_revision(void)
 #define MSHC1_BASE_ADDR MX3x_MSHC1_BASE_ADDR
 #define SPBA_CTRL_BASE_ADDR MX3x_SPBA_CTRL_BASE_ADDR
 #define AIPS2_BASE_ADDR MX3x_AIPS2_BASE_ADDR
-#define AIPS2_BASE_ADDR_VIRT MX3x_AIPS2_BASE_ADDR_VIRT
 #define AIPS2_SIZE MX3x_AIPS2_SIZE
 #define CCM_BASE_ADDR MX3x_CCM_BASE_ADDR
 #define GPT1_BASE_ADDR MX3x_GPT1_BASE_ADDR
@@ -331,10 +277,8 @@ static inline int mx35_revision(void)
 #define PWM_BASE_ADDR MX3x_PWM_BASE_ADDR
 #define RTIC_BASE_ADDR MX3x_RTIC_BASE_ADDR
 #define ROMP_BASE_ADDR MX3x_ROMP_BASE_ADDR
-#define ROMP_BASE_ADDR_VIRT MX3x_ROMP_BASE_ADDR_VIRT
 #define ROMP_SIZE MX3x_ROMP_SIZE
 #define AVIC_BASE_ADDR MX3x_AVIC_BASE_ADDR
-#define AVIC_BASE_ADDR_VIRT MX3x_AVIC_BASE_ADDR_VIRT
 #define AVIC_SIZE MX3x_AVIC_SIZE
 #define IPU_MEM_BASE_ADDR MX3x_IPU_MEM_BASE_ADDR
 #define CSD0_BASE_ADDR MX3x_CSD0_BASE_ADDR
@@ -344,13 +288,10 @@ static inline int mx35_revision(void)
 #define CS2_BASE_ADDR MX3x_CS2_BASE_ADDR
 #define CS3_BASE_ADDR MX3x_CS3_BASE_ADDR
 #define CS4_BASE_ADDR MX3x_CS4_BASE_ADDR
-#define CS4_BASE_ADDR_VIRT MX3x_CS4_BASE_ADDR_VIRT
 #define CS4_SIZE MX3x_CS4_SIZE
 #define CS5_BASE_ADDR MX3x_CS5_BASE_ADDR
-#define CS5_BASE_ADDR_VIRT MX3x_CS5_BASE_ADDR_VIRT
 #define CS5_SIZE MX3x_CS5_SIZE
 #define X_MEMC_BASE_ADDR MX3x_X_MEMC_BASE_ADDR
-#define X_MEMC_BASE_ADDR_VIRT MX3x_X_MEMC_BASE_ADDR_VIRT
 #define X_MEMC_SIZE MX3x_X_MEMC_SIZE
 #define ESDCTL_BASE_ADDR MX3x_ESDCTL_BASE_ADDR
 #define WEIM_BASE_ADDR MX3x_WEIM_BASE_ADDR
diff --git a/arch/arm/plat-mxc/include/mach/mx51.h b/arch/arm/plat-mxc/include/mach/mx51.h
index e93cf5b..1b8715f 100644
--- a/arch/arm/plat-mxc/include/mach/mx51.h
+++ b/arch/arm/plat-mxc/include/mach/mx51.h
@@ -2,31 +2,6 @@
 #define __MACH_MX51_H__
 
 /*
- * MX51 memory map:
- *
- *
- * Virt		Phys		Size	What
- * ---------------------------------------------------------------------------
- * fa3e0000	1ffe0000	128K	IRAM (SCCv2 RAM)
- *         	30000000	256M	GPU
- *         	40000000	512M	IPU
- * fa200000	60000000	1M	DEBUG
- * fb100000	70000000	1M	SPBA 0
- * fb000000	73f00000	1M	AIPS 1
- * fb200000	83f00000	1M	AIPS 2
- *		8fffc000	16K	TZIC (interrupt controller)
- *         	90000000	256M	CSD0 SDRAM/DDR
- *         	a0000000	256M	CSD1 SDRAM/DDR
- *         	b0000000	128M	CS0 Flash
- *         	b8000000	128M	CS1 Flash
- *         	c0000000	128M	CS2 Flash
- *         	c8000000	64M	CS3 Flash
- *         	cc000000	32M	CS4 SRAM
- *         	ce000000	32M	CS5 SRAM
- *		cfff0000	64K	NFC (NAND Flash AXI)
- */
-
-/*
  * IROM
  */
 #define MX51_IROM_BASE_ADDR		0x0
@@ -36,7 +11,6 @@
  * IRAM
  */
 #define MX51_IRAM_BASE_ADDR		0x1ffe0000	/* internal ram */
-#define MX51_IRAM_BASE_ADDR_VIRT	0xfa3e0000
 #define MX51_IRAM_PARTITIONS		16
 #define MX51_IRAM_SIZE		(MX51_IRAM_PARTITIONS * SZ_8K)	/* 128KB */
 
@@ -45,7 +19,6 @@
 #define MX51_IPU_CTRL_BASE_ADDR		0x40000000
 
 #define MX51_DEBUG_BASE_ADDR		0x60000000
-#define MX51_DEBUG_BASE_ADDR_VIRT	0xfa200000
 #define MX51_DEBUG_SIZE			SZ_1M
 
 #define MX51_ETB_BASE_ADDR		(MX51_DEBUG_BASE_ADDR + 0x01000)
@@ -61,7 +34,6 @@
  * SPBA global module enabled #0
  */
 #define MX51_SPBA0_BASE_ADDR		0x70000000
-#define MX51_SPBA0_BASE_ADDR_VIRT	0xfb100000
 #define MX51_SPBA0_SIZE			SZ_1M
 
 #define MX51_ESDHC1_BASE_ADDR		(MX51_SPBA0_BASE_ADDR + 0x04000)
@@ -81,7 +53,7 @@
  * AIPS 1
  */
 #define MX51_AIPS1_BASE_ADDR		0x73f00000
-#define MX51_AIPS1_BASE_ADDR_VIRT	0xfb000000
+#define MX51_AIPS1_BASE_ADDR_VIRT	0xf5700000
 #define MX51_AIPS1_SIZE			SZ_1M
 
 #define MX51_OTG_BASE_ADDR		(MX51_AIPS1_BASE_ADDR + 0x80000)
@@ -109,7 +81,6 @@
  * AIPS 2
  */
 #define MX51_AIPS2_BASE_ADDR		0x83f00000
-#define MX51_AIPS2_BASE_ADDR_VIRT	0xfb200000
 #define MX51_AIPS2_SIZE			SZ_1M
 
 #define MX51_PLL1_BASE_ADDR		(MX51_AIPS2_BASE_ADDR + 0x80000)
@@ -163,12 +134,7 @@
 #define MX51_GPU2D_BASE_ADDR		0xd0000000
 #define MX51_TZIC_BASE_ADDR		0xe0000000
 
-#define MX51_IO_P2V(x)	(						\
-	IMX_IO_P2V_MODULE(x, MX51_IRAM) ?:				\
-	IMX_IO_P2V_MODULE(x, MX51_DEBUG) ?:				\
-	IMX_IO_P2V_MODULE(x, MX51_SPBA0) ?:				\
-	IMX_IO_P2V_MODULE(x, MX51_AIPS1) ?:				\
-	IMX_IO_P2V_MODULE(x, MX51_AIPS2))
+#define MX51_IO_P2V(x)			IMX_IO_P2V(x)
 #define MX51_IO_ADDRESS(x)		IOMEM(MX51_IO_P2V(x))
 
 /* This is currently used in <mach/debug-macro.S>, but should go away */
diff --git a/arch/arm/plat-mxc/include/mach/mxc91231.h b/arch/arm/plat-mxc/include/mach/mxc91231.h
index 49e5e25..765190f 100644
--- a/arch/arm/plat-mxc/include/mach/mxc91231.h
+++ b/arch/arm/plat-mxc/include/mach/mxc91231.h
@@ -21,14 +21,12 @@
  * L2CC
  */
 #define MXC91231_L2CC_BASE_ADDR		0x30000000
-#define MXC91231_L2CC_BASE_ADDR_VIRT	0xF9000000
 #define MXC91231_L2CC_SIZE		SZ_64K
 
 /*
  * AIPS 1
  */
 #define MXC91231_AIPS1_BASE_ADDR	0x43F00000
-#define MXC91231_AIPS1_BASE_ADDR_VIRT	0xFC000000
 #define MXC91231_AIPS1_SIZE		SZ_1M
 
 #define MXC91231_AIPS1_CTRL_BASE_ADDR	MXC91231_AIPS1_BASE_ADDR
@@ -53,7 +51,6 @@
  * AIPS 2
  */
 #define MXC91231_AIPS2_BASE_ADDR	0x53F00000
-#define MXC91231_AIPS2_BASE_ADDR_VIRT	0xFC100000
 #define MXC91231_AIPS2_SIZE		SZ_1M
 
 #define MXC91231_GEMK_BASE_ADDR		(MXC91231_AIPS2_BASE_ADDR + 0x8C000)
@@ -79,7 +76,6 @@
  * SPBA global module 0
  */
 #define MXC91231_SPBA0_BASE_ADDR	0x50000000
-#define MXC91231_SPBA0_BASE_ADDR_VIRT	0xFC200000
 #define MXC91231_SPBA0_SIZE		SZ_1M
 
 #define MXC91231_MMC_SDHC1_BASE_ADDR	(MXC91231_SPBA0_BASE_ADDR + 0x04000)
@@ -109,7 +105,6 @@
  * SPBA global module 1
  */
 #define MXC91231_SPBA1_BASE_ADDR	0x52000000
-#define MXC91231_SPBA1_BASE_ADDR_VIRT	0xFC300000
 #define MXC91231_SPBA1_SIZE		SZ_1M
 
 #define MXC91231_MQSPI_BASE_ADDR	(MXC91231_SPBA1_BASE_ADDR + 0x34000)
@@ -144,18 +139,15 @@
  * ROMP and AVIC
  */
 #define MXC91231_ROMP_BASE_ADDR		0x60000000
-#define MXC91231_ROMP_BASE_ADDR_VIRT	0xFC400000
 #define MXC91231_ROMP_SIZE		SZ_64K
 
 #define MXC91231_AVIC_BASE_ADDR		0x68000000
-#define MXC91231_AVIC_BASE_ADDR_VIRT	0xFC410000
 #define MXC91231_AVIC_SIZE		SZ_64K
 
 /*
  * NAND, SDRAM, WEIM, M3IF, EMI controllers
  */
 #define MXC91231_X_MEMC_BASE_ADDR	0xB8000000
-#define MXC91231_X_MEMC_BASE_ADDR_VIRT	0xFC420000
 #define MXC91231_X_MEMC_SIZE		SZ_64K
 
 #define MXC91231_NFC_BASE_ADDR		(MXC91231_X_MEMC_BASE_ADDR + 0x0000)
@@ -183,19 +175,9 @@
 /*
  * This macro defines the physical to virtual address mapping for all the
  * peripheral modules. It is used by passing in the physical address as x
- * and returning the virtual address. If the physical address is not mapped,
- * it returns 0.
+ * and returning the virtual address.
  */
-
-#define MXC91231_IO_P2V(x)	(					\
-	IMX_IO_P2V_MODULE(x, MXC91231_L2CC) ?:				\
-	IMX_IO_P2V_MODULE(x, MXC91231_X_MEMC) ?:			\
-	IMX_IO_P2V_MODULE(x, MXC91231_ROMP) ?:				\
-	IMX_IO_P2V_MODULE(x, MXC91231_AVIC) ?:				\
-	IMX_IO_P2V_MODULE(x, MXC91231_AIPS1) ?:				\
-	IMX_IO_P2V_MODULE(x, MXC91231_SPBA0) ?:				\
-	IMX_IO_P2V_MODULE(x, MXC91231_SPBA1) ?:				\
-	IMX_IO_P2V_MODULE(x, MXC91231_AIPS2))
+#define MXC91231_IO_P2V(x)		IMX_IO_P2V(x)
 #define MXC91231_IO_ADDRESS(x)		IOMEM(MXC91231_IO_P2V(x))
 
 /*
-- 
1.7.2.3

[PATCH 6/7] imx/debug-macro: rework using the new io mapping macro

[Uwe Kleine-König]

This gets rid of the last user of IMX_NEEDS_DEPRECATED_SYMBOLS.

Signed-off-by: Uwe Kleine-K?nig <u.kleine-koenig@pengutronix.de>
---
 arch/arm/plat-mxc/include/mach/debug-macro.S |   23 +++++++----------------
 arch/arm/plat-mxc/include/mach/mx25.h        |    4 ----
 arch/arm/plat-mxc/include/mach/mx2x.h        |    5 -----
 arch/arm/plat-mxc/include/mach/mx3x.h        |    5 -----
 arch/arm/plat-mxc/include/mach/mx51.h        |    5 -----
 5 files changed, 7 insertions(+), 35 deletions(-)

diff --git a/arch/arm/plat-mxc/include/mach/debug-macro.S b/arch/arm/plat-mxc/include/mach/debug-macro.S
index 2560640..8170894 100644
--- a/arch/arm/plat-mxc/include/mach/debug-macro.S
+++ b/arch/arm/plat-mxc/include/mach/debug-macro.S
@@ -10,58 +10,49 @@
  * published by the Free Software Foundation.
  *
  */
-#define IMX_NEEDS_DEPRECATED_SYMBOLS
+#include <mach/hardware.h>
 
 #ifdef CONFIG_ARCH_MX1
-#include <mach/mx1.h>
-#define UART_PADDR	UART1_BASE_ADDR
-#define UART_VADDR	IO_ADDRESS(UART1_BASE_ADDR)
+#define UART_PADDR	MX1_UART1_BASE_ADDR
 #endif
 
 #ifdef CONFIG_ARCH_MX25
 #ifdef UART_PADDR
 #error "CONFIG_DEBUG_LL is incompatible with multiple archs"
 #endif
-#include <mach/mx25.h>
 #define UART_PADDR	MX25_UART1_BASE_ADDR
-#define UART_VADDR	MX25_AIPS1_IO_ADDRESS(MX25_UART1_BASE_ADDR)
 #endif
 
 #ifdef CONFIG_ARCH_MX2
 #ifdef UART_PADDR
 #error "CONFIG_DEBUG_LL is incompatible with multiple archs"
 #endif
-#include <mach/mx2x.h>
-#define UART_PADDR	UART1_BASE_ADDR
-#define UART_VADDR	AIPI_IO_ADDRESS(UART1_BASE_ADDR)
+#define UART_PADDR	MX2x_UART1_BASE_ADDR
 #endif
 
 #ifdef CONFIG_ARCH_MX3
 #ifdef UART_PADDR
 #error "CONFIG_DEBUG_LL is incompatible with multiple archs"
 #endif
-#include <mach/mx3x.h>
-#define UART_PADDR	UART1_BASE_ADDR
-#define UART_VADDR	AIPS1_IO_ADDRESS(UART1_BASE_ADDR)
+#define UART_PADDR	MX3x_UART1_BASE_ADDR
 #endif
 
 #ifdef CONFIG_ARCH_MX5
 #ifdef UART_PADDR
 #error "CONFIG_DEBUG_LL is incompatible with multiple archs"
 #endif
-#include <mach/mx51.h>
 #define UART_PADDR	MX51_UART1_BASE_ADDR
-#define UART_VADDR	MX51_AIPS1_IO_ADDRESS(MX51_UART1_BASE_ADDR)
 #endif
 
 #ifdef CONFIG_ARCH_MXC91231
 #ifdef UART_PADDR
 #error "CONFIG_DEBUG_LL is incompatible with multiple archs"
 #endif
-#include <mach/mxc91231.h>
 #define UART_PADDR	MXC91231_UART2_BASE_ADDR
-#define UART_VADDR	MXC91231_IO_ADDRESS(MXC91231_UART2_BASE_ADDR)
 #endif
+
+#define UART_VADDR	IMX_IO_ADDRESS(UART_PADDR)
+
 		.macro	addruart, rx, tmp
 		mrc	p15, 0, \rx, c1, c0
 		tst	\rx, #1			@ MMU enabled?
diff --git a/arch/arm/plat-mxc/include/mach/mx25.h b/arch/arm/plat-mxc/include/mach/mx25.h
index aac6a9c..a2404b0 100644
--- a/arch/arm/plat-mxc/include/mach/mx25.h
+++ b/arch/arm/plat-mxc/include/mach/mx25.h
@@ -2,7 +2,6 @@
 #define __MACH_MX25_H__
 
 #define MX25_AIPS1_BASE_ADDR		0x43f00000
-#define MX25_AIPS1_BASE_ADDR_VIRT	0xf5300000
 #define MX25_AIPS1_SIZE			SZ_1M
 #define MX25_AIPS2_BASE_ADDR		0x53f00000
 #define MX25_AIPS2_SIZE			SZ_1M
@@ -25,9 +24,6 @@
 #define MX25_GPIO2_BASE_ADDR		(MX25_AIPS2_BASE_ADDR + 0xd0000)
 #define MX25_WDOG_BASE_ADDR		(MX25_AIPS2_BASE_ADDR + 0xdc000)
 
-#define MX25_AIPS1_IO_ADDRESS(x) \
-	(((x) - MX25_AIPS1_BASE_ADDR) + MX25_AIPS1_BASE_ADDR_VIRT)
-
 #define MX25_UART1_BASE_ADDR		0x43f90000
 #define MX25_UART2_BASE_ADDR		0x43f94000
 #define MX25_AUDMUX_BASE_ADDR		0x43fb0000
diff --git a/arch/arm/plat-mxc/include/mach/mx2x.h b/arch/arm/plat-mxc/include/mach/mx2x.h
index 46eeeb2..a056948 100644
--- a/arch/arm/plat-mxc/include/mach/mx2x.h
+++ b/arch/arm/plat-mxc/include/mach/mx2x.h
@@ -27,7 +27,6 @@
 
 /* Register offsets */
 #define MX2x_AIPI_BASE_ADDR		0x10000000
-#define MX2x_AIPI_BASE_ADDR_VIRT	0xf4400000
 #define MX2x_AIPI_SIZE			SZ_1M
 #define MX2x_DMA_BASE_ADDR			(MX2x_AIPI_BASE_ADDR + 0x01000)
 #define MX2x_WDOG_BASE_ADDR			(MX2x_AIPI_BASE_ADDR + 0x02000)
@@ -68,9 +67,6 @@
 #define MX2x_SAHB1_SIZE			SZ_1M
 #define MX2x_CSI_BASE_ADDR			(MX2x_SAHB1_BASE_ADDR + 0x0000)
 
-#define AIPI_IO_ADDRESS(x)	\
-	(((x) - AIPI_BASE_ADDR) + AIPI_BASE_ADDR_VIRT)
-
 /* fixed interrupt numbers */
 #define MX2x_INT_CSPI3		6
 #define MX2x_INT_GPIO		8
@@ -148,7 +144,6 @@
 #ifdef IMX_NEEDS_DEPRECATED_SYMBOLS
 /* these should go away */
 #define AIPI_BASE_ADDR MX2x_AIPI_BASE_ADDR
-#define AIPI_BASE_ADDR_VIRT MX2x_AIPI_BASE_ADDR_VIRT
 #define AIPI_SIZE MX2x_AIPI_SIZE
 #define DMA_BASE_ADDR MX2x_DMA_BASE_ADDR
 #define WDOG_BASE_ADDR MX2x_WDOG_BASE_ADDR
diff --git a/arch/arm/plat-mxc/include/mach/mx3x.h b/arch/arm/plat-mxc/include/mach/mx3x.h
index da22cd4..3d6cc45 100644
--- a/arch/arm/plat-mxc/include/mach/mx3x.h
+++ b/arch/arm/plat-mxc/include/mach/mx3x.h
@@ -44,7 +44,6 @@
  * AIPS 1
  */
 #define MX3x_AIPS1_BASE_ADDR		0x43f00000
-#define MX3x_AIPS1_BASE_ADDR_VIRT	0xf5300000
 #define MX3x_AIPS1_SIZE			SZ_1M
 #define MX3x_MAX_BASE_ADDR			(MX3x_AIPS1_BASE_ADDR + 0x04000)
 #define MX3x_EVTMON_BASE_ADDR			(MX3x_AIPS1_BASE_ADDR + 0x08000)
@@ -141,9 +140,6 @@
 
 #define MX3x_PCMCIA_MEM_BASE_ADDR	0xbc000000
 
-#define AIPS1_IO_ADDRESS(x)  \
-	(((x) - AIPS1_BASE_ADDR) + AIPS1_BASE_ADDR_VIRT)
-
 /*
  * Interrupt numbers
  */
@@ -230,7 +226,6 @@ static inline int mx35_revision(void)
 #define L2CC_BASE_ADDR MX3x_L2CC_BASE_ADDR
 #define L2CC_SIZE MX3x_L2CC_SIZE
 #define AIPS1_BASE_ADDR MX3x_AIPS1_BASE_ADDR
-#define AIPS1_BASE_ADDR_VIRT MX3x_AIPS1_BASE_ADDR_VIRT
 #define AIPS1_SIZE MX3x_AIPS1_SIZE
 #define MAX_BASE_ADDR MX3x_MAX_BASE_ADDR
 #define EVTMON_BASE_ADDR MX3x_EVTMON_BASE_ADDR
diff --git a/arch/arm/plat-mxc/include/mach/mx51.h b/arch/arm/plat-mxc/include/mach/mx51.h
index 1b8715f..636347c 100644
--- a/arch/arm/plat-mxc/include/mach/mx51.h
+++ b/arch/arm/plat-mxc/include/mach/mx51.h
@@ -53,7 +53,6 @@
  * AIPS 1
  */
 #define MX51_AIPS1_BASE_ADDR		0x73f00000
-#define MX51_AIPS1_BASE_ADDR_VIRT	0xf5700000
 #define MX51_AIPS1_SIZE			SZ_1M
 
 #define MX51_OTG_BASE_ADDR		(MX51_AIPS1_BASE_ADDR + 0x80000)
@@ -137,10 +136,6 @@
 #define MX51_IO_P2V(x)			IMX_IO_P2V(x)
 #define MX51_IO_ADDRESS(x)		IOMEM(MX51_IO_P2V(x))
 
-/* This is currently used in <mach/debug-macro.S>, but should go away */
-#define MX51_AIPS1_IO_ADDRESS(x)  \
-	(((x) - MX51_AIPS1_BASE_ADDR) + MX51_AIPS1_BASE_ADDR_VIRT)
-
 /*
  * defines for SPBA modules
  */
-- 
1.7.2.3

[PATCH 6/7] imx/debug-macro: rework using the new io mapping macro

[Uwe Kleine-König]

On Tue, Oct 26, 2010 at 10:49:55AM +0200, Uwe Kleine-K?nig wrote:
> This gets rid of the last user of IMX_NEEDS_DEPRECATED_SYMBOLS.
> 
> Signed-off-by: Uwe Kleine-K?nig <u.kleine-koenig@pengutronix.de>
> ---
>  arch/arm/plat-mxc/include/mach/debug-macro.S |   23 +++++++----------------
>  arch/arm/plat-mxc/include/mach/mx25.h        |    4 ----
>  arch/arm/plat-mxc/include/mach/mx2x.h        |    5 -----
>  arch/arm/plat-mxc/include/mach/mx3x.h        |    5 -----
>  arch/arm/plat-mxc/include/mach/mx51.h        |    5 -----
>  5 files changed, 7 insertions(+), 35 deletions(-)
Note this patch conflicts with

	0ea1293 (arm: return both physical and virtual addresses from addruart)

But it's easy to resolve.  If (and when) we agree that we want to change
the io mapping I can provide an up to date patch if need be.

Best regards
Uwe

-- 
Pengutronix e.K.                           | Uwe Kleine-K?nig            |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |

[PATCH 7/7] imx: remove deprecated symbols as all users are gone now

[Uwe Kleine-König]

Signed-off-by: Uwe Kleine-K?nig <u.kleine-koenig@pengutronix.de>
---
 arch/arm/plat-mxc/include/mach/mx1.h  |  127 ---------------------------------
 arch/arm/plat-mxc/include/mach/mx21.h |   34 ---------
 arch/arm/plat-mxc/include/mach/mx27.h |   69 ------------------
 arch/arm/plat-mxc/include/mach/mx2x.h |  112 -----------------------------
 arch/arm/plat-mxc/include/mach/mx31.h |   32 --------
 arch/arm/plat-mxc/include/mach/mx35.h |   16 ----
 arch/arm/plat-mxc/include/mach/mx3x.h |  114 -----------------------------
 7 files changed, 0 insertions(+), 504 deletions(-)

diff --git a/arch/arm/plat-mxc/include/mach/mx1.h b/arch/arm/plat-mxc/include/mach/mx1.h
index 6541798..ed2fb91 100644
--- a/arch/arm/plat-mxc/include/mach/mx1.h
+++ b/arch/arm/plat-mxc/include/mach/mx1.h
@@ -165,131 +165,4 @@
  */
 #define USBD_INT0		MX1_USBD_INT0
 
-#ifdef IMX_NEEDS_DEPRECATED_SYMBOLS
-/* these should go away */
-#define IMX_IO_PHYS MX1_IO_BASE_ADDR
-#define IMX_IO_SIZE MX1_IO_SIZE
-#define IMX_CS0_PHYS MX1_CS0_PHYS
-#define IMX_CS0_SIZE MX1_CS0_SIZE
-#define IMX_CS1_PHYS MX1_CS1_PHYS
-#define IMX_CS1_SIZE MX1_CS1_SIZE
-#define IMX_CS2_PHYS MX1_CS2_PHYS
-#define IMX_CS2_SIZE MX1_CS2_SIZE
-#define IMX_CS3_PHYS MX1_CS3_PHYS
-#define IMX_CS3_SIZE MX1_CS3_SIZE
-#define IMX_CS4_PHYS MX1_CS4_PHYS
-#define IMX_CS4_SIZE MX1_CS4_SIZE
-#define IMX_CS5_PHYS MX1_CS5_PHYS
-#define IMX_CS5_SIZE MX1_CS5_SIZE
-#define AIPI1_BASE_ADDR MX1_AIPI1_BASE_ADDR
-#define WDT_BASE_ADDR MX1_WDT_BASE_ADDR
-#define TIM1_BASE_ADDR MX1_TIM1_BASE_ADDR
-#define TIM2_BASE_ADDR MX1_TIM2_BASE_ADDR
-#define RTC_BASE_ADDR MX1_RTC_BASE_ADDR
-#define LCDC_BASE_ADDR MX1_LCDC_BASE_ADDR
-#define UART1_BASE_ADDR MX1_UART1_BASE_ADDR
-#define UART2_BASE_ADDR MX1_UART2_BASE_ADDR
-#define PWM_BASE_ADDR MX1_PWM_BASE_ADDR
-#define DMA_BASE_ADDR MX1_DMA_BASE_ADDR
-#define AIPI2_BASE_ADDR MX1_AIPI2_BASE_ADDR
-#define SIM_BASE_ADDR MX1_SIM_BASE_ADDR
-#define USBD_BASE_ADDR MX1_USBD_BASE_ADDR
-#define SPI1_BASE_ADDR MX1_SPI1_BASE_ADDR
-#define MMC_BASE_ADDR MX1_MMC_BASE_ADDR
-#define ASP_BASE_ADDR MX1_ASP_BASE_ADDR
-#define BTA_BASE_ADDR MX1_BTA_BASE_ADDR
-#define I2C_BASE_ADDR MX1_I2C_BASE_ADDR
-#define SSI_BASE_ADDR MX1_SSI_BASE_ADDR
-#define SPI2_BASE_ADDR MX1_SPI2_BASE_ADDR
-#define MSHC_BASE_ADDR MX1_MSHC_BASE_ADDR
-#define CCM_BASE_ADDR MX1_CCM_BASE_ADDR
-#define SCM_BASE_ADDR MX1_SCM_BASE_ADDR
-#define GPIO_BASE_ADDR MX1_GPIO_BASE_ADDR
-#define EIM_BASE_ADDR MX1_EIM_BASE_ADDR
-#define SDRAMC_BASE_ADDR MX1_SDRAMC_BASE_ADDR
-#define MMA_BASE_ADDR MX1_MMA_BASE_ADDR
-#define AVIC_BASE_ADDR MX1_AVIC_BASE_ADDR
-#define CSI_BASE_ADDR MX1_CSI_BASE_ADDR
-#define IO_ADDRESS(x) MX1_IO_ADDRESS(x)
-#define AVIC_IO_ADDRESS(x) IO_ADDRESS(x)
-#define INT_SOFTINT MX1_INT_SOFTINT
-#define CSI_INT MX1_CSI_INT
-#define DSPA_MAC_INT MX1_DSPA_MAC_INT
-#define DSPA_INT MX1_DSPA_INT
-#define COMP_INT MX1_COMP_INT
-#define MSHC_XINT MX1_MSHC_XINT
-#define GPIO_INT_PORTA MX1_GPIO_INT_PORTA
-#define GPIO_INT_PORTB MX1_GPIO_INT_PORTB
-#define GPIO_INT_PORTC MX1_GPIO_INT_PORTC
-#define LCDC_INT MX1_LCDC_INT
-#define SIM_INT MX1_SIM_INT
-#define SIM_DATA_INT MX1_SIM_DATA_INT
-#define RTC_INT MX1_RTC_INT
-#define RTC_SAMINT MX1_RTC_SAMINT
-#define UART2_MINT_PFERR MX1_UART2_MINT_PFERR
-#define UART2_MINT_RTS MX1_UART2_MINT_RTS
-#define UART2_MINT_DTR MX1_UART2_MINT_DTR
-#define UART2_MINT_UARTC MX1_UART2_MINT_UARTC
-#define UART2_MINT_TX MX1_UART2_MINT_TX
-#define UART2_MINT_RX MX1_UART2_MINT_RX
-#define UART1_MINT_PFERR MX1_UART1_MINT_PFERR
-#define UART1_MINT_RTS MX1_UART1_MINT_RTS
-#define UART1_MINT_DTR MX1_UART1_MINT_DTR
-#define UART1_MINT_UARTC MX1_UART1_MINT_UARTC
-#define UART1_MINT_TX MX1_UART1_MINT_TX
-#define UART1_MINT_RX MX1_UART1_MINT_RX
-#define VOICE_DAC_INT MX1_VOICE_DAC_INT
-#define VOICE_ADC_INT MX1_VOICE_ADC_INT
-#define PEN_DATA_INT MX1_PEN_DATA_INT
-#define PWM_INT MX1_PWM_INT
-#define SDHC_INT MX1_SDHC_INT
-#define I2C_INT MX1_INT_I2C
-#define CSPI_INT MX1_CSPI_INT
-#define SSI_TX_INT MX1_SSI_TX_INT
-#define SSI_TX_ERR_INT MX1_SSI_TX_ERR_INT
-#define SSI_RX_INT MX1_SSI_RX_INT
-#define SSI_RX_ERR_INT MX1_SSI_RX_ERR_INT
-#define TOUCH_INT MX1_TOUCH_INT
-#define USBD_INT1 MX1_USBD_INT1
-#define USBD_INT2 MX1_USBD_INT2
-#define USBD_INT3 MX1_USBD_INT3
-#define USBD_INT4 MX1_USBD_INT4
-#define USBD_INT5 MX1_USBD_INT5
-#define USBD_INT6 MX1_USBD_INT6
-#define BTSYS_INT MX1_BTSYS_INT
-#define BTTIM_INT MX1_BTTIM_INT
-#define BTWUI_INT MX1_BTWUI_INT
-#define TIM2_INT MX1_TIM2_INT
-#define TIM1_INT MX1_TIM1_INT
-#define DMA_ERR MX1_DMA_ERR
-#define DMA_INT MX1_DMA_INT
-#define GPIO_INT_PORTD MX1_GPIO_INT_PORTD
-#define WDT_INT MX1_WDT_INT
-#define DMA_REQ_UART3_T MX1_DMA_REQ_UART3_T
-#define DMA_REQ_UART3_R MX1_DMA_REQ_UART3_R
-#define DMA_REQ_SSI2_T MX1_DMA_REQ_SSI2_T
-#define DMA_REQ_SSI2_R MX1_DMA_REQ_SSI2_R
-#define DMA_REQ_CSI_STAT MX1_DMA_REQ_CSI_STAT
-#define DMA_REQ_CSI_R MX1_DMA_REQ_CSI_R
-#define DMA_REQ_MSHC MX1_DMA_REQ_MSHC
-#define DMA_REQ_DSPA_DCT_DOUT MX1_DMA_REQ_DSPA_DCT_DOUT
-#define DMA_REQ_DSPA_DCT_DIN MX1_DMA_REQ_DSPA_DCT_DIN
-#define DMA_REQ_DSPA_MAC MX1_DMA_REQ_DSPA_MAC
-#define DMA_REQ_EXT MX1_DMA_REQ_EXT
-#define DMA_REQ_SDHC MX1_DMA_REQ_SDHC
-#define DMA_REQ_SPI1_R MX1_DMA_REQ_SPI1_R
-#define DMA_REQ_SPI1_T MX1_DMA_REQ_SPI1_T
-#define DMA_REQ_SSI_T MX1_DMA_REQ_SSI_T
-#define DMA_REQ_SSI_R MX1_DMA_REQ_SSI_R
-#define DMA_REQ_ASP_DAC MX1_DMA_REQ_ASP_DAC
-#define DMA_REQ_ASP_ADC MX1_DMA_REQ_ASP_ADC
-#define DMA_REQ_USP_EP(x) MX1_DMA_REQ_USP_EP(x)
-#define DMA_REQ_SPI2_R MX1_DMA_REQ_SPI2_R
-#define DMA_REQ_SPI2_T MX1_DMA_REQ_SPI2_T
-#define DMA_REQ_UART2_T MX1_DMA_REQ_UART2_T
-#define DMA_REQ_UART2_R MX1_DMA_REQ_UART2_R
-#define DMA_REQ_UART1_T MX1_DMA_REQ_UART1_T
-#define DMA_REQ_UART1_R MX1_DMA_REQ_UART1_R
-#endif /* ifdef IMX_NEEDS_DEPRECATED_SYMBOLS */
-
 #endif /* ifndef __MACH_MX1_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/mx21.h b/arch/arm/plat-mxc/include/mach/mx21.h
index b417e32..a82f590 100644
--- a/arch/arm/plat-mxc/include/mach/mx21.h
+++ b/arch/arm/plat-mxc/include/mach/mx21.h
@@ -179,38 +179,4 @@
 #define MX21_DMA_REQ_CSI_STAT	30
 #define MX21_DMA_REQ_CSI_RX	31
 
-#ifdef IMX_NEEDS_DEPRECATED_SYMBOLS
-/* these should go away */
-#define SDRAM_BASE_ADDR MX21_SDRAM_BASE_ADDR
-#define CSD1_BASE_ADDR MX21_CSD1_BASE_ADDR
-#define CS0_BASE_ADDR MX21_CS0_BASE_ADDR
-#define CS1_BASE_ADDR MX21_CS1_BASE_ADDR
-#define CS2_BASE_ADDR MX21_CS2_BASE_ADDR
-#define CS3_BASE_ADDR MX21_CS3_BASE_ADDR
-#define CS4_BASE_ADDR MX21_CS4_BASE_ADDR
-#define PCMCIA_MEM_BASE_ADDR MX21_PCMCIA_MEM_BASE_ADDR
-#define CS5_BASE_ADDR MX21_CS5_BASE_ADDR
-#define X_MEMC_BASE_ADDR MX21_X_MEMC_BASE_ADDR
-#define X_MEMC_SIZE MX21_X_MEMC_SIZE
-#define SDRAMC_BASE_ADDR MX21_SDRAMC_BASE_ADDR
-#define EIM_BASE_ADDR MX21_EIM_BASE_ADDR
-#define PCMCIA_CTL_BASE_ADDR MX21_PCMCIA_CTL_BASE_ADDR
-#define NFC_BASE_ADDR MX21_NFC_BASE_ADDR
-#define IRAM_BASE_ADDR MX21_IRAM_BASE_ADDR
-#define MXC_INT_FIRI MX21_INT_FIRI
-#define MXC_INT_BMI MX21_INT_BMI
-#define MXC_INT_EMMAENC MX21_INT_EMMAENC
-#define MXC_INT_EMMADEC MX21_INT_EMMADEC
-#define MXC_INT_USBWKUP MX21_INT_USBWKUP
-#define MXC_INT_USBDMA MX21_INT_USBDMA
-#define MXC_INT_USBHOST MX21_INT_USBHOST
-#define MXC_INT_USBFUNC MX21_INT_USBFUNC
-#define MXC_INT_USBMNP MX21_INT_USBMNP
-#define MXC_INT_USBCTRL MX21_INT_USBCTRL
-#define MXC_INT_USBCTRL MX21_INT_USBCTRL
-#define DMA_REQ_FIRI_RX MX21_DMA_REQ_FIRI_RX
-#define DMA_REQ_BMI_TX MX21_DMA_REQ_BMI_TX
-#define DMA_REQ_BMI_RX MX21_DMA_REQ_BMI_RX
-#endif
-
 #endif /* ifndef __MACH_MX21_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/mx27.h b/arch/arm/plat-mxc/include/mach/mx27.h
index e817289..3116b3b 100644
--- a/arch/arm/plat-mxc/include/mach/mx27.h
+++ b/arch/arm/plat-mxc/include/mach/mx27.h
@@ -244,73 +244,4 @@ static inline void mx27_setup_weimcs(size_t cs,
 extern int mx27_revision(void);
 #endif
 
-#ifdef IMX_NEEDS_DEPRECATED_SYMBOLS
-/* these should go away */
-#define MSHC_BASE_ADDR MX27_MSHC_BASE_ADDR
-#define GPT5_BASE_ADDR MX27_GPT5_BASE_ADDR
-#define GPT4_BASE_ADDR MX27_GPT4_BASE_ADDR
-#define UART5_BASE_ADDR MX27_UART5_BASE_ADDR
-#define UART6_BASE_ADDR MX27_UART6_BASE_ADDR
-#define I2C2_BASE_ADDR MX27_I2C2_BASE_ADDR
-#define SDHC3_BASE_ADDR MX27_SDHC3_BASE_ADDR
-#define GPT6_BASE_ADDR MX27_GPT6_BASE_ADDR
-#define VPU_BASE_ADDR MX27_VPU_BASE_ADDR
-#define OTG_BASE_ADDR MX27_OTG_BASE_ADDR
-#define SAHARA_BASE_ADDR MX27_SAHARA_BASE_ADDR
-#define IIM_BASE_ADDR MX27_IIM_BASE_ADDR
-#define RTIC_BASE_ADDR MX27_RTIC_BASE_ADDR
-#define FEC_BASE_ADDR MX27_FEC_BASE_ADDR
-#define SCC_BASE_ADDR MX27_SCC_BASE_ADDR
-#define ETB_BASE_ADDR MX27_ETB_BASE_ADDR
-#define ETB_RAM_BASE_ADDR MX27_ETB_RAM_BASE_ADDR
-#define ROMP_BASE_ADDR MX27_ROMP_BASE_ADDR
-#define ATA_BASE_ADDR MX27_ATA_BASE_ADDR
-#define SDRAM_BASE_ADDR MX27_SDRAM_BASE_ADDR
-#define CSD1_BASE_ADDR MX27_CSD1_BASE_ADDR
-#define CS0_BASE_ADDR MX27_CS0_BASE_ADDR
-#define CS1_BASE_ADDR MX27_CS1_BASE_ADDR
-#define CS2_BASE_ADDR MX27_CS2_BASE_ADDR
-#define CS3_BASE_ADDR MX27_CS3_BASE_ADDR
-#define CS4_BASE_ADDR MX27_CS4_BASE_ADDR
-#define CS5_BASE_ADDR MX27_CS5_BASE_ADDR
-#define X_MEMC_BASE_ADDR MX27_X_MEMC_BASE_ADDR
-#define X_MEMC_SIZE MX27_X_MEMC_SIZE
-#define NFC_BASE_ADDR MX27_NFC_BASE_ADDR
-#define SDRAMC_BASE_ADDR MX27_SDRAMC_BASE_ADDR
-#define WEIM_BASE_ADDR MX27_WEIM_BASE_ADDR
-#define M3IF_BASE_ADDR MX27_M3IF_BASE_ADDR
-#define PCMCIA_CTL_BASE_ADDR MX27_PCMCIA_CTL_BASE_ADDR
-#define PCMCIA_MEM_BASE_ADDR MX27_PCMCIA_MEM_BASE_ADDR
-#define IRAM_BASE_ADDR MX27_IRAM_BASE_ADDR
-#define MXC_INT_I2C2 MX27_INT_I2C2
-#define MXC_INT_GPT6 MX27_INT_GPT6
-#define MXC_INT_GPT5 MX27_INT_GPT5
-#define MXC_INT_GPT4 MX27_INT_GPT4
-#define MXC_INT_RTIC MX27_INT_RTIC
-#define MXC_INT_SDHC MX27_INT_SDHC
-#define MXC_INT_SDHC3 MX27_INT_SDHC3
-#define MXC_INT_ATA MX27_INT_ATA
-#define MXC_INT_UART6 MX27_INT_UART6
-#define MXC_INT_UART5 MX27_INT_UART5
-#define MXC_INT_FEC MX27_INT_FEC
-#define MXC_INT_VPU MX27_INT_VPU
-#define MXC_INT_USB1 MX27_INT_USB1
-#define MXC_INT_USB2 MX27_INT_USB2
-#define MXC_INT_USB3 MX27_INT_USB3
-#define MXC_INT_SCC_SMN MX27_INT_SCC_SMN
-#define MXC_INT_SCC_SCM MX27_INT_SCC_SCM
-#define MXC_INT_SAHARA MX27_INT_SAHARA
-#define MXC_INT_IIM MX27_INT_IIM
-#define MXC_INT_CCM MX27_INT_CCM
-#define DMA_REQ_MSHC MX27_DMA_REQ_MSHC
-#define DMA_REQ_ATA_TX MX27_DMA_REQ_ATA_TX
-#define DMA_REQ_ATA_RCV MX27_DMA_REQ_ATA_RCV
-#define DMA_REQ_UART5_TX MX27_DMA_REQ_UART5_TX
-#define DMA_REQ_UART5_RX MX27_DMA_REQ_UART5_RX
-#define DMA_REQ_UART6_TX MX27_DMA_REQ_UART6_TX
-#define DMA_REQ_UART6_RX MX27_DMA_REQ_UART6_RX
-#define DMA_REQ_SDHC3 MX27_DMA_REQ_SDHC3
-#define DMA_REQ_NFC MX27_DMA_REQ_NFC
-#endif
-
 #endif /* ifndef __MACH_MX27_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/mx2x.h b/arch/arm/plat-mxc/include/mach/mx2x.h
index a056948..6d07839 100644
--- a/arch/arm/plat-mxc/include/mach/mx2x.h
+++ b/arch/arm/plat-mxc/include/mach/mx2x.h
@@ -141,116 +141,4 @@
 #define MX2x_DMA_REQ_CSI_STAT	30
 #define MX2x_DMA_REQ_CSI_RX	31
 
-#ifdef IMX_NEEDS_DEPRECATED_SYMBOLS
-/* these should go away */
-#define AIPI_BASE_ADDR MX2x_AIPI_BASE_ADDR
-#define AIPI_SIZE MX2x_AIPI_SIZE
-#define DMA_BASE_ADDR MX2x_DMA_BASE_ADDR
-#define WDOG_BASE_ADDR MX2x_WDOG_BASE_ADDR
-#define GPT1_BASE_ADDR MX2x_GPT1_BASE_ADDR
-#define GPT2_BASE_ADDR MX2x_GPT2_BASE_ADDR
-#define GPT3_BASE_ADDR MX2x_GPT3_BASE_ADDR
-#define PWM_BASE_ADDR MX2x_PWM_BASE_ADDR
-#define RTC_BASE_ADDR MX2x_RTC_BASE_ADDR
-#define KPP_BASE_ADDR MX2x_KPP_BASE_ADDR
-#define OWIRE_BASE_ADDR MX2x_OWIRE_BASE_ADDR
-#define UART1_BASE_ADDR MX2x_UART1_BASE_ADDR
-#define UART2_BASE_ADDR MX2x_UART2_BASE_ADDR
-#define UART3_BASE_ADDR MX2x_UART3_BASE_ADDR
-#define UART4_BASE_ADDR MX2x_UART4_BASE_ADDR
-#define CSPI1_BASE_ADDR MX2x_CSPI1_BASE_ADDR
-#define CSPI2_BASE_ADDR MX2x_CSPI2_BASE_ADDR
-#define SSI1_BASE_ADDR MX2x_SSI1_BASE_ADDR
-#define SSI2_BASE_ADDR MX2x_SSI2_BASE_ADDR
-#define I2C_BASE_ADDR MX2x_I2C_BASE_ADDR
-#define SDHC1_BASE_ADDR MX2x_SDHC1_BASE_ADDR
-#define SDHC2_BASE_ADDR MX2x_SDHC2_BASE_ADDR
-#define GPIO_BASE_ADDR MX2x_GPIO_BASE_ADDR
-#define AUDMUX_BASE_ADDR MX2x_AUDMUX_BASE_ADDR
-#define CSPI3_BASE_ADDR MX2x_CSPI3_BASE_ADDR
-#define LCDC_BASE_ADDR MX2x_LCDC_BASE_ADDR
-#define SLCDC_BASE_ADDR MX2x_SLCDC_BASE_ADDR
-#define USBOTG_BASE_ADDR MX2x_USBOTG_BASE_ADDR
-#define EMMA_PP_BASE_ADDR MX2x_EMMA_PP_BASE_ADDR
-#define EMMA_PRP_BASE_ADDR MX2x_EMMA_PRP_BASE_ADDR
-#define CCM_BASE_ADDR MX2x_CCM_BASE_ADDR
-#define SYSCTRL_BASE_ADDR MX2x_SYSCTRL_BASE_ADDR
-#define JAM_BASE_ADDR MX2x_JAM_BASE_ADDR
-#define MAX_BASE_ADDR MX2x_MAX_BASE_ADDR
-#define AVIC_BASE_ADDR MX2x_AVIC_BASE_ADDR
-#define SAHB1_BASE_ADDR MX2x_SAHB1_BASE_ADDR
-#define SAHB1_SIZE MX2x_SAHB1_SIZE
-#define CSI_BASE_ADDR MX2x_CSI_BASE_ADDR
-#define MXC_INT_CSPI3 MX2x_INT_CSPI3
-#define MXC_INT_GPIO MX2x_INT_GPIO
-#define MXC_INT_SDHC2 MX2x_INT_SDHC2
-#define MXC_INT_SDHC1 MX2x_INT_SDHC1
-#define MXC_INT_I2C MX2x_INT_I2C
-#define MXC_INT_SSI2 MX2x_INT_SSI2
-#define MXC_INT_SSI1 MX2x_INT_SSI1
-#define MXC_INT_CSPI2 MX2x_INT_CSPI2
-#define MXC_INT_CSPI1 MX2x_INT_CSPI1
-#define MXC_INT_UART4 MX2x_INT_UART4
-#define MXC_INT_UART3 MX2x_INT_UART3
-#define MXC_INT_UART2 MX2x_INT_UART2
-#define MXC_INT_UART1 MX2x_INT_UART1
-#define MXC_INT_KPP MX2x_INT_KPP
-#define MXC_INT_RTC MX2x_INT_RTC
-#define MXC_INT_PWM MX2x_INT_PWM
-#define MXC_INT_GPT3 MX2x_INT_GPT3
-#define MXC_INT_GPT2 MX2x_INT_GPT2
-#define MXC_INT_GPT1 MX2x_INT_GPT1
-#define MXC_INT_WDOG MX2x_INT_WDOG
-#define MXC_INT_PCMCIA MX2x_INT_PCMCIA
-#define MXC_INT_NANDFC MX2x_INT_NANDFC
-#define MXC_INT_CSI MX2x_INT_CSI
-#define MXC_INT_DMACH0 MX2x_INT_DMACH0
-#define MXC_INT_DMACH1 MX2x_INT_DMACH1
-#define MXC_INT_DMACH2 MX2x_INT_DMACH2
-#define MXC_INT_DMACH3 MX2x_INT_DMACH3
-#define MXC_INT_DMACH4 MX2x_INT_DMACH4
-#define MXC_INT_DMACH5 MX2x_INT_DMACH5
-#define MXC_INT_DMACH6 MX2x_INT_DMACH6
-#define MXC_INT_DMACH7 MX2x_INT_DMACH7
-#define MXC_INT_DMACH8 MX2x_INT_DMACH8
-#define MXC_INT_DMACH9 MX2x_INT_DMACH9
-#define MXC_INT_DMACH10 MX2x_INT_DMACH10
-#define MXC_INT_DMACH11 MX2x_INT_DMACH11
-#define MXC_INT_DMACH12 MX2x_INT_DMACH12
-#define MXC_INT_DMACH13 MX2x_INT_DMACH13
-#define MXC_INT_DMACH14 MX2x_INT_DMACH14
-#define MXC_INT_DMACH15 MX2x_INT_DMACH15
-#define MXC_INT_EMMAPRP MX2x_INT_EMMAPRP
-#define MXC_INT_EMMAPP MX2x_INT_EMMAPP
-#define MXC_INT_SLCDC MX2x_INT_SLCDC
-#define MXC_INT_LCDC MX2x_INT_LCDC
-#define DMA_REQ_CSPI3_RX MX2x_DMA_REQ_CSPI3_RX
-#define DMA_REQ_CSPI3_TX MX2x_DMA_REQ_CSPI3_TX
-#define DMA_REQ_EXT MX2x_DMA_REQ_EXT
-#define DMA_REQ_SDHC2 MX2x_DMA_REQ_SDHC2
-#define DMA_REQ_SDHC1 MX2x_DMA_REQ_SDHC1
-#define DMA_REQ_SSI2_RX0 MX2x_DMA_REQ_SSI2_RX0
-#define DMA_REQ_SSI2_TX0 MX2x_DMA_REQ_SSI2_TX0
-#define DMA_REQ_SSI2_RX1 MX2x_DMA_REQ_SSI2_RX1
-#define DMA_REQ_SSI2_TX1 MX2x_DMA_REQ_SSI2_TX1
-#define DMA_REQ_SSI1_RX0 MX2x_DMA_REQ_SSI1_RX0
-#define DMA_REQ_SSI1_TX0 MX2x_DMA_REQ_SSI1_TX0
-#define DMA_REQ_SSI1_RX1 MX2x_DMA_REQ_SSI1_RX1
-#define DMA_REQ_SSI1_TX1 MX2x_DMA_REQ_SSI1_TX1
-#define DMA_REQ_CSPI2_RX MX2x_DMA_REQ_CSPI2_RX
-#define DMA_REQ_CSPI2_TX MX2x_DMA_REQ_CSPI2_TX
-#define DMA_REQ_CSPI1_RX MX2x_DMA_REQ_CSPI1_RX
-#define DMA_REQ_CSPI1_TX MX2x_DMA_REQ_CSPI1_TX
-#define DMA_REQ_UART4_RX MX2x_DMA_REQ_UART4_RX
-#define DMA_REQ_UART4_TX MX2x_DMA_REQ_UART4_TX
-#define DMA_REQ_UART3_RX MX2x_DMA_REQ_UART3_RX
-#define DMA_REQ_UART3_TX MX2x_DMA_REQ_UART3_TX
-#define DMA_REQ_UART2_RX MX2x_DMA_REQ_UART2_RX
-#define DMA_REQ_UART2_TX MX2x_DMA_REQ_UART2_TX
-#define DMA_REQ_UART1_RX MX2x_DMA_REQ_UART1_RX
-#define DMA_REQ_UART1_TX MX2x_DMA_REQ_UART1_TX
-#define DMA_REQ_CSI_STAT MX2x_DMA_REQ_CSI_STAT
-#define DMA_REQ_CSI_RX MX2x_DMA_REQ_CSI_RX
-#endif
-
 #endif /* ifndef __MACH_MX2x_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/mx31.h b/arch/arm/plat-mxc/include/mach/mx31.h
index 9ed9975..6d4b98f 100644
--- a/arch/arm/plat-mxc/include/mach/mx31.h
+++ b/arch/arm/plat-mxc/include/mach/mx31.h
@@ -215,36 +215,4 @@ static inline void mx31_setup_weimcs(size_t cs,
 #define MX31_SYSTEM_REV_MIN		MX31_CHIP_REV_1_0
 #define MX31_SYSTEM_REV_NUM		3
 
-#ifdef IMX_NEEDS_DEPRECATED_SYMBOLS
-/* these should go away */
-#define ATA_BASE_ADDR MX31_ATA_BASE_ADDR
-#define UART4_BASE_ADDR MX31_UART4_BASE_ADDR
-#define UART5_BASE_ADDR MX31_UART5_BASE_ADDR
-#define MMC_SDHC1_BASE_ADDR MX31_MMC_SDHC1_BASE_ADDR
-#define MMC_SDHC2_BASE_ADDR MX31_MMC_SDHC2_BASE_ADDR
-#define SIM1_BASE_ADDR MX31_SIM1_BASE_ADDR
-#define IIM_BASE_ADDR MX31_IIM_BASE_ADDR
-#define CSPI3_BASE_ADDR MX31_CSPI3_BASE_ADDR
-#define FIRI_BASE_ADDR MX31_FIRI_BASE_ADDR
-#define SCM_BASE_ADDR MX31_SCM_BASE_ADDR
-#define SMN_BASE_ADDR MX31_SMN_BASE_ADDR
-#define MPEG4_ENC_BASE_ADDR MX31_MPEG4_ENC_BASE_ADDR
-#define MXC_INT_MPEG4_ENCODER MX31_INT_MPEG4_ENCODER
-#define MXC_INT_FIRI MX31_INT_FIRI
-#define MXC_INT_MBX MX31_INT_MBX
-#define MXC_INT_CSPI3 MX31_INT_CSPI3
-#define MXC_INT_SIM2 MX31_INT_SIM2
-#define MXC_INT_SIM1 MX31_INT_SIM1
-#define MXC_INT_CCM_DVFS MX31_INT_CCM_DVFS
-#define MXC_INT_USB1 MX31_INT_USB1
-#define MXC_INT_USB2 MX31_INT_USB2
-#define MXC_INT_USB3 MX31_INT_USB3
-#define MXC_INT_USB4 MX31_INT_USB4
-#define MXC_INT_MSHC2 MX31_INT_MSHC2
-#define MXC_INT_UART4 MX31_INT_UART4
-#define MXC_INT_UART5 MX31_INT_UART5
-#define MXC_INT_CCM MX31_INT_CCM
-#define MXC_INT_PCMCIA MX31_INT_PCMCIA
-#endif
-
 #endif /* ifndef __MACH_MX31_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/mx35.h b/arch/arm/plat-mxc/include/mach/mx35.h
index 3678ca3..9067225 100644
--- a/arch/arm/plat-mxc/include/mach/mx35.h
+++ b/arch/arm/plat-mxc/include/mach/mx35.h
@@ -183,20 +183,4 @@
 #define MX35_SYSTEM_REV_MIN		MX3x_CHIP_REV_1_0
 #define MX35_SYSTEM_REV_NUM		3
 
-#ifdef IMX_NEEDS_DEPRECATED_SYMBOLS
-/* these should go away */
-#define MXC_FEC_BASE_ADDR MX35_FEC_BASE_ADDR
-#define MXC_INT_OWIRE MX35_INT_OWIRE
-#define MXC_INT_GPU2D MX35_INT_GPU2D
-#define MXC_INT_ASRC MX35_INT_ASRC
-#define MXC_INT_USBHS MX35_INT_USBHS
-#define MXC_INT_USBOTG MX35_INT_USBOTG
-#define MXC_INT_ESAI MX35_INT_ESAI
-#define MXC_INT_CAN1 MX35_INT_CAN1
-#define MXC_INT_CAN2 MX35_INT_CAN2
-#define MXC_INT_MLB MX35_INT_MLB
-#define MXC_INT_SPDIF MX35_INT_SPDIF
-#define MXC_INT_FEC MX35_INT_FEC
-#endif
-
 #endif /* ifndef __MACH_MX35_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/mx3x.h b/arch/arm/plat-mxc/include/mach/mx3x.h
index 3d6cc45..8c7f34e 100644
--- a/arch/arm/plat-mxc/include/mach/mx3x.h
+++ b/arch/arm/plat-mxc/include/mach/mx3x.h
@@ -221,118 +221,4 @@ static inline int mx35_revision(void)
 }
 #endif
 
-#ifdef IMX_NEEDS_DEPRECATED_SYMBOLS
-/* these should go away */
-#define L2CC_BASE_ADDR MX3x_L2CC_BASE_ADDR
-#define L2CC_SIZE MX3x_L2CC_SIZE
-#define AIPS1_BASE_ADDR MX3x_AIPS1_BASE_ADDR
-#define AIPS1_SIZE MX3x_AIPS1_SIZE
-#define MAX_BASE_ADDR MX3x_MAX_BASE_ADDR
-#define EVTMON_BASE_ADDR MX3x_EVTMON_BASE_ADDR
-#define CLKCTL_BASE_ADDR MX3x_CLKCTL_BASE_ADDR
-#define ETB_SLOT4_BASE_ADDR MX3x_ETB_SLOT4_BASE_ADDR
-#define ETB_SLOT5_BASE_ADDR MX3x_ETB_SLOT5_BASE_ADDR
-#define ECT_CTIO_BASE_ADDR MX3x_ECT_CTIO_BASE_ADDR
-#define I2C_BASE_ADDR MX3x_I2C_BASE_ADDR
-#define I2C3_BASE_ADDR MX3x_I2C3_BASE_ADDR
-#define UART1_BASE_ADDR MX3x_UART1_BASE_ADDR
-#define UART2_BASE_ADDR MX3x_UART2_BASE_ADDR
-#define I2C2_BASE_ADDR MX3x_I2C2_BASE_ADDR
-#define OWIRE_BASE_ADDR MX3x_OWIRE_BASE_ADDR
-#define SSI1_BASE_ADDR MX3x_SSI1_BASE_ADDR
-#define CSPI1_BASE_ADDR MX3x_CSPI1_BASE_ADDR
-#define KPP_BASE_ADDR MX3x_KPP_BASE_ADDR
-#define IOMUXC_BASE_ADDR MX3x_IOMUXC_BASE_ADDR
-#define ECT_IP1_BASE_ADDR MX3x_ECT_IP1_BASE_ADDR
-#define ECT_IP2_BASE_ADDR MX3x_ECT_IP2_BASE_ADDR
-#define SPBA0_BASE_ADDR MX3x_SPBA0_BASE_ADDR
-#define SPBA0_SIZE MX3x_SPBA0_SIZE
-#define UART3_BASE_ADDR MX3x_UART3_BASE_ADDR
-#define CSPI2_BASE_ADDR MX3x_CSPI2_BASE_ADDR
-#define SSI2_BASE_ADDR MX3x_SSI2_BASE_ADDR
-#define ATA_DMA_BASE_ADDR MX3x_ATA_DMA_BASE_ADDR
-#define MSHC1_BASE_ADDR MX3x_MSHC1_BASE_ADDR
-#define SPBA_CTRL_BASE_ADDR MX3x_SPBA_CTRL_BASE_ADDR
-#define AIPS2_BASE_ADDR MX3x_AIPS2_BASE_ADDR
-#define AIPS2_SIZE MX3x_AIPS2_SIZE
-#define CCM_BASE_ADDR MX3x_CCM_BASE_ADDR
-#define GPT1_BASE_ADDR MX3x_GPT1_BASE_ADDR
-#define EPIT1_BASE_ADDR MX3x_EPIT1_BASE_ADDR
-#define EPIT2_BASE_ADDR MX3x_EPIT2_BASE_ADDR
-#define GPIO3_BASE_ADDR MX3x_GPIO3_BASE_ADDR
-#define SCC_BASE_ADDR MX3x_SCC_BASE_ADDR
-#define RNGA_BASE_ADDR MX3x_RNGA_BASE_ADDR
-#define IPU_CTRL_BASE_ADDR MX3x_IPU_CTRL_BASE_ADDR
-#define AUDMUX_BASE_ADDR MX3x_AUDMUX_BASE_ADDR
-#define GPIO1_BASE_ADDR MX3x_GPIO1_BASE_ADDR
-#define GPIO2_BASE_ADDR MX3x_GPIO2_BASE_ADDR
-#define SDMA_BASE_ADDR MX3x_SDMA_BASE_ADDR
-#define RTC_BASE_ADDR MX3x_RTC_BASE_ADDR
-#define WDOG_BASE_ADDR MX3x_WDOG_BASE_ADDR
-#define PWM_BASE_ADDR MX3x_PWM_BASE_ADDR
-#define RTIC_BASE_ADDR MX3x_RTIC_BASE_ADDR
-#define ROMP_BASE_ADDR MX3x_ROMP_BASE_ADDR
-#define ROMP_SIZE MX3x_ROMP_SIZE
-#define AVIC_BASE_ADDR MX3x_AVIC_BASE_ADDR
-#define AVIC_SIZE MX3x_AVIC_SIZE
-#define IPU_MEM_BASE_ADDR MX3x_IPU_MEM_BASE_ADDR
-#define CSD0_BASE_ADDR MX3x_CSD0_BASE_ADDR
-#define CSD1_BASE_ADDR MX3x_CSD1_BASE_ADDR
-#define CS0_BASE_ADDR MX3x_CS0_BASE_ADDR
-#define CS1_BASE_ADDR MX3x_CS1_BASE_ADDR
-#define CS2_BASE_ADDR MX3x_CS2_BASE_ADDR
-#define CS3_BASE_ADDR MX3x_CS3_BASE_ADDR
-#define CS4_BASE_ADDR MX3x_CS4_BASE_ADDR
-#define CS4_SIZE MX3x_CS4_SIZE
-#define CS5_BASE_ADDR MX3x_CS5_BASE_ADDR
-#define CS5_SIZE MX3x_CS5_SIZE
-#define X_MEMC_BASE_ADDR MX3x_X_MEMC_BASE_ADDR
-#define X_MEMC_SIZE MX3x_X_MEMC_SIZE
-#define ESDCTL_BASE_ADDR MX3x_ESDCTL_BASE_ADDR
-#define WEIM_BASE_ADDR MX3x_WEIM_BASE_ADDR
-#define M3IF_BASE_ADDR MX3x_M3IF_BASE_ADDR
-#define EMI_CTL_BASE_ADDR MX3x_EMI_CTL_BASE_ADDR
-#define PCMCIA_CTL_BASE_ADDR MX3x_PCMCIA_CTL_BASE_ADDR
-#define PCMCIA_MEM_BASE_ADDR MX3x_PCMCIA_MEM_BASE_ADDR
-#define MXC_INT_I2C3 MX3x_INT_I2C3
-#define MXC_INT_I2C2 MX3x_INT_I2C2
-#define MXC_INT_RTIC MX3x_INT_RTIC
-#define MXC_INT_I2C MX3x_INT_I2C
-#define MXC_INT_CSPI2 MX3x_INT_CSPI2
-#define MXC_INT_CSPI1 MX3x_INT_CSPI1
-#define MXC_INT_ATA MX3x_INT_ATA
-#define MXC_INT_UART3 MX3x_INT_UART3
-#define MXC_INT_IIM MX3x_INT_IIM
-#define MXC_INT_RNGA MX3x_INT_RNGA
-#define MXC_INT_EVTMON MX3x_INT_EVTMON
-#define MXC_INT_KPP MX3x_INT_KPP
-#define MXC_INT_RTC MX3x_INT_RTC
-#define MXC_INT_PWM MX3x_INT_PWM
-#define MXC_INT_EPIT2 MX3x_INT_EPIT2
-#define MXC_INT_EPIT1 MX3x_INT_EPIT1
-#define MXC_INT_GPT MX3x_INT_GPT
-#define MXC_INT_POWER_FAIL MX3x_INT_POWER_FAIL
-#define MXC_INT_UART2 MX3x_INT_UART2
-#define MXC_INT_NANDFC MX3x_INT_NANDFC
-#define MXC_INT_SDMA MX3x_INT_SDMA
-#define MXC_INT_MSHC1 MX3x_INT_MSHC1
-#define MXC_INT_IPU_ERR MX3x_INT_IPU_ERR
-#define MXC_INT_IPU_SYN MX3x_INT_IPU_SYN
-#define MXC_INT_UART1 MX3x_INT_UART1
-#define MXC_INT_ECT MX3x_INT_ECT
-#define MXC_INT_SCC_SCM MX3x_INT_SCC_SCM
-#define MXC_INT_SCC_SMN MX3x_INT_SCC_SMN
-#define MXC_INT_GPIO2 MX3x_INT_GPIO2
-#define MXC_INT_GPIO1 MX3x_INT_GPIO1
-#define MXC_INT_WDOG MX3x_INT_WDOG
-#define MXC_INT_GPIO3 MX3x_INT_GPIO3
-#define MXC_INT_EXT_POWER MX3x_INT_EXT_POWER
-#define MXC_INT_EXT_TEMPER MX3x_INT_EXT_TEMPER
-#define MXC_INT_EXT_SENSOR60 MX3x_INT_EXT_SENSOR60
-#define MXC_INT_EXT_SENSOR61 MX3x_INT_EXT_SENSOR61
-#define MXC_INT_EXT_WDOG MX3x_INT_EXT_WDOG
-#define MXC_INT_EXT_TV MX3x_INT_EXT_TV
-#define PROD_SIGNATURE MX3x_PROD_SIGNATURE
-#endif
-
 #endif /* ifndef __MACH_MX3x_H__ */
-- 
1.7.2.3

[PATCH 2/3] mx1: fix build when DEBUG_LL is enabled

[Baruch Siach]

Commit "mx1: prefix SOC specific defines with MX1_ and deprecate old names"
redefined the IO_ADDRESS macro in a way that is incompatible with
debug-macro.S. Use MX1_IO_ADDRESS instead.

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
---
 arch/arm/plat-mxc/include/mach/debug-macro.S |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/arch/arm/plat-mxc/include/mach/debug-macro.S b/arch/arm/plat-mxc/include/mach/debug-macro.S
index 133d66b..4c7d9f8 100644
--- a/arch/arm/plat-mxc/include/mach/debug-macro.S
+++ b/arch/arm/plat-mxc/include/mach/debug-macro.S
@@ -15,7 +15,7 @@
 #ifdef CONFIG_ARCH_MX1
 #include <mach/mx1.h>
 #define UART_PADDR	UART1_BASE_ADDR
-#define UART_VADDR	IO_ADDRESS(UART1_BASE_ADDR)
+#define UART_VADDR	MX1_IO_ADDRESS(UART1_BASE_ADDR)
 #endif
 
 #ifdef CONFIG_ARCH_MX25
-- 
1.7.0

[PATCH 3/3] mx25: fix build when DEBUG_LL is enabled

[Baruch Siach]

From: Alex Greshgorin <alexg@orex-cr.com>

Commit "imx25: redefine MX25_IO_ADDRESS using IMX_IO_ADDRESS" removed the
MX25_AIPS1_IO_ADDRESS macro which is used in debug-macro.S. Include
mach/hardware.h, and use the higher level IMX_IO_ADDRESS which is assembly
compatible

Signed-off-by: Alex Greshgorin <alexg@orex-cr.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
---
 arch/arm/plat-mxc/include/mach/debug-macro.S |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/plat-mxc/include/mach/debug-macro.S b/arch/arm/plat-mxc/include/mach/debug-macro.S
index 4c7d9f8..da75db8 100644
--- a/arch/arm/plat-mxc/include/mach/debug-macro.S
+++ b/arch/arm/plat-mxc/include/mach/debug-macro.S
@@ -22,9 +22,9 @@
 #ifdef UART_PADDR
 #error "CONFIG_DEBUG_LL is incompatible with multiple archs"
 #endif
-#include <mach/mx25.h>
+#include <mach/hardware.h>
 #define UART_PADDR	UART1_BASE_ADDR
-#define UART_VADDR	MX25_AIPS1_IO_ADDRESS(UART1_BASE_ADDR)
+#define UART_VADDR	IMX_IO_ADDRESS(UART1_BASE_ADDR, MX25_AIPS1)
 #endif
 
 #ifdef CONFIG_ARCH_MX2
-- 
1.7.0