* [PATCH 1/3] ARM: shmobile: Separate APMU resource data into CPU dependant part
2014-11-10 1:32 [GIT PULL] Second Round of Renesas ARM Based SoC Soc Updates for v3.19 Simon Horman
@ 2014-11-10 1:32 ` Simon Horman
2014-11-10 1:32 ` [PATCH 2/3] ARM: shmobile: r8a7791: Correct number of CPU cores Simon Horman
` (2 subsequent siblings)
3 siblings, 0 replies; 5+ messages in thread
From: Simon Horman @ 2014-11-10 1:32 UTC (permalink / raw)
To: linux-arm-kernel
From: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com>
APMU resources are not common to all R-Car SoCs so don't share this data.
A subsequent patch will correct the CPU cores for the r8a7791.
Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/mach-shmobile/common.h | 5 -----
arch/arm/mach-shmobile/platsmp-apmu.c | 27 +++++++++------------------
arch/arm/mach-shmobile/platsmp-apmu.h | 32 ++++++++++++++++++++++++++++++++
arch/arm/mach-shmobile/smp-r8a7790.c | 16 +++++++++++++++-
arch/arm/mach-shmobile/smp-r8a7791.c | 16 +++++++++++++++-
5 files changed, 71 insertions(+), 25 deletions(-)
create mode 100644 arch/arm/mach-shmobile/platsmp-apmu.h
diff --git a/arch/arm/mach-shmobile/common.h b/arch/arm/mach-shmobile/common.h
index 72087c7..309025e 100644
--- a/arch/arm/mach-shmobile/common.h
+++ b/arch/arm/mach-shmobile/common.h
@@ -19,11 +19,6 @@ extern void shmobile_boot_scu(void);
extern void shmobile_smp_scu_prepare_cpus(unsigned int max_cpus);
extern void shmobile_smp_scu_cpu_die(unsigned int cpu);
extern int shmobile_smp_scu_cpu_kill(unsigned int cpu);
-extern void shmobile_smp_apmu_prepare_cpus(unsigned int max_cpus);
-extern int shmobile_smp_apmu_boot_secondary(unsigned int cpu,
- struct task_struct *idle);
-extern void shmobile_smp_apmu_cpu_die(unsigned int cpu);
-extern int shmobile_smp_apmu_cpu_kill(unsigned int cpu);
struct clk;
extern int shmobile_clk_init(void);
extern void shmobile_handle_irq_intc(struct pt_regs *);
diff --git a/arch/arm/mach-shmobile/platsmp-apmu.c b/arch/arm/mach-shmobile/platsmp-apmu.c
index 2c06810..f483b56 100644
--- a/arch/arm/mach-shmobile/platsmp-apmu.c
+++ b/arch/arm/mach-shmobile/platsmp-apmu.c
@@ -1,6 +1,7 @@
/*
* SMP support for SoCs with APMU
*
+ * Copyright (C) 2014 Renesas Electronics Corporation
* Copyright (C) 2013 Magnus Damm
*
* This program is free software; you can redistribute it and/or modify
@@ -22,6 +23,7 @@
#include <asm/smp_plat.h>
#include <asm/suspend.h>
#include "common.h"
+#include "platsmp-apmu.h"
static struct {
void __iomem *iomem;
@@ -83,28 +85,15 @@ static void apmu_init_cpu(struct resource *res, int cpu, int bit)
pr_debug("apmu ioremap %d %d %pr\n", cpu, bit, res);
}
-static struct {
- struct resource iomem;
- int cpus[4];
-} apmu_config[] = {
- {
- .iomem = DEFINE_RES_MEM(0xe6152000, 0x88),
- .cpus = { 0, 1, 2, 3 },
- },
- {
- .iomem = DEFINE_RES_MEM(0xe6151000, 0x88),
- .cpus = { 0x100, 0x101, 0x102, 0x103 },
- }
-};
-
-static void apmu_parse_cfg(void (*fn)(struct resource *res, int cpu, int bit))
+static void apmu_parse_cfg(void (*fn)(struct resource *res, int cpu, int bit),
+ struct rcar_apmu_config *apmu_config, int num)
{
u32 id;
int k;
int bit, index;
bool is_allowed;
- for (k = 0; k < ARRAY_SIZE(apmu_config); k++) {
+ for (k = 0; k < num; k++) {
/* only enable the cluster that includes the boot CPU */
is_allowed = false;
for (bit = 0; bit < ARRAY_SIZE(apmu_config[k].cpus); bit++) {
@@ -128,14 +117,16 @@ static void apmu_parse_cfg(void (*fn)(struct resource *res, int cpu, int bit))
}
}
-void __init shmobile_smp_apmu_prepare_cpus(unsigned int max_cpus)
+void __init shmobile_smp_apmu_prepare_cpus(unsigned int max_cpus,
+ struct rcar_apmu_config *apmu_config,
+ int num)
{
/* install boot code shared by all CPUs */
shmobile_boot_fn = virt_to_phys(shmobile_smp_boot);
shmobile_boot_arg = MPIDR_HWID_BITMASK;
/* perform per-cpu setup */
- apmu_parse_cfg(apmu_init_cpu);
+ apmu_parse_cfg(apmu_init_cpu, apmu_config, num);
}
#ifdef CONFIG_SMP
diff --git a/arch/arm/mach-shmobile/platsmp-apmu.h b/arch/arm/mach-shmobile/platsmp-apmu.h
new file mode 100644
index 0000000..76512c9
--- /dev/null
+++ b/arch/arm/mach-shmobile/platsmp-apmu.h
@@ -0,0 +1,32 @@
+/*
+ * rmobile apmu definition
+ *
+ * Copyright (C) 2014 Renesas Electronics Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef PLATSMP_APMU_H
+#define PLATSMP_APMU_H
+
+struct rcar_apmu_config {
+ struct resource iomem;
+ int cpus[4];
+};
+
+extern void shmobile_smp_apmu_prepare_cpus(unsigned int max_cpus,
+ struct rcar_apmu_config *apmu_config,
+ int num);
+extern int shmobile_smp_apmu_boot_secondary(unsigned int cpu,
+ struct task_struct *idle);
+extern void shmobile_smp_apmu_cpu_die(unsigned int cpu);
+extern int shmobile_smp_apmu_cpu_kill(unsigned int cpu);
+
+#endif /* PLATSMP_APMU_H */
diff --git a/arch/arm/mach-shmobile/smp-r8a7790.c b/arch/arm/mach-shmobile/smp-r8a7790.c
index 2311694..9c3da13 100644
--- a/arch/arm/mach-shmobile/smp-r8a7790.c
+++ b/arch/arm/mach-shmobile/smp-r8a7790.c
@@ -21,6 +21,7 @@
#include <asm/smp_plat.h>
#include "common.h"
+#include "platsmp-apmu.h"
#include "pm-rcar.h"
#include "r8a7790.h"
@@ -34,10 +35,23 @@ static struct rcar_sysc_ch r8a7790_ca7_scu = {
.isr_bit = 21, /* CA7-SCU */
};
+static struct rcar_apmu_config r8a7790_apmu_config[] = {
+ {
+ .iomem = DEFINE_RES_MEM(0xe6152000, 0x88),
+ .cpus = { 0, 1, 2, 3 },
+ },
+ {
+ .iomem = DEFINE_RES_MEM(0xe6151000, 0x88),
+ .cpus = { 0x100, 0x0101, 0x102, 0x103 },
+ }
+};
+
static void __init r8a7790_smp_prepare_cpus(unsigned int max_cpus)
{
/* let APMU code install data related to shmobile_boot_vector */
- shmobile_smp_apmu_prepare_cpus(max_cpus);
+ shmobile_smp_apmu_prepare_cpus(max_cpus,
+ r8a7790_apmu_config,
+ ARRAY_SIZE(r8a7790_apmu_config));
/* turn on power to SCU */
r8a7790_pm_init();
diff --git a/arch/arm/mach-shmobile/smp-r8a7791.c b/arch/arm/mach-shmobile/smp-r8a7791.c
index f743386..96e392c 100644
--- a/arch/arm/mach-shmobile/smp-r8a7791.c
+++ b/arch/arm/mach-shmobile/smp-r8a7791.c
@@ -21,13 +21,27 @@
#include <asm/smp_plat.h>
#include "common.h"
+#include "platsmp-apmu.h"
#include "r8a7791.h"
#include "rcar-gen2.h"
+static struct rcar_apmu_config r8a7791_apmu_config[] = {
+ {
+ .iomem = DEFINE_RES_MEM(0xe6152000, 0x88),
+ .cpus = { 0, 1, 2, 3 },
+ },
+ {
+ .iomem = DEFINE_RES_MEM(0xe6151000, 0x88),
+ .cpus = { 0x100, 0x0101, 0x102, 0x103 },
+ }
+};
+
static void __init r8a7791_smp_prepare_cpus(unsigned int max_cpus)
{
/* let APMU code install data related to shmobile_boot_vector */
- shmobile_smp_apmu_prepare_cpus(max_cpus);
+ shmobile_smp_apmu_prepare_cpus(max_cpus,
+ r8a7791_apmu_config,
+ ARRAY_SIZE(r8a7791_apmu_config));
r8a7791_pm_init();
}
--
2.1.1
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [GIT PULL] Second Round of Renesas ARM Based SoC Soc Updates for v3.19
@ 2014-11-10 1:32 Simon Horman
2014-11-10 1:32 ` [PATCH 1/3] ARM: shmobile: Separate APMU resource data into CPU dependant part Simon Horman
` (3 more replies)
0 siblings, 4 replies; 5+ messages in thread
From: Simon Horman @ 2014-11-10 1:32 UTC (permalink / raw)
To: linux-arm-kernel
Hi Olof, Hi Kevin, Hi Arnd,
Please consider these second round of Renesas ARM based SoC soc updates for v3.19.
This pull request is based on the previous round of
such requests, tagged as renesas-soc-for-v3.19,
which I have already sent a pull-request for.
The following changes since commit 3794705aeb318c431c07072f04380c78cc5a84ac:
ARM: shmobile: Select CONFIG_ZONE_DMA when CONFIG_ARM_LPAE is enabled (2014-10-28 08:43:03 +0900)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git tags/renesas-soc2-for-v3.19
for you to fetch changes up to 950a3f0e7dd32c372c9957d5c050b08de7ec9e56:
ARM: shmobile: Enable PCI domains for R-Car Gen2 devices (2014-11-05 14:50:17 +0900)
----------------------------------------------------------------
Second Round of Renesas ARM Based SoC Soc Updates for v3.19
* Enable PCI domains for R-Car Gen2 devices
* Make APMU resource code SoC-specific
----------------------------------------------------------------
Hisashi Nakamura (2):
ARM: shmobile: Separate APMU resource data into CPU dependant part
ARM: shmobile: r8a7791: Correct number of CPU cores
Phil Edworthy (1):
ARM: shmobile: Enable PCI domains for R-Car Gen2 devices
arch/arm/mach-shmobile/Kconfig | 1 +
arch/arm/mach-shmobile/common.h | 5 -----
arch/arm/mach-shmobile/platsmp-apmu.c | 27 +++++++++------------------
arch/arm/mach-shmobile/platsmp-apmu.h | 32 ++++++++++++++++++++++++++++++++
arch/arm/mach-shmobile/smp-r8a7790.c | 16 +++++++++++++++-
arch/arm/mach-shmobile/smp-r8a7791.c | 12 +++++++++++-
6 files changed, 68 insertions(+), 25 deletions(-)
create mode 100644 arch/arm/mach-shmobile/platsmp-apmu.h
^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH 2/3] ARM: shmobile: r8a7791: Correct number of CPU cores
2014-11-10 1:32 [GIT PULL] Second Round of Renesas ARM Based SoC Soc Updates for v3.19 Simon Horman
2014-11-10 1:32 ` [PATCH 1/3] ARM: shmobile: Separate APMU resource data into CPU dependant part Simon Horman
@ 2014-11-10 1:32 ` Simon Horman
2014-11-10 1:32 ` [PATCH 3/3] ARM: shmobile: Enable PCI domains for R-Car Gen2 devices Simon Horman
2014-11-19 21:10 ` [GIT PULL] Second Round of Renesas ARM Based SoC Soc Updates for v3.19 Arnd Bergmann
3 siblings, 0 replies; 5+ messages in thread
From: Simon Horman @ 2014-11-10 1:32 UTC (permalink / raw)
To: linux-arm-kernel
From: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com>
The r8a7791 only has 2 CPU CA15 cores, not 4 CA15 and 4 CA7 cores.
Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/mach-shmobile/smp-r8a7791.c | 6 +-----
1 file changed, 1 insertion(+), 5 deletions(-)
diff --git a/arch/arm/mach-shmobile/smp-r8a7791.c b/arch/arm/mach-shmobile/smp-r8a7791.c
index 96e392c..7e49e0a 100644
--- a/arch/arm/mach-shmobile/smp-r8a7791.c
+++ b/arch/arm/mach-shmobile/smp-r8a7791.c
@@ -28,11 +28,7 @@
static struct rcar_apmu_config r8a7791_apmu_config[] = {
{
.iomem = DEFINE_RES_MEM(0xe6152000, 0x88),
- .cpus = { 0, 1, 2, 3 },
- },
- {
- .iomem = DEFINE_RES_MEM(0xe6151000, 0x88),
- .cpus = { 0x100, 0x0101, 0x102, 0x103 },
+ .cpus = { 0, 1 },
}
};
--
2.1.1
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH 3/3] ARM: shmobile: Enable PCI domains for R-Car Gen2 devices
2014-11-10 1:32 [GIT PULL] Second Round of Renesas ARM Based SoC Soc Updates for v3.19 Simon Horman
2014-11-10 1:32 ` [PATCH 1/3] ARM: shmobile: Separate APMU resource data into CPU dependant part Simon Horman
2014-11-10 1:32 ` [PATCH 2/3] ARM: shmobile: r8a7791: Correct number of CPU cores Simon Horman
@ 2014-11-10 1:32 ` Simon Horman
2014-11-19 21:10 ` [GIT PULL] Second Round of Renesas ARM Based SoC Soc Updates for v3.19 Arnd Bergmann
3 siblings, 0 replies; 5+ messages in thread
From: Simon Horman @ 2014-11-10 1:32 UTC (permalink / raw)
To: linux-arm-kernel
From: Phil Edworthy <phil.edworthy@renesas.com>
The PCI core will soon automatically handle the PCI domain number,
allowing the internal PCI and external PCIe bridges work at the same time.
In order for that to work, we need to enable PCI_DOMAINS.
Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/mach-shmobile/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
index 6bc018f..b0a9e1a 100644
--- a/arch/arm/mach-shmobile/Kconfig
+++ b/arch/arm/mach-shmobile/Kconfig
@@ -19,6 +19,7 @@ config ARCH_RCAR_GEN2
select PM_RCAR if PM || SMP
select RENESAS_IRQC
select SYS_SUPPORTS_SH_CMT
+ select PCI_DOMAINS if PCI
config ARCH_RMOBILE
bool
--
2.1.1
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [GIT PULL] Second Round of Renesas ARM Based SoC Soc Updates for v3.19
2014-11-10 1:32 [GIT PULL] Second Round of Renesas ARM Based SoC Soc Updates for v3.19 Simon Horman
` (2 preceding siblings ...)
2014-11-10 1:32 ` [PATCH 3/3] ARM: shmobile: Enable PCI domains for R-Car Gen2 devices Simon Horman
@ 2014-11-19 21:10 ` Arnd Bergmann
3 siblings, 0 replies; 5+ messages in thread
From: Arnd Bergmann @ 2014-11-19 21:10 UTC (permalink / raw)
To: linux-arm-kernel
On Monday 10 November 2014, Simon Horman wrote:
> Hi Olof, Hi Kevin, Hi Arnd,
>
> Please consider these second round of Renesas ARM based SoC soc updates for v3.19.
>
> This pull request is based on the previous round of
> such requests, tagged as renesas-soc-for-v3.19,
> which I have already sent a pull-request for.
>
>
Pulled into next/soc, thanks!
Arnd
^ permalink raw reply [flat|nested] 5+ messages in thread
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2014-11-10 1:32 [GIT PULL] Second Round of Renesas ARM Based SoC Soc Updates for v3.19 Simon Horman
2014-11-10 1:32 ` [PATCH 1/3] ARM: shmobile: Separate APMU resource data into CPU dependant part Simon Horman
2014-11-10 1:32 ` [PATCH 2/3] ARM: shmobile: r8a7791: Correct number of CPU cores Simon Horman
2014-11-10 1:32 ` [PATCH 3/3] ARM: shmobile: Enable PCI domains for R-Car Gen2 devices Simon Horman
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