[PATCHv2 0/8] arm: mvebu: add Synology DS213j and DS414 .dts files

[PATCHv2 0/8] arm: mvebu: add Synology DS213j and DS414 .dts files

[Arnaud Ebalard]

Hi,

This series adds .dts files for Synology DS213j (armada 370 2-bay NAS) and
DS414 (armada XP 4-bay NAS) devices. It is based on comments received on
a v0 submission of DS213j .dts file [1] and Andrew's comments on a v1 (
for both DS213j and DS414 .dts files) [2].

Following previous comments, I have also added in the set 5 additional
patches to:

 - add 'micron' in vendor-prefixes.txt (note: NASDAQ symbol is 'mu')
 - s/ssi/sii/ in kirkwood-synology.dtsi
 - use uart0 label in armada-xp-lenovo-ix4-300d.dts for stdout-path
 - move common UART0 and SPI0 pinctrl entries to armada-370.dtsi
 - move common Ge0/1 RGMII and SPI0 pinctrl entries to armada-xp-mv78230.dtsi

Cheers,

a+

[1]: http://thread.gmane.org/gmane.linux.drivers.devicetree/95401
[2]: http://thread.gmane.org/gmane.linux.drivers.devicetree/98830

Changes since v1:

- Added a patch to fix Seiko Instruments, Inc. prefix from "ssi" to
  "sii" for s35390 RTC chip in kirkwood-synology.dtsi as reported by
  Andrew
- Fixed DS414 and DS213j .dts files which had the same issue due to
  a blind copy-and-paste.
- Added a patch for armada-xp-lenovo-ix4-300d.dts to use uart alias
  for stdout-path, as suggested by Andrew.
- removed pinctrl properties for ethernet interface wrongly referencing
  a RGMII pin configuration: the PHY is connected using SGMII.
- moved some DS213j pinctrl entries (spi0, uart0) in armada-370.dtsi
- same thing for DS414 pinctrl entries (ge0/1, spi0) moved to
  armada-xp-mv78230.dtsi
- changed pinctrl nodes and labels to match naming convention found
  in .dtsi: pmx_*: pmx- changed to *_pin: -pin.
- same thing for DS414
- added a comment in the .dts file about DS414 being susceptible at
  boot when an USB/serial converter is connected to the UART pins.

Changes since v0:

- Added a comment at the beginning of DS213j and DS414j .dts file regarding
  the need for a recent Marvell bootloader. Arnd suggested to do a specific
  .dtb file for new and old bootloaders but I think if we follow this path
  for DS414 and DS213j, we will probably have to do it for all Armada-based
  synology NAS and possibly for other Armada 370/XP based devices. Opting
  for recent bootloaders config and having a comment is easier. It is likely
  that a user already has a recent bootloader. Otherwise, upgrade is a one
  click process anyway. If a user thinks it is easier to have two different
  .dts files in the kernel, she will still be able to push a patch.
- Added a comment in the .dts file about the bootloader screwing the kernel
  if the environment is saved.
- Kept GPL licence for .dts file
- Fixed bad naming of node and alias (_ vs -)
- Added micron vendor prefix for n25q064 flash
- Disabled SoC RTC; a Seiko S-35390A is used as main RTC
- Added comments about the purpose of each serial port
- Added stdout-path = &uart0; to help barebox. A specific patch is included
  in the series to provide labels for uart serial nodes
- Added patch for DS414 .dts file


Arnaud Ebalard (8):
  of: add "micron" vendor prefix for Micron
  arm: mvebu: fix vendor prefix typo in kirkwood-synology.dtsi
  arm: mvebu: add uartX labels for Armada SoC serial nodes
  arm: mvebu: use recently introduced uart label for stdout-path
  arm: mvebu: add common uart0 and spi0 pintcrl entries for Armada 370
  arm: mvebu: add common ge0/1 and spi0 pintcrl entries for Armada XP MV78230
  arm: mvebu: add .dts file for Synology DS213j
  arm: mvebu: add .dts file for Synology DS414

 .../devicetree/bindings/vendor-prefixes.txt        |   1 +
 arch/arm/boot/dts/Makefile                         |   6 +-
 arch/arm/boot/dts/armada-370-synology-ds213j.dts   | 323 ++++++++++++++++++++
 arch/arm/boot/dts/armada-370-xp.dtsi               |   5 +-
 arch/arm/boot/dts/armada-370.dtsi                  |  11 +
 arch/arm/boot/dts/armada-xp-lenovo-ix4-300d.dts    |   2 +-
 arch/arm/boot/dts/armada-xp-mv78230.dtsi           |  20 ++
 arch/arm/boot/dts/armada-xp-synology-ds414.dts     | 332 +++++++++++++++++++++
 arch/arm/boot/dts/armada-xp.dtsi                   |   5 +-
 arch/arm/boot/dts/kirkwood-synology.dtsi           |   2 +-
 10 files changed, 699 insertions(+), 8 deletions(-)
 create mode 100644 arch/arm/boot/dts/armada-370-synology-ds213j.dts
 create mode 100644 arch/arm/boot/dts/armada-xp-synology-ds414.dts

-- 
2.1.1

[PATCHv2 1/8] of: add "micron" vendor prefix for Micron

[Arnaud Ebalard]

Micron vendor prefix is not listed yet in vendor-prefixes.txt file. Even
if the expected vendor prefix should be the NASDAQ symbol ("mu" in that
case), it seems reasonable to use "micron" here because it is what is
already found at various locations inside the kernel (see files under
arch/arm/boot/dts/ for instance).

Signed-off-by: Arnaud Ebalard <arno@natisbad.org>
---
 Documentation/devicetree/bindings/vendor-prefixes.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt
index 723999d73744..55a3a7f19063 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.txt
+++ b/Documentation/devicetree/bindings/vendor-prefixes.txt
@@ -96,6 +96,7 @@ mitsubishi	Mitsubishi Electric Corporation
 mosaixtech	Mosaix Technologies, Inc.
 moxa	Moxa
 mpl	MPL AG
+micron	Micron Technology, Inc.
 mundoreader	Mundo Reader S.L.
 murata	Murata Manufacturing Co., Ltd.
 mxicy	Macronix International Co., Ltd.
-- 
2.1.1

[PATCHv2 2/8] arm: mvebu: fix vendor prefix typo in kirkwood-synology.dtsi

[Arnaud Ebalard]

As reported by Andrew, the vendor prefix for Seiko Instruments, Inc.
S-35390A I2C RTC chip in kirkwood-synology.dtsi has a typo (ssi
instead of sii). This patches fixes it.

Reported-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Arnaud Ebalard <arno@natisbad.org>
---
 arch/arm/boot/dts/kirkwood-synology.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/kirkwood-synology.dtsi b/arch/arm/boot/dts/kirkwood-synology.dtsi
index 811e0971fc58..8be5b2e4626e 100644
--- a/arch/arm/boot/dts/kirkwood-synology.dtsi
+++ b/arch/arm/boot/dts/kirkwood-synology.dtsi
@@ -266,7 +266,7 @@
 
 			s35390a: s35390a at 30 {
 				status = "disabled";
-				compatible = "ssi,s35390a";
+				compatible = "sii,s35390a";
 				reg = <0x30>;
 			};
 		};
-- 
2.1.1

[PATCHv2 3/8] arm: mvebu: add uartX labels for Armada SoC serial nodes

[Arnaud Ebalard]

This patch adds uartX labels for Armada SoC serial nodes. This is
a preliminary work to be able to easily reference the serial lines
in Device Tree files. One expected use is when providing stdout-path
property for barebox.

Acked-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Arnaud Ebalard <arno@natisbad.org>
---
 arch/arm/boot/dts/armada-370-xp.dtsi | 5 +++--
 arch/arm/boot/dts/armada-xp.dtsi     | 5 +++--
 2 files changed, 6 insertions(+), 4 deletions(-)

diff --git a/arch/arm/boot/dts/armada-370-xp.dtsi b/arch/arm/boot/dts/armada-370-xp.dtsi
index 83286ec9702c..2be9723bcdf3 100644
--- a/arch/arm/boot/dts/armada-370-xp.dtsi
+++ b/arch/arm/boot/dts/armada-370-xp.dtsi
@@ -151,7 +151,7 @@
 				status = "disabled";
 			};
 
-			serial at 12000 {
+			uart0: serial at 12000 {
 				compatible = "snps,dw-apb-uart";
 				reg = <0x12000 0x100>;
 				reg-shift = <2>;
@@ -160,7 +160,8 @@
 				clocks = <&coreclk 0>;
 				status = "disabled";
 			};
-			serial at 12100 {
+
+			uart1: serial at 12100 {
 				compatible = "snps,dw-apb-uart";
 				reg = <0x12100 0x100>;
 				reg-shift = <2>;
diff --git a/arch/arm/boot/dts/armada-xp.dtsi b/arch/arm/boot/dts/armada-xp.dtsi
index bff9f6c18db1..a68f5b837536 100644
--- a/arch/arm/boot/dts/armada-xp.dtsi
+++ b/arch/arm/boot/dts/armada-xp.dtsi
@@ -52,7 +52,7 @@
 				reg = <0x11100 0x100>;
 			};
 
-			serial at 12200 {
+			uart2: serial at 12200 {
 				compatible = "snps,dw-apb-uart";
 				reg = <0x12200 0x100>;
 				reg-shift = <2>;
@@ -61,7 +61,8 @@
 				clocks = <&coreclk 0>;
 				status = "disabled";
 			};
-			serial at 12300 {
+
+			uart3: serial at 12300 {
 				compatible = "snps,dw-apb-uart";
 				reg = <0x12300 0x100>;
 				reg-shift = <2>;
-- 
2.1.1

[PATCHv2 4/8] arm: mvebu: use recently introduced uart label for stdout-path

[Arnaud Ebalard]

Now that labels for uartX are available in Marvell Armada .dtsi files,
this patch replaces the "/soc/internal-regs/serial at 12000" found in
armada-xp-lenovo-ix4-300d.dts file for stdout-path property by the more
concise &uart0.

Suggested-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Arnaud Ebalard <arno@natisbad.org>
---
 arch/arm/boot/dts/armada-xp-lenovo-ix4-300d.dts | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/armada-xp-lenovo-ix4-300d.dts b/arch/arm/boot/dts/armada-xp-lenovo-ix4-300d.dts
index 469cf7137595..cccf54784c4c 100644
--- a/arch/arm/boot/dts/armada-xp-lenovo-ix4-300d.dts
+++ b/arch/arm/boot/dts/armada-xp-lenovo-ix4-300d.dts
@@ -22,7 +22,7 @@
 
 	chosen {
 		bootargs = "console=ttyS0,115200 earlyprintk";
-		stdout-path = "/soc/internal-regs/serial at 12000";
+		stdout-path = &uart0;
 	};
 
 	memory {
-- 
2.1.1

[PATCHv2 5/8] arm: mvebu: add common uart0 and spi0 pintcrl entries for Armada 370

[Arnaud Ebalard]

pinctrl entries for uart0 using MPP0-1 and spi0 using MPP33-36 are
common configurations. Instead of replicating them in each .dts file,
put those in armada-370.dtsi file so that they can be referenced.

Suggested-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Arnaud Ebalard <arno@natisbad.org>
---
 arch/arm/boot/dts/armada-370.dtsi | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/arch/arm/boot/dts/armada-370.dtsi b/arch/arm/boot/dts/armada-370.dtsi
index 6b3c23b1e138..d9f5d59e463e 100644
--- a/arch/arm/boot/dts/armada-370.dtsi
+++ b/arch/arm/boot/dts/armada-370.dtsi
@@ -115,6 +115,17 @@
 				compatible = "marvell,mv88f6710-pinctrl";
 				reg = <0x18000 0x38>;
 
+				uart0_pins: uart0-pins {
+					marvell,pins = "mpp0", "mpp1";
+					marvell,function = "uart0";
+				};
+
+				spi0_pins: spi0-pins {
+					marvell,pins = "mpp33", "mpp34",
+						       "mpp35", "mpp36";
+					marvell,function = "spi0";
+				};
+
 				sdio_pins1: sdio-pins1 {
 					marvell,pins = "mpp9",  "mpp11", "mpp12",
 							"mpp13", "mpp14", "mpp15";
-- 
2.1.1

[PATCHv2 6/8] arm: mvebu: add common ge0/1 and spi0 pintcrl entries for Armada XP MV78230

[Arnaud Ebalard]

pinctrl entries for the two GbE interfaces using RGMII signaling w/ the PHY
via MPP0-11/MPP12-23 and the spi0 interface using MPP36-39 are common
configurations. Instead of replicating them in each .dts file, put those in
armada-xp-mv78230.dtsi file so that they can be referenced.

Suggested-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Arnaud Ebalard <arno@natisbad.org>
---
 arch/arm/boot/dts/armada-xp-mv78230.dtsi | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/arch/arm/boot/dts/armada-xp-mv78230.dtsi b/arch/arm/boot/dts/armada-xp-mv78230.dtsi
index 2592e1c13560..85a39aed00dd 100644
--- a/arch/arm/boot/dts/armada-xp-mv78230.dtsi
+++ b/arch/arm/boot/dts/armada-xp-mv78230.dtsi
@@ -171,6 +171,26 @@
 				compatible = "marvell,mv78230-pinctrl";
 				reg = <0x18000 0x38>;
 
+				ge0_rgmii_pins: ge0-rgmii-pins {
+					marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3",
+						       "mpp4", "mpp5", "mpp6", "mpp7",
+						       "mpp8", "mpp9", "mpp10", "mpp11";
+					marvell,function = "ge0";
+				};
+
+				ge1_rgmii_pins: ge1-rgmii-pins {
+					marvell,pins = "mpp12", "mpp13", "mpp14", "mpp15",
+						       "mpp16", "mpp17", "mpp18", "mpp19",
+						       "mpp20", "mpp21", "mpp22", "mpp23";
+					marvell,function = "ge1";
+				};
+
+				spi0_pins: spi0-pins {
+					marvell,pins = "mpp36", "mpp37",
+						       "mpp38", "mpp39";
+					marvell,function = "spi";
+				};
+
 				sdio_pins: sdio-pins {
 					marvell,pins = "mpp30", "mpp31", "mpp32",
 						       "mpp33", "mpp34", "mpp35";
-- 
2.1.1

[PATCHv2 7/8] arm: mvebu: add .dts file for Synology DS213j

[Arnaud Ebalard]

Synology DS213j is a 2-bay NAS powered by a Marvell Armada 370
(88F6710 @1.2Ghz). It is very similar on many aspects to previous
2-bay synology models based on Marvell kirkwood SoC. Here is a
short summary of the device:

 - 512MB RAM
 - boot on SPI flash (64Mbit Micron N25Q064)
 - 1 GbE interface (Armada MAC connected to a Marvell 88E1512
   PHY via SGMII)
 - 2 rear USB 2.0 ports (directly handled by the Armada 370)
 - 2 internal SATA ports handled by the Armada 370: 2 GPIO for
   presence, 2 for powering them
 - two front amber LED (disk1, disk2) controlled by the SoC
 - Seiko S-35390A I2C RTC chip
 - UART0 providing serial console
 - UART1 used for poweroff (connected to a TI MSP430F2111)
 - Fan handled via 4 GPIO (3 for speed, 1 for alarm)

Signed-off-by: Arnaud Ebalard <arno@natisbad.org>
---
 arch/arm/boot/dts/Makefile                       |   3 +-
 arch/arm/boot/dts/armada-370-synology-ds213j.dts | 323 +++++++++++++++++++++++
 2 files changed, 325 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/boot/dts/armada-370-synology-ds213j.dts

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 38c89cafa1ab..95387b59ebb2 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -495,7 +495,8 @@ dtb-$(CONFIG_MACH_ARMADA_370) += \
 	armada-370-mirabox.dtb \
 	armada-370-netgear-rn102.dtb \
 	armada-370-netgear-rn104.dtb \
-	armada-370-rd.dtb
+	armada-370-rd.dtb \
+	armada-370-synology-ds213j.dtb
 dtb-$(CONFIG_MACH_ARMADA_375) += \
 	armada-375-db.dtb
 dtb-$(CONFIG_MACH_ARMADA_38X) += \
diff --git a/arch/arm/boot/dts/armada-370-synology-ds213j.dts b/arch/arm/boot/dts/armada-370-synology-ds213j.dts
new file mode 100644
index 000000000000..9f9eea7dbff7
--- /dev/null
+++ b/arch/arm/boot/dts/armada-370-synology-ds213j.dts
@@ -0,0 +1,323 @@
+/*
+ * Device Tree file for Synology DS213j
+ *
+ * Copyright (C) 2014, Arnaud EBALARD <arno@natisbad.org>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ *
+ * Note: this Device Tree assumes that the bootloader has remapped the
+ * internal registers to 0xf1000000 (instead of the old 0xd0000000).
+ * The 0xf1000000 is the default used by the recent, DT-capable, U-Boot
+ * bootloaders provided by Marvell. It is used in recent versions of
+ * DSM software provided by Synology. Nonetheless, some earlier boards
+ * were delivered with an older version of u-boot that left internal
+ * registers mapped at 0xd0000000. If you have such a device you will
+ * not be able to directly boot a kernel based on this Device Tree. In
+ * that case, the preferred solution is to update your bootloader (e.g.
+ * by upgrading to latest version of DSM, or building a new one and
+ * installing it from u-boot prompt) or adjust the Devive Tree
+ * (s/0xf1000000/0xd0000000/ in 'ranges' below).
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/gpio/gpio.h>
+#include "armada-370.dtsi"
+
+/ {
+	model = "Synology DS213j";
+	compatible = "synology,ds213j", "marvell,armada370",
+		     "marvell,armada-370-xp";
+
+	chosen {
+		bootargs = "console=ttyS0,115200 earlyprintk";
+		stdout-path = &uart0;
+	};
+
+	memory {
+		device_type = "memory";
+		reg = <0x00000000 0x20000000>; /* 512 MB */
+	};
+
+	soc {
+		ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
+			  MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000>;
+
+		internal-regs {
+
+			sata at a0000 {
+				nr-ports = <2>;
+				status = "okay";
+			};
+
+			pinctrl {
+				disk1_led_pin: disk1-led-pin {
+					marvell,pins = "mpp31";
+					marvell,function = "gpio";
+				};
+
+				disk2_led_pin: disk2-led-pin {
+					marvell,pins = "mpp32";
+					marvell,function = "gpio";
+				};
+
+				sata1_pwr_pin: sata1-pwr-pin {
+					marvell,pins = "mpp37";
+					marvell,function = "gpio";
+				};
+
+				sata2_pwr_pin: sata2-pwr-pin {
+					marvell,pins = "mpp62";
+					marvell,function = "gpio";
+				};
+
+				sata1_pres_pin: sata1-pres-pin {
+					marvell,pins = "mpp60";
+					marvell,function = "gpio";
+				};
+
+				sata2_pres_pin: sata2-pres-pin {
+					marvell,pins = "mpp48";
+					marvell,function = "gpio";
+				};
+
+				syno_id_bit0_pin: syno-id-bit0-pin {
+					marvell,pins = "mpp55";
+					marvell,function = "gpio";
+				};
+
+				syno_id_bit1_pin: syno-id-bit1-pin {
+					marvell,pins = "mpp56";
+					marvell,function = "gpio";
+				};
+
+				syno_id_bit2_pin: syno-id-bit2-pin {
+					marvell,pins = "mpp57";
+					marvell,function = "gpio";
+				};
+
+				syno_id_bit3_pin: syno-id-bit3-pin {
+					marvell,pins = "mpp58";
+					marvell,function = "gpio";
+				};
+
+				fan_ctrl_low_pin: fan-ctrl-low-pin {
+					marvell,pins = "mpp65";
+					marvell,function = "gpio";
+				};
+
+				fan_ctrl_mid_pin: fan-ctrl-mid-pin {
+					marvell,pins = "mpp64";
+					marvell,function = "gpio";
+				};
+
+				fan_ctrl_high_pin: fan-ctrl-high-pin {
+					marvell,pins = "mpp63";
+					marvell,function = "gpo";
+				};
+
+				fan_alarm_pin: fan-alarm-pin {
+					marvell,pins = "mpp38";
+					marvell,function = "gpio";
+				};
+
+				poweroff_pin: poweroff-pin {
+					marvell,pins = "mpp4";
+					marvell,function = "gpio";
+				};
+			};
+
+			mdio {
+				phy1: ethernet-phy at 1 { /* Marvell 88E1512 */
+					reg = <1>;
+				};
+			};
+
+			ethernet at 70000 {
+			       status = "okay";
+			       phy = <&phy1>;
+			       phy-mode = "sgmii";
+			};
+
+			spi0: spi at 10600 {
+				status = "okay";
+				pinctrl-0 = <&spi0_pins>;
+				pinctrl-names = "default";
+
+				spi-flash at 0 {
+					#address-cells = <1>;
+					#size-cells = <1>;
+					compatible = "micron,n25q064";
+					reg = <0>; /* Chip select 0 */
+					spi-max-frequency = <20000000>;
+
+					/*
+					 * Warning!
+					 *
+					 * Synology u-boot uses its compiled-in environment
+					 * and it seems Synology did not care to change u-boot
+					 * default configuration in order to allow saving a
+					 * modified environment at a sensible location. So,
+					 * if you do a 'saveenv' under u-boot, your modified
+					 * environment will be saved at 1MB after the start
+					 * of the flash, i.e. in the middle of the uImage.
+					 * For that reason, it is strongly advised not to
+					 * change the default environment, unless you know
+					 * what you are doing.
+					 */
+					partition at 00000000 { /* u-boot */
+						label = "RedBoot";
+						reg = <0x00000000 0x000c0000>; /* 768KB */
+					};
+
+					partition at 000c0000 { /* uImage */
+						label = "zImage";
+						reg = <0x000c0000 0x002d0000>; /* 2880KB */
+					};
+
+					partition at 00390000 { /* uInitramfs */
+						label = "rd.gz";
+						reg = <0x00390000 0x00440000>; /* 4250KB */
+					};
+
+					partition at 007d0000 { /* MAC address and serial number */
+						label = "vendor";
+						reg = <0x007d0000 0x00010000>; /* 64KB */
+					};
+
+					partition at 007e0000 {
+						label = "RedBoot config";
+						reg = <0x007e0000 0x00010000>; /* 64KB */
+					};
+
+					partition at 007f0000 {
+						label = "FIS directory";
+						reg = <0x007f0000 0x00010000>; /* 64KB */
+					};
+				};
+			};
+
+			/* rear USB port, near reset button */
+			usb at 50000 {
+				status = "okay";
+			};
+
+			/* rear USB port, near RJ45 port */
+			usb at 51000 {
+				status = "okay";
+			};
+
+			i2c at 11000 {
+				compatible = "marvell,mv64xxx-i2c";
+				pinctrl-0 = <&i2c0_pins>;
+				pinctrl-names = "default";
+				clock-frequency = <400000>;
+				status = "okay";
+
+				/* Main device RTC chip */
+				s35390a: s35390a at 30 {
+					 compatible = "sii,s35390a";
+					 reg = <0x30>;
+				};
+			};
+
+			/* RTC provided by Seiko S-35390A above */
+			rtc at 10300 {
+				status = "disabled";
+			};
+
+			/* Connected to a header on device's PCB */
+			serial at 12000 {
+				status = "okay";
+			};
+
+			/* Connected to a TI MSP430F2111 for power control */
+			serial at 12100 {
+				status = "okay";
+			};
+
+			poweroff at 12100 {
+				compatible = "synology,power-off";
+				reg = <0x12100 0x100>;
+				clocks = <&coreclk 0>;
+			};
+		};
+	};
+
+	gpio-fan-100-32-35 {
+		status = "okay";
+		compatible = "gpio-fan";
+		pinctrl-0 = <&fan_ctrl_low_pin &fan_ctrl_mid_pin
+			     &fan_ctrl_high_pin &fan_alarm_pin>;
+		pinctrl-names = "default";
+		gpios = <&gpio1 31 GPIO_ACTIVE_HIGH
+			 &gpio2  0 GPIO_ACTIVE_HIGH
+			 &gpio2  1 GPIO_ACTIVE_HIGH>;
+		alarm-gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
+		gpio-fan,speed-map = <    0 0
+				       2200 1
+				       2500 2
+				       3000 4
+				       3300 3
+				       3700 5
+				       3800 6
+				       4200 7 >;
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+		pinctrl-0 = <&disk1_led_pin
+			     &disk2_led_pin>;
+		pinctrl-names = "default";
+
+		disk1-led-amber {
+			label = "synology:amber:disk1";
+			gpios = <&gpio0 31 GPIO_ACTIVE_LOW>;
+			default-state = "keep";
+		};
+
+		disk2-led-amber {
+			label = "synology:amber:disk2";
+			gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
+			default-state = "keep";
+		};
+	};
+
+	regulators {
+		compatible = "simple-bus";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		pinctrl-0 = <&sata1_pwr_pin &sata2_pwr_pin>;
+		pinctrl-names = "default";
+
+		sata1_regulator: sata1-regulator {
+			compatible = "regulator-fixed";
+			reg = <1>;
+			regulator-name = "SATA1 Power";
+			regulator-min-microvolt = <5000000>;
+			regulator-max-microvolt = <5000000>;
+			startup-delay-us = <2000000>;
+			enable-active-high;
+			regulator-always-on;
+			regulator-boot-on;
+			gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>;
+		};
+
+		sata2_regulator: sata2-regulator {
+			compatible = "regulator-fixed";
+			reg = <2>;
+			regulator-name = "SATA2 Power";
+			regulator-min-microvolt = <5000000>;
+			regulator-max-microvolt = <5000000>;
+			startup-delay-us = <4000000>;
+			enable-active-high;
+			regulator-always-on;
+			regulator-boot-on;
+			gpio = <&gpio1 30 GPIO_ACTIVE_HIGH>;
+		};
+	};
+};
-- 
2.1.1

[PATCHv2 8/8] arm: mvebu: add .dts file for Synology DS414

[Arnaud Ebalard]

Synology DS414 is a 4-bay NAS powered by a Marvell Armada XP
(mv78230 dual-core @1.33Ghz). It is very similar on many aspects
to previous 4-bay synology models based on Marvell kirkwood SoC.
Here is a short summary of the device:

 - 1GB RAM
 - Boot on SPI flash (64Mbit Micron N25Q064)
 - 2 GbE interfaces (Armada MAC connected to two Marvell 88E1512
   PHY via RGMII)
 - 1 front USB 2.0 ports (directly handled by the Armada 370)
 - 2 rear USB 3.0 ports (handled by an EtronTech EJ168A XHCI
   controller on the PCIe bus)
 - 4 internal SATA ports handled by a Marvell 88SX7042 SATA-II
   controller on the PCIe bus)
 - Seiko S-35390A I2C RTC chip
 - UART0 providing serial console
 - UART1 used for poweroff (connected to a Microchip PIC16F883)

Additional note: the front LEDs the and the two fans are not directly
connected to the SoC and under its control. The former are presumably
driven by the SATA controller, the latter by the PIC.

Signed-off-by: Arnaud Ebalard <arno@natisbad.org>
---
 arch/arm/boot/dts/Makefile                     |   3 +-
 arch/arm/boot/dts/armada-xp-synology-ds414.dts | 332 +++++++++++++++++++++++++
 2 files changed, 334 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/boot/dts/armada-xp-synology-ds414.dts

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 95387b59ebb2..c181ee8055ac 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -509,7 +509,8 @@ dtb-$(CONFIG_MACH_ARMADA_XP) += \
 	armada-xp-lenovo-ix4-300d.dtb \
 	armada-xp-matrix.dtb \
 	armada-xp-netgear-rn2120.dtb \
-	armada-xp-openblocks-ax3-4.dtb
+	armada-xp-openblocks-ax3-4.dtb \
+	armada-xp-synology-ds414.dtb
 dtb-$(CONFIG_MACH_DOVE) += dove-cm-a510.dtb \
 	dove-cubox.dtb \
 	dove-cubox-es.dtb \
diff --git a/arch/arm/boot/dts/armada-xp-synology-ds414.dts b/arch/arm/boot/dts/armada-xp-synology-ds414.dts
new file mode 100644
index 000000000000..2f781d839d69
--- /dev/null
+++ b/arch/arm/boot/dts/armada-xp-synology-ds414.dts
@@ -0,0 +1,332 @@
+/*
+ * Device Tree file for Synology DS414
+ *
+ * Copyright (C) 2014, Arnaud EBALARD <arno@natisbad.org>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ *
+ * Note: this Device Tree assumes that the bootloader has remapped the
+ * internal registers to 0xf1000000 (instead of the old 0xd0000000).
+ * The 0xf1000000 is the default used by the recent, DT-capable, U-Boot
+ * bootloaders provided by Marvell. It is used in recent versions of
+ * DSM software provided by Synology. Nonetheless, some earlier boards
+ * were delivered with an older version of u-boot that left internal
+ * registers mapped at 0xd0000000. If you have such a device you will
+ * not be able to directly boot a kernel based on this Device Tree. In
+ * that case, the preferred solution is to update your bootloader (e.g.
+ * by upgrading to latest version of DSM, or building a new one and
+ * installing it from u-boot prompt) or adjust the Devive Tree
+ * (s/0xf1000000/0xd0000000/ in 'ranges' below).
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/gpio/gpio.h>
+#include "armada-xp-mv78230.dtsi"
+
+/ {
+	model = "Synology DS414";
+	compatible = "synology,ds414", "marvell,armadaxp-mv78230",
+		     "marvell,armadaxp", "marvell,armada-370-xp";
+
+	chosen {
+		bootargs = "console=ttyS0,115200 earlyprintk";
+		stdout-path = &uart0;
+	};
+
+	memory {
+		device_type = "memory";
+		reg = <0 0x00000000 0 0x40000000>; /* 1GB */
+	};
+
+	soc {
+		ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000
+			  MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000>;
+
+		pcie-controller {
+			status = "okay";
+
+			/*
+			 * Connected to Marvell 88SX7042 SATA-II controller
+			 * handling the four disks.
+			 */
+			pcie at 1,0 {
+				/* Port 0, Lane 0 */
+				status = "okay";
+			};
+
+			/*
+			 * Connected to EtronTech EJ168A XHCI controller
+			 * providing the two rear USB 3.0 ports.
+			 */
+			pcie at 5,0 {
+				/* Port 1, Lane 0 */
+				status = "okay";
+			};
+		};
+
+		internal-regs {
+
+			pinctrl {
+				sata1_pwr_pin: sata1-pwr-pin {
+					marvell,pins = "mpp42";
+					marvell,function = "gpio";
+				};
+
+				sata2_pwr_pin: sata2-pwr-pin {
+					marvell,pins = "mpp44";
+					marvell,function = "gpio";
+				};
+
+				sata3_pwr_pin: sata3-pwr-pin {
+					marvell,pins = "mpp45";
+					marvell,function = "gpio";
+				};
+
+				sata4_pwr_pin: sata4-pwr-pin {
+					marvell,pins = "mpp46";
+					marvell,function = "gpio";
+				};
+
+				sata1_pres_pin: sata1-pres-pin {
+					marvell,pins = "mpp34";
+					marvell,function = "gpio";
+				};
+
+				sata2_pres_pin: sata2-pres-pin {
+					marvell,pins = "mpp35";
+					marvell,function = "gpio";
+				};
+
+				sata3_pres_pin: sata3-pres-pin {
+					marvell,pins = "mpp40";
+					marvell,function = "gpio";
+				};
+
+				sata4_pres_pin: sata4-pres-pin {
+					marvell,pins = "mpp41";
+					marvell,function = "gpio";
+				};
+
+				syno_id_bit0_pin: syno-id-bit0-pin {
+					marvell,pins = "mpp26";
+					marvell,function = "gpio";
+				};
+
+				pmx_syno_id_bit1: syno-id-bit1-pin {
+					marvell,pins = "mpp28";
+					marvell,function = "gpio";
+				};
+
+				pmx_syno_id_bit2: syno-id-bit2-pin {
+					marvell,pins = "mpp29";
+					marvell,function = "gpio";
+				};
+
+				pmx_fan1_alarm: fan1-alarm-pin {
+					marvell,pins = "mpp33";
+					marvell,function = "gpio";
+				};
+
+				fan2_alarm_pin: fan2-alarm-pin {
+					marvell,pins = "mpp32";
+					marvell,function = "gpio";
+				};
+			};
+
+			mdio {
+				phy0: ethernet-phy at 0 { /* Marvell 88E1512 */
+					reg = <0>;
+				};
+
+				phy1: ethernet-phy at 1 { /* Marvell 88E1512 */
+					reg = <1>;
+				};
+			};
+
+			ethernet at 70000 {
+				status = "okay";
+				pinctrl-0 = <&ge0_rgmii_pins>;
+				pinctrl-names = "default";
+				phy = <&phy1>;
+				phy-mode = "rgmii-id";
+			};
+
+			ethernet at 74000 {
+				pinctrl-0 = <&ge1_rgmii_pins>;
+				pinctrl-names = "default";
+				status = "okay";
+				phy = <&phy0>;
+				phy-mode = "rgmii-id";
+			};
+
+			spi0: spi at 10600 {
+				status = "okay";
+				pinctrl-0 = <&spi0_pins>;
+				pinctrl-names = "default";
+
+				spi-flash at 0 {
+					#address-cells = <1>;
+					#size-cells = <1>;
+					compatible = "micron,n25q064";
+					reg = <0>; /* Chip select 0 */
+					spi-max-frequency = <20000000>;
+
+					/*
+					 * Warning!
+					 *
+					 * Synology u-boot uses its compiled-in environment
+					 * and it seems Synology did not care to change u-boot
+					 * default configuration in order to allow saving a
+					 * modified environment at a sensible location. So,
+					 * if you do a 'saveenv' under u-boot, your modified
+					 * environment will be saved at 1MB after the start
+					 * of the flash, i.e. in the middle of the uImage.
+					 * For that reason, it is strongly advised not to
+					 * change the default environment, unless you know
+					 * what you are doing.
+					 */
+					partition at 00000000 { /* u-boot */
+						label = "RedBoot";
+						reg = <0x00000000 0x000d0000>; /* 832KB */
+					};
+
+					partition at 000c0000 { /* uImage */
+						label = "zImage";
+						reg = <0x000d0000 0x002d0000>; /* 2880KB */
+					};
+
+					partition at 003a0000 { /* uInitramfs */
+						label = "rd.gz";
+						reg = <0x003a0000 0x00430000>; /* 4250KB */
+					};
+
+					partition at 007d0000 { /* MAC address and serial number */
+						label = "vendor";
+						reg = <0x007d0000 0x00010000>; /* 64KB */
+					};
+
+					partition at 007e0000 {
+						label = "RedBoot config";
+						reg = <0x007e0000 0x00010000>; /* 64KB */
+					};
+
+					partition at 007f0000 {
+						label = "FIS directory";
+						reg = <0x007f0000 0x00010000>; /* 64KB */
+					};
+				};
+			};
+
+			/* Front USB 2.0 port */
+			usb at 50000 {
+				status = "okay";
+			};
+
+			i2c at 11000 {
+				clock-frequency = <400000>;
+				status = "okay";
+
+				s35390a: s35390a at 30 {
+					 compatible = "sii,s35390a";
+					 reg = <0x30>;
+				};
+			};
+
+			/* RTC is provided by Seiko S-35390A above */
+			rtc at 10300 {
+				status = "disabled";
+			};
+
+			/* Connected to a header on device's PCB. This
+			 * provides the main console for the device.
+			 *
+			 * Warning: the device may not boot with a 3.3V
+			 * USB-serial converter connected when the power
+			 * button is pressed. The converter needs to be
+			 * connected a few seconds after pressing the
+			 * power button. This is possibly due to UART0_TXD
+			 * pin being sampled at reset (bit 0 of SAR).
+			 */
+			serial at 12000 {
+				status = "okay";
+			};
+
+			/* Connected to a Microchip PIC16F883 for power control */
+			serial at 12100 {
+				status = "okay";
+			};
+
+			poweroff at 12100 {
+				compatible = "synology,power-off";
+				reg = <0x12100 0x100>;
+				clocks = <&coreclk 0>;
+			};
+		};
+	};
+
+	regulators {
+		compatible = "simple-bus";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		pinctrl-0 = <&sata1_pwr_pin &sata2_pwr_pin
+			     &sata3_pwr_pin &sata4_pwr_pin>;
+		pinctrl-names = "default";
+
+		sata1_regulator: sata1-regulator {
+			compatible = "regulator-fixed";
+			reg = <1>;
+			regulator-name = "SATA1 Power";
+			regulator-min-microvolt = <5000000>;
+			regulator-max-microvolt = <5000000>;
+			startup-delay-us = <2000000>;
+			enable-active-high;
+			regulator-always-on;
+			regulator-boot-on;
+			gpio = <&gpio1 10 GPIO_ACTIVE_HIGH>;
+		};
+
+		sata2_regulator: sata2-regulator {
+			compatible = "regulator-fixed";
+			reg = <2>;
+			regulator-name = "SATA2 Power";
+			regulator-min-microvolt = <5000000>;
+			regulator-max-microvolt = <5000000>;
+			startup-delay-us = <4000000>;
+			enable-active-high;
+			regulator-always-on;
+			regulator-boot-on;
+			gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>;
+		};
+
+		sata3_regulator: sata3-regulator {
+			compatible = "regulator-fixed";
+			reg = <3>;
+			regulator-name = "SATA3 Power";
+			regulator-min-microvolt = <5000000>;
+			regulator-max-microvolt = <5000000>;
+			startup-delay-us = <6000000>;
+			enable-active-high;
+			regulator-always-on;
+			regulator-boot-on;
+			gpio = <&gpio1 13 GPIO_ACTIVE_HIGH>;
+		};
+
+		sata4_regulator: sata4-regulator {
+			compatible = "regulator-fixed";
+			reg = <4>;
+			regulator-name = "SATA4 Power";
+			regulator-min-microvolt = <5000000>;
+			regulator-max-microvolt = <5000000>;
+			startup-delay-us = <8000000>;
+			enable-active-high;
+			regulator-always-on;
+			regulator-boot-on;
+			gpio = <&gpio1 14 GPIO_ACTIVE_HIGH>;
+		};
+	};
+};
-- 
2.1.1

[PATCHv2 2/8] arm: mvebu: fix vendor prefix typo in kirkwood-synology.dtsi

[Andrew Lunn]

On Sun, Nov 16, 2014 at 06:37:06PM +0100, Arnaud Ebalard wrote:
> 
> As reported by Andrew, the vendor prefix for Seiko Instruments, Inc.
> S-35390A I2C RTC chip in kirkwood-synology.dtsi has a typo (ssi
> instead of sii). This patches fixes it.
> 
> Reported-by: Andrew Lunn <andrew@lunn.ch>
> Signed-off-by: Arnaud Ebalard <arno@natisbad.org>

Acked-by: Andrew Lunn <andrew@lunn.ch>

Thanks for the patch.

       Andrewy

> ---
>  arch/arm/boot/dts/kirkwood-synology.dtsi | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/arm/boot/dts/kirkwood-synology.dtsi b/arch/arm/boot/dts/kirkwood-synology.dtsi
> index 811e0971fc58..8be5b2e4626e 100644
> --- a/arch/arm/boot/dts/kirkwood-synology.dtsi
> +++ b/arch/arm/boot/dts/kirkwood-synology.dtsi
> @@ -266,7 +266,7 @@
>  
>  			s35390a: s35390a at 30 {
>  				status = "disabled";
> -				compatible = "ssi,s35390a";
> +				compatible = "sii,s35390a";
>  				reg = <0x30>;
>  			};
>  		};
> -- 
> 2.1.1
> 
> 
> 
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

[PATCHv2 4/8] arm: mvebu: use recently introduced uart label for stdout-path

[Andrew Lunn]

On Sun, Nov 16, 2014 at 06:37:25PM +0100, Arnaud Ebalard wrote:
> 
> Now that labels for uartX are available in Marvell Armada .dtsi files,
> this patch replaces the "/soc/internal-regs/serial at 12000" found in
> armada-xp-lenovo-ix4-300d.dts file for stdout-path property by the more
> concise &uart0.
> 
> Suggested-by: Andrew Lunn <andrew@lunn.ch>
> Signed-off-by: Arnaud Ebalard <arno@natisbad.org>

Acked-by: Andrew Lunn <andrew@lunn.ch>

Thanks for the patch

       Andrew

> ---
>  arch/arm/boot/dts/armada-xp-lenovo-ix4-300d.dts | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/arm/boot/dts/armada-xp-lenovo-ix4-300d.dts b/arch/arm/boot/dts/armada-xp-lenovo-ix4-300d.dts
> index 469cf7137595..cccf54784c4c 100644
> --- a/arch/arm/boot/dts/armada-xp-lenovo-ix4-300d.dts
> +++ b/arch/arm/boot/dts/armada-xp-lenovo-ix4-300d.dts
> @@ -22,7 +22,7 @@
>  
>  	chosen {
>  		bootargs = "console=ttyS0,115200 earlyprintk";
> -		stdout-path = "/soc/internal-regs/serial at 12000";
> +		stdout-path = &uart0;
>  	};
>  
>  	memory {
> -- 
> 2.1.1
> 
> 
> 
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

[PATCHv2 5/8] arm: mvebu: add common uart0 and spi0 pintcrl entries for Armada 370

[Andrew Lunn]

On Sun, Nov 16, 2014 at 06:37:33PM +0100, Arnaud Ebalard wrote:
> 
> pinctrl entries for uart0 using MPP0-1 and spi0 using MPP33-36 are
> common configurations. Instead of replicating them in each .dts file,
> put those in armada-370.dtsi file so that they can be referenced.
> 
> Suggested-by: Andrew Lunn <andrew@lunn.ch>
> Signed-off-by: Arnaud Ebalard <arno@natisbad.org>
> ---
>  arch/arm/boot/dts/armada-370.dtsi | 11 +++++++++++
>  1 file changed, 11 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/armada-370.dtsi b/arch/arm/boot/dts/armada-370.dtsi
> index 6b3c23b1e138..d9f5d59e463e 100644
> --- a/arch/arm/boot/dts/armada-370.dtsi
> +++ b/arch/arm/boot/dts/armada-370.dtsi
> @@ -115,6 +115,17 @@
>  				compatible = "marvell,mv88f6710-pinctrl";
>  				reg = <0x18000 0x38>;
>  
> +				uart0_pins: uart0-pins {
> +					marvell,pins = "mpp0", "mpp1";
> +					marvell,function = "uart0";
> +				};

Thanks for these.

We can go one stage further. kirkwood.dts has:

                uart0: serial at 12000 {
                        compatible = "ns16550a";
                        reg = <0x12000 0x100>;
                        reg-shift = <2>;
                        interrupts = <33>;
                        clocks = <&gate_clk 7>;
                        pinctrl-0 = <&pmx_uart0>;
                        pinctrl-names = "default";
                        status = "disabled";
                };

i.e actually references them. This is safe because a board .dts file
can override the pins if needed.

We should do the same here, both for 370 and XP.

   Andrew

> +
> +				spi0_pins: spi0-pins {
> +					marvell,pins = "mpp33", "mpp34",
> +						       "mpp35", "mpp36";
> +					marvell,function = "spi0";
> +				};
> +
>  				sdio_pins1: sdio-pins1 {
>  					marvell,pins = "mpp9",  "mpp11", "mpp12",
>  							"mpp13", "mpp14", "mpp15";
> -- 
> 2.1.1
> 
> 
> 
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

[PATCHv2 5/8] arm: mvebu: add common uart0 and spi0 pintcrl entries for Armada 370

[Arnaud Ebalard]

Hi,

Andrew Lunn <andrew@lunn.ch> writes:

> On Sun, Nov 16, 2014 at 06:37:33PM +0100, Arnaud Ebalard wrote:
>> 
>> pinctrl entries for uart0 using MPP0-1 and spi0 using MPP33-36 are
>> common configurations. Instead of replicating them in each .dts file,
>> put those in armada-370.dtsi file so that they can be referenced.
>> 
>> Suggested-by: Andrew Lunn <andrew@lunn.ch>
>> Signed-off-by: Arnaud Ebalard <arno@natisbad.org>
>> ---
>>  arch/arm/boot/dts/armada-370.dtsi | 11 +++++++++++
>>  1 file changed, 11 insertions(+)
>> 
>> diff --git a/arch/arm/boot/dts/armada-370.dtsi b/arch/arm/boot/dts/armada-370.dtsi
>> index 6b3c23b1e138..d9f5d59e463e 100644
>> --- a/arch/arm/boot/dts/armada-370.dtsi
>> +++ b/arch/arm/boot/dts/armada-370.dtsi
>> @@ -115,6 +115,17 @@
>>  				compatible = "marvell,mv88f6710-pinctrl";
>>  				reg = <0x18000 0x38>;
>>  
>> +				uart0_pins: uart0-pins {
>> +					marvell,pins = "mpp0", "mpp1";
>> +					marvell,function = "uart0";
>> +				};
>
> Thanks for these.
>
> We can go one stage further. kirkwood.dts has:
>
>                 uart0: serial at 12000 {
>                         compatible = "ns16550a";
>                         reg = <0x12000 0x100>;
>                         reg-shift = <2>;
>                         interrupts = <33>;
>                         clocks = <&gate_clk 7>;
>                         pinctrl-0 = <&pmx_uart0>;
>                         pinctrl-names = "default";
>                         status = "disabled";
>                 };
>
> i.e actually references them. This is safe because a board .dts file
> can override the pins if needed.
>
> We should do the same here, both for 370 and XP.

Just to be sure I understand: for uart0 and uart1, I think this can only
be done for Armada 370 (on XP, uart0/1 rx/tx are not mpp).

This only a matter of adding the following in armada-370.dtsi for uart0: 

 		 /*
		  * Default UART pinctrl setting without RTS/CTS, can
		  * be overwritten on board level.
                  */
                 uart0: serial at 12000 {
                         pinctrl-0 = <&uart0_pins>;
                         pinctrl-names = "default";
                 };

For uart1, it's not obvious because there are 6 different MPP which can
be configured to act as uart1 TXD. Same for RXD. If I remove the ones
overlapping w/ RGMII pins for GbE interfaces, which one should be
selected as default: 41/42, 55/57, 60/61?

Now, regarding armada XP, uart2 and uart3 txd/rxd MPP are 42/43 and
44/45. Best we can do is put the same as above in each specific
armada-xp-mv78XXX.dtsi file, where pinctrl node is, after adding
uart2-pins and uart3-pins. Unless I am missing something, this cannot
be done in armada-xp.dtsi.

Cheers,

a+

[PATCHv2 5/8] arm: mvebu: add common uart0 and spi0 pintcrl entries for Armada 370

[Andrew Lunn]

On Sun, Nov 16, 2014 at 11:29:00PM +0100, Arnaud Ebalard wrote:
> Hi,
> 
> Andrew Lunn <andrew@lunn.ch> writes:
> 
> > On Sun, Nov 16, 2014 at 06:37:33PM +0100, Arnaud Ebalard wrote:
> >> 
> >> pinctrl entries for uart0 using MPP0-1 and spi0 using MPP33-36 are
> >> common configurations. Instead of replicating them in each .dts file,
> >> put those in armada-370.dtsi file so that they can be referenced.
> >> 
> >> Suggested-by: Andrew Lunn <andrew@lunn.ch>
> >> Signed-off-by: Arnaud Ebalard <arno@natisbad.org>
> >> ---
> >>  arch/arm/boot/dts/armada-370.dtsi | 11 +++++++++++
> >>  1 file changed, 11 insertions(+)
> >> 
> >> diff --git a/arch/arm/boot/dts/armada-370.dtsi b/arch/arm/boot/dts/armada-370.dtsi
> >> index 6b3c23b1e138..d9f5d59e463e 100644
> >> --- a/arch/arm/boot/dts/armada-370.dtsi
> >> +++ b/arch/arm/boot/dts/armada-370.dtsi
> >> @@ -115,6 +115,17 @@
> >>  				compatible = "marvell,mv88f6710-pinctrl";
> >>  				reg = <0x18000 0x38>;
> >>  
> >> +				uart0_pins: uart0-pins {
> >> +					marvell,pins = "mpp0", "mpp1";
> >> +					marvell,function = "uart0";
> >> +				};
> >
> > Thanks for these.
> >
> > We can go one stage further. kirkwood.dts has:
> >
> >                 uart0: serial at 12000 {
> >                         compatible = "ns16550a";
> >                         reg = <0x12000 0x100>;
> >                         reg-shift = <2>;
> >                         interrupts = <33>;
> >                         clocks = <&gate_clk 7>;
> >                         pinctrl-0 = <&pmx_uart0>;
> >                         pinctrl-names = "default";
> >                         status = "disabled";
> >                 };
> >
> > i.e actually references them. This is safe because a board .dts file
> > can override the pins if needed.
> >
> > We should do the same here, both for 370 and XP.
> 
> Just to be sure I understand: for uart0 and uart1, I think this can only
> be done for Armada 370 (on XP, uart0/1 rx/tx are not mpp).

I must admit, i did not look at the datasheet for XP. So you can
ignore XP.

 
> This only a matter of adding the following in armada-370.dtsi for uart0: 
> 
>  		 /*
> 		  * Default UART pinctrl setting without RTS/CTS, can
> 		  * be overwritten on board level.
>                   */
>                  uart0: serial at 12000 {
>                          pinctrl-0 = <&uart0_pins>;
>                          pinctrl-names = "default";
>                  };

Looks good.
 
> For uart1, it's not obvious because there are 6 different MPP which can
> be configured to act as uart1 TXD.

That is too many configurations. So lets leave it per board.

> Now, regarding armada XP, uart2 and uart3 txd/rxd MPP are 42/43 and
> 44/45. Best we can do is put the same as above in each specific
> armada-xp-mv78XXX.dtsi file, where pinctrl node is, after adding
> uart2-pins and uart3-pins. Unless I am missing something, this cannot
> be done in armada-xp.dtsi.

Actually, i think it can. But i could be wrong.

armada-370-xp.dtsi declares uart0 and uart1.  armada-xp.dtsi then
defined another two uart's, uart2 and uart3. You should be able to
define the pinctrl nodes for the serial ports there, even if the main
pinctrl node is in the SoC specific .dtsi file.

	Andrew

[PATCHv2 7/8] arm: mvebu: add .dts file for Synology DS213j

[Andrew Lunn]

On Sun, Nov 16, 2014 at 06:37:54PM +0100, Arnaud Ebalard wrote:
> +				sata1_pres_pin: sata1-pres-pin {
> +					marvell,pins = "mpp60";
> +					marvell,function = "gpio";
> +				};
> +
> +				sata2_pres_pin: sata2-pres-pin {
> +					marvell,pins = "mpp48";
> +					marvell,function = "gpio";
> +				};

Hi Arnaud

Are they above correct?

       MPP_MODE(48,
           MPP_FUNCTION(0x0, "gpio", NULL),
           MPP_FUNCTION(0x1, "dev", "ad9"),
           MPP_FUNCTION(0x2, "uart0", "rts"),
           MPP_FUNCTION(0x3, "sd0", "cmd"),
           MPP_FUNCTION(0x4, "sata1", "prsnt"),
           MPP_FUNCTION(0x5, "spi0", "cs1")),

and

        MPP_MODE(60,
           MPP_FUNCTION(0x0, "gpio", NULL),
           MPP_FUNCTION(0x1, "dev", "ale1"),
           MPP_FUNCTION(0x2, "uart1", "rxd"),
           MPP_FUNCTION(0x3, "sata0", "prsnt"),
           MPP_FUNCTION(0x4, "pcie", "rst-out"),
           MPP_FUNCTION(0x5, "audio", "sdi")),

Seems like function sata[01] would be better than gpio.

Also, i don't see you using these anywhere.

There are a few files in /sys which you might find interesting.

/sys/kernel/debug/pinctrl/f1018000.pinctrl/pinconf-groups shows you
how pins are currently defined. These can be how Linux has set them,
or if Linux has not touched them, how the boot loader set them.

/sys/kernel/debug/pinctrl/f1018000.pinctrl/pinmux-pins shows you what
has been claimed by Linux, either as a gpio or for a specific
function.

There are two schools of thoughts for pinctl. One is to leave the
bootloader to configure the pins, and Linux should use them as they
are. The other is that Linux should not trust the bootloader and
configure the pins itself. With kirkwood we have tried to configure
everything in Linux. I also think for these two boards, we should
configure everything. The reason being the broken bootloader. I
suspect because of the saveenv corruption, more than average are going
to install a new uboot, or barebox image. A generic uboot might not
get the pinctl correct, and a barebox image will be using the dtb blob
to configure the pins. So it would be good to see that all pins which
are used and claimed by a driver.

Thanks
	Andrew

[PATCHv2 7/8] arm: mvebu: add .dts file for Synology DS213j

[Arnaud Ebalard]

Hi Andrew,

Andrew Lunn <andrew@lunn.ch> writes:

> On Sun, Nov 16, 2014 at 06:37:54PM +0100, Arnaud Ebalard wrote:
>> +				sata1_pres_pin: sata1-pres-pin {
>> +					marvell,pins = "mpp60";
>> +					marvell,function = "gpio";
>> +				};
>> +
>> +				sata2_pres_pin: sata2-pres-pin {
>> +					marvell,pins = "mpp48";
>> +					marvell,function = "gpio";
>> +				};
>
> Hi Arnaud
>
> Are they above correct?
>
>        MPP_MODE(48,
>            MPP_FUNCTION(0x0, "gpio", NULL),
>            MPP_FUNCTION(0x1, "dev", "ad9"),
>            MPP_FUNCTION(0x2, "uart0", "rts"),
>            MPP_FUNCTION(0x3, "sd0", "cmd"),
>            MPP_FUNCTION(0x4, "sata1", "prsnt"),
>            MPP_FUNCTION(0x5, "spi0", "cs1")),
>
> and
>
>         MPP_MODE(60,
>            MPP_FUNCTION(0x0, "gpio", NULL),
>            MPP_FUNCTION(0x1, "dev", "ale1"),
>            MPP_FUNCTION(0x2, "uart1", "rxd"),
>            MPP_FUNCTION(0x3, "sata0", "prsnt"),
>            MPP_FUNCTION(0x4, "pcie", "rst-out"),
>            MPP_FUNCTION(0x5, "audio", "sdi")),
>
> Seems like function sata[01] would be better than gpio.
>
> Also, i don't see you using these anywhere.

The main reason is that I have (still a draft version of) a patch that
adds a small feature to fixed regulator; the idea is to add an input
signal (gpio/interrupt) to be able to start/stop the regulator. I have
tested it on my RN102 and it works as expected.

ATM, disks on RN102, RN104 and RN2120 are powered by u-boot and I did
not add fixed regulators to have Linux kernel do it. This means if you
add a disk after boot which was not there at boot, it will not be
powered. If you remove a disk that was there at boot, power will still
be available.

With Synology NAS, it's a bit different: you need a fixed regulator to
power the disks because u-boot will not start them, AFAICT.

In the end, the sata presence pins are declared as gpio in order to be
able to use them as input signal for a modified fixed regulator. It's
also to document their existence.

I have nothing against changing the function to sata[01] but how will
those be used, by whom?


> There are a few files in /sys which you might find interesting.
>
> /sys/kernel/debug/pinctrl/f1018000.pinctrl/pinconf-groups shows you
> how pins are currently defined. These can be how Linux has set them,
> or if Linux has not touched them, how the boot loader set them.
>
> /sys/kernel/debug/pinctrl/f1018000.pinctrl/pinmux-pins shows you what
> has been claimed by Linux, either as a gpio or for a specific
> function.

Will take a look.


> There are two schools of thoughts for pinctl. One is to leave the
> bootloader to configure the pins, and Linux should use them as they
> are. The other is that Linux should not trust the bootloader and
> configure the pins itself. With kirkwood we have tried to configure
> everything in Linux. I also think for these two boards, we should
> configure everything. The reason being the broken bootloader. I
> suspect because of the saveenv corruption, more than average are going
> to install a new uboot, or barebox image. A generic uboot might not
> get the pinctl correct, and a barebox image will be using the dtb blob
> to configure the pins. So it would be good to see that all pins which
> are used and claimed by a driver.

I think I prefer second school. Relying on u-boot/barebox doing things
may break at next bootloader update. 

Cheers,

a+

[PATCHv2 5/8] arm: mvebu: add common uart0 and spi0 pintcrl entries for Armada 370

[Sebastian Hesselbarth]

On 11/17/2014 01:55 AM, Andrew Lunn wrote:
> On Sun, Nov 16, 2014 at 11:29:00PM +0100, Arnaud Ebalard wrote:
>> Hi,
>>
>> Andrew Lunn <andrew@lunn.ch> writes:
>>
>>> On Sun, Nov 16, 2014 at 06:37:33PM +0100, Arnaud Ebalard wrote:
>>>>
>>>> pinctrl entries for uart0 using MPP0-1 and spi0 using MPP33-36 are
>>>> common configurations. Instead of replicating them in each .dts file,
>>>> put those in armada-370.dtsi file so that they can be referenced.
>>>>
>>>> Suggested-by: Andrew Lunn <andrew@lunn.ch>
>>>> Signed-off-by: Arnaud Ebalard <arno@natisbad.org>
>>>> ---
>>>>   arch/arm/boot/dts/armada-370.dtsi | 11 +++++++++++
>>>>   1 file changed, 11 insertions(+)
>>>>
>>>> diff --git a/arch/arm/boot/dts/armada-370.dtsi b/arch/arm/boot/dts/armada-370.dtsi
>>>> index 6b3c23b1e138..d9f5d59e463e 100644
>>>> --- a/arch/arm/boot/dts/armada-370.dtsi
>>>> +++ b/arch/arm/boot/dts/armada-370.dtsi
>>>> @@ -115,6 +115,17 @@
>>>>   				compatible = "marvell,mv88f6710-pinctrl";
>>>>   				reg = <0x18000 0x38>;
>>>>
>>>> +				uart0_pins: uart0-pins {
>>>> +					marvell,pins = "mpp0", "mpp1";
>>>> +					marvell,function = "uart0";
>>>> +				};
>>>
>>> Thanks for these.
>>>
>>> We can go one stage further. kirkwood.dts has:
>>>
>>>                  uart0: serial at 12000 {
>>>                          compatible = "ns16550a";
>>>                          reg = <0x12000 0x100>;
>>>                          reg-shift = <2>;
>>>                          interrupts = <33>;
>>>                          clocks = <&gate_clk 7>;
>>>                          pinctrl-0 = <&pmx_uart0>;
>>>                          pinctrl-names = "default";
>>>                          status = "disabled";
>>>                  };
>>>
>>> i.e actually references them. This is safe because a board .dts file
>>> can override the pins if needed.
>>>
>>> We should do the same here, both for 370 and XP.
>>
>> Just to be sure I understand: for uart0 and uart1, I think this can only
>> be done for Armada 370 (on XP, uart0/1 rx/tx are not mpp).
>
> I must admit, i did not look at the datasheet for XP. So you can
> ignore XP.
>
>
>> This only a matter of adding the following in armada-370.dtsi for uart0:
>>
>>   		 /*
>> 		  * Default UART pinctrl setting without RTS/CTS, can
>> 		  * be overwritten on board level.
>>                    */
>>                   uart0: serial at 12000 {
>>                           pinctrl-0 = <&uart0_pins>;
>>                           pinctrl-names = "default";
>>                   };
>
> Looks good.
>
>> For uart1, it's not obvious because there are 6 different MPP which can
>> be configured to act as uart1 TXD.
>
> That is too many configurations. So lets leave it per board.
>
>> Now, regarding armada XP, uart2 and uart3 txd/rxd MPP are 42/43 and
>> 44/45. Best we can do is put the same as above in each specific
>> armada-xp-mv78XXX.dtsi file, where pinctrl node is, after adding
>> uart2-pins and uart3-pins. Unless I am missing something, this cannot
>> be done in armada-xp.dtsi.

It would make sense to have a basic pinctrl node in armada-370-xp.dtsi
already. It will only have the reg property set, which is IIRC the same
for all SoCs. Each of the more specific dtsi will set what is common
below that, i.e. armada-370.dtsi will have the compatible + 370 specific
pinmux settings. For XP, the common pinmux settings will be in
armada-xp.dtsi while the compatible is set later in each of the XP
variant dtsi files.

Sebastian

> Actually, i think it can. But i could be wrong.
>
> armada-370-xp.dtsi declares uart0 and uart1.  armada-xp.dtsi then
> defined another two uart's, uart2 and uart3. You should be able to
> define the pinctrl nodes for the serial ports there, even if the main
> pinctrl node is in the SoC specific .dtsi file.