[GIT PULL] Renesas ARM Based SoC Fixes for v3.19

[GIT PULL] Renesas ARM Based SoC Fixes for v3.19

[Simon Horman]

Hi Olof, Hi Kevin, Hi Arnd,

Please consider these Renesas ARM based SoC fixes for v3.19.

This pull request is based on the last round of SoC updates for v3.19,
Fourth Round of Renesas ARM Based SoC Updates for v3.19, tagged as
renesas-soc3-for-v3.19, merged into your next/soc branch and included in
v3.19-rc1.


* ARM: shmobile: r8a7740: Instantiate GIC from C board code in legacy builds

  This fixes a long standing problem which has been present since
  the sh73a0 SoC started using the INTC External IRQ pin driver.

  The patch that introduced the problem is 341eb5465f67437a ("ARM:
  shmobile: INTC External IRQ pin driver on sh73a0") which was included
  in v3.10.

* This fixes a regression in the r8a7740 SoC due to
  9a1091ef0017c40a ("irqchip: gic: Support hierarchy irq domain.")
  which was included in v3.18-rc2.


The following changes since commit 7a2071c58f36450fbf44a27d2e5d371c18534a25:

  ARM: shmobile: Add early debugging support using SCIF(A) (2014-11-17 10:29:58 +0900)

are available in the git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git tags/renesas-soc-fixes-for-v3.19

for you to fetch changes up to b0ddb319db3d7a1943445f0de0a45c07a7f3457a:

  ARM: shmobile: sh73a0 legacy: Set .control_parent for all irqpin instances (2015-01-08 09:15:16 +0900)

----------------------------------------------------------------
Renesas ARM Based SoC Fixes for v3.19

* Set .control_parent for all irqpin instances for sh73a0 SoC when booting
  using legacy C
* Instantiate GIC board for r8a7740 SoC when using legacy C

----------------------------------------------------------------
Geert Uytterhoeven (2):
      ARM: shmobile: r8a7740: Instantiate GIC from C board code in legacy builds
      ARM: shmobile: sh73a0 legacy: Set .control_parent for all irqpin instances

 arch/arm/mach-shmobile/setup-r8a7740.c | 7 +++++++
 arch/arm/mach-shmobile/setup-sh73a0.c  | 3 +++
 2 files changed, 10 insertions(+)

[PATCH 1/2] ARM: shmobile: r8a7740: Instantiate GIC from C board code in legacy builds

[Simon Horman]

From: Geert Uytterhoeven <geert+renesas@glider.be>

As of commit 9a1091ef0017c40a ("irqchip: gic: Support hierarchy irq
domain."), armadillo-legacy hangs during boot with:

     sh-tmu.0: ch0: used for clock events
     sh-tmu.0: ch0: used for periodic clock events
     sh-tmu.0: ch0: failed to request irq 230
     sh-tmu.0: ch1: used as clock source
     sh-cmt-48.1: ch0: failed to request irq 90
     sh-cmt-48.1: ch0: registration failed
    earlytimer: unable to probe sh-cmt-48 early.
    Calibrating delay loop...

This happens because the IRQ numbers of the GIC are now virtual, and no
longer match the hardcoded hardware IRQ numbers in the platform board
code.
To fix this, instantiate the GIC from platform board code when compiling
a legacy kernel, like is done on sh73a0 for kzm9g-legacy.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
 arch/arm/mach-shmobile/setup-r8a7740.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm/mach-shmobile/setup-r8a7740.c b/arch/arm/mach-shmobile/setup-r8a7740.c
index 0bfe226..e76e2f8 100644
--- a/arch/arm/mach-shmobile/setup-r8a7740.c
+++ b/arch/arm/mach-shmobile/setup-r8a7740.c
@@ -793,7 +793,14 @@ void __init r8a7740_init_irq_of(void)
 	void __iomem *intc_msk_base = ioremap_nocache(0xe6900040, 0x10);
 	void __iomem *pfc_inta_ctrl = ioremap_nocache(0xe605807c, 0x4);
 
+#ifdef CONFIG_ARCH_SHMOBILE_LEGACY
+	void __iomem *gic_dist_base = ioremap_nocache(0xc2800000, 0x1000);
+	void __iomem *gic_cpu_base = ioremap_nocache(0xc2000000, 0x1000);
+
+	gic_init(0, 29, gic_dist_base, gic_cpu_base);
+#else
 	irqchip_init();
+#endif
 
 	/* route signals to GIC */
 	iowrite32(0x0, pfc_inta_ctrl);
-- 
2.1.4

[PATCH 2/2] ARM: shmobile: sh73a0 legacy: Set .control_parent for all irqpin instances

[Simon Horman]

From: Geert Uytterhoeven <geert+renesas@glider.be>

The sh73a0 INTC can't mask interrupts properly most likely due to a
hardware bug. Set the .control_parent flag to delegate masking to the
parent interrupt controller, like was already done for irqpin1.

Without this, accessing the three-axis digital accelerometer ADXL345
on kzm9g through /dev/input/event1 causes an interrupt storm, which
requires a power-cycle to recover from.

This was inspired by a patch for arch/arm/boot/dts/sh73a0.dtsi from
Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Fixes: 341eb5465f67437a ("ARM: shmobile: INTC External IRQ pin driver on sh73a0")
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
 arch/arm/mach-shmobile/setup-sh73a0.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/arm/mach-shmobile/setup-sh73a0.c b/arch/arm/mach-shmobile/setup-sh73a0.c
index fa7cab8..b5d0cf5 100644
--- a/arch/arm/mach-shmobile/setup-sh73a0.c
+++ b/arch/arm/mach-shmobile/setup-sh73a0.c
@@ -579,6 +579,7 @@ static struct platform_device ipmmu_device = {
 
 static struct renesas_intc_irqpin_config irqpin0_platform_data = {
 	.irq_base = irq_pin(0), /* IRQ0 -> IRQ7 */
+	.control_parent = true,
 };
 
 static struct resource irqpin0_resources[] = {
@@ -640,6 +641,7 @@ static struct platform_device irqpin1_device = {
 
 static struct renesas_intc_irqpin_config irqpin2_platform_data = {
 	.irq_base = irq_pin(16), /* IRQ16 -> IRQ23 */
+	.control_parent = true,
 };
 
 static struct resource irqpin2_resources[] = {
@@ -670,6 +672,7 @@ static struct platform_device irqpin2_device = {
 
 static struct renesas_intc_irqpin_config irqpin3_platform_data = {
 	.irq_base = irq_pin(24), /* IRQ24 -> IRQ31 */
+	.control_parent = true,
 };
 
 static struct resource irqpin3_resources[] = {
-- 
2.1.4

[GIT PULL] Renesas ARM Based SoC Fixes for v3.19

[Geert Uytterhoeven]

On Tue, Jan 13, 2015 at 3:13 AM, Simon Horman
<horms+renesas@verge.net.au> wrote:
>
> Please consider these Renesas ARM based SoC fixes for v3.19.
>
> This pull request is based on the last round of SoC updates for v3.19,
> Fourth Round of Renesas ARM Based SoC Updates for v3.19, tagged as
> renesas-soc3-for-v3.19, merged into your next/soc branch and included in
> v3.19-rc1.
>
> * ARM: shmobile: r8a7740: Instantiate GIC from C board code in legacy builds

That's the description for the regression below.
Should have been: "Set .control_parent for all irqpin instances for sh73a0
SoC when booting using legacy C."

>   This fixes a long standing problem which has been present since
>   the sh73a0 SoC started using the INTC External IRQ pin driver.
>
>   The patch that introduced the problem is 341eb5465f67437a ("ARM:
>   shmobile: INTC External IRQ pin driver on sh73a0") which was included
>   in v3.10.
>
> * This fixes a regression in the r8a7740 SoC due to
>   9a1091ef0017c40a ("irqchip: gic: Support hierarchy irq domain.")
>   which was included in v3.18-rc2.

> ----------------------------------------------------------------
> Renesas ARM Based SoC Fixes for v3.19
>
> * Set .control_parent for all irqpin instances for sh73a0 SoC when booting
>   using legacy C
> * Instantiate GIC board for r8a7740 SoC when using legacy C

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

[GIT PULL] Renesas ARM Based SoC Fixes for v3.19

[Olof Johansson]

On Tue, Jan 13, 2015 at 09:10:08AM +0100, Geert Uytterhoeven wrote:
> On Tue, Jan 13, 2015 at 3:13 AM, Simon Horman
> <horms+renesas@verge.net.au> wrote:
> >
> > Please consider these Renesas ARM based SoC fixes for v3.19.
> >
> > This pull request is based on the last round of SoC updates for v3.19,
> > Fourth Round of Renesas ARM Based SoC Updates for v3.19, tagged as
> > renesas-soc3-for-v3.19, merged into your next/soc branch and included in
> > v3.19-rc1.
> >
> > * ARM: shmobile: r8a7740: Instantiate GIC from C board code in legacy builds
> 
> That's the description for the regression below.
> Should have been: "Set .control_parent for all irqpin instances for sh73a0
> SoC when booting using legacy C."
> 
> >   This fixes a long standing problem which has been present since
> >   the sh73a0 SoC started using the INTC External IRQ pin driver.
> >
> >   The patch that introduced the problem is 341eb5465f67437a ("ARM:
> >   shmobile: INTC External IRQ pin driver on sh73a0") which was included
> >   in v3.10.
> >
> > * This fixes a regression in the r8a7740 SoC due to
> >   9a1091ef0017c40a ("irqchip: gic: Support hierarchy irq domain.")
> >   which was included in v3.18-rc2.
> 
> > ----------------------------------------------------------------
> > Renesas ARM Based SoC Fixes for v3.19
> >
> > * Set .control_parent for all irqpin instances for sh73a0 SoC when booting
> >   using legacy C
> > * Instantiate GIC board for r8a7740 SoC when using legacy C

Thanks, I fixed up the commit message when I pulled the branch.


Merged.

-Olof

[GIT PULL] Renesas ARM Based SoC Fixes for v3.19

[Simon Horman]

On Tue, Jan 13, 2015 at 09:10:08AM +0100, Geert Uytterhoeven wrote:
> On Tue, Jan 13, 2015 at 3:13 AM, Simon Horman
> <horms+renesas@verge.net.au> wrote:
> >
> > Please consider these Renesas ARM based SoC fixes for v3.19.
> >
> > This pull request is based on the last round of SoC updates for v3.19,
> > Fourth Round of Renesas ARM Based SoC Updates for v3.19, tagged as
> > renesas-soc3-for-v3.19, merged into your next/soc branch and included in
> > v3.19-rc1.
> >
> > * ARM: shmobile: r8a7740: Instantiate GIC from C board code in legacy builds
> 
> That's the description for the regression below.
> Should have been: "Set .control_parent for all irqpin instances for sh73a0
> SoC when booting using legacy C."
> 
> >   This fixes a long standing problem which has been present since
> >   the sh73a0 SoC started using the INTC External IRQ pin driver.
> >
> >   The patch that introduced the problem is 341eb5465f67437a ("ARM:
> >   shmobile: INTC External IRQ pin driver on sh73a0") which was included
> >   in v3.10.
> >
> > * This fixes a regression in the r8a7740 SoC due to
> >   9a1091ef0017c40a ("irqchip: gic: Support hierarchy irq domain.")
> >   which was included in v3.18-rc2.

Thanks, I think the above text should have been:

* Set .control_parent for all irqpin instances for sh73a0 SoC when
  booting using legacy C

  This fixes a long standing problem which has been present since
  the sh73a0 SoC started using the INTC External IRQ pin driver.

  The patch that introduced the problem is 341eb5465f67437a ("ARM:
  shmobile: INTC External IRQ pin driver on sh73a0") which was included
  in v3.10.

* ARM: shmobile: r8a7740: Instantiate GIC from C board code in legacy builds

  This fixes a regression in the r8a7740 SoC due to
  9a1091ef0017c40a ("irqchip: gic: Support hierarchy irq domain.")
  which was included in v3.18-rc2.

> > ----------------------------------------------------------------
> > Renesas ARM Based SoC Fixes for v3.19
> >
> > * Set .control_parent for all irqpin instances for sh73a0 SoC when booting
> >   using legacy C
> > * Instantiate GIC board for r8a7740 SoC when using legacy C
> 
> Gr{oetje,eeting}s,
> 
>                         Geert
> 
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org
> 
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like that.
>                                 -- Linus Torvalds
> --
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